TPS62843 [TI]
1.8-V to 5.5-V input, 600-mA ultra-low IQ step-down converter in WCSP;
| 型号： | TPS62843 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1.8-V to 5.5-V input, 600-mA ultra-low IQ step-down converter in WCSP |
| 文件： | 总26页 (文件大小：1855K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS62843
ZHCSLS3A –JANUARY 2022 –REVISED MAY 2023
TPS62843 1.8V 至5.5V、600mA、275nA IQ 小型降压转换器
1 特性
3 说明
• 输入电压范围为1.8V 至5.5V
• 0.4V 至3.6V 输出电压范围
• 275nA 静态电流（典型值）
• 输出电流为600mA
• 1% 的输出电压精度
• 关断电流典型值为4nA
• 输出放电
TPS62843 是一款高效降压转换器，具有典型值为
275nA 的超低工作静态电流。该器件在禁用状态时具
有4nA（典型值）关断电流。
此器件采用 DCS-Control 技术，具有射频友好型低输
出电压纹波，可以为无线电提供电源。
此器件采用 1.5MHz 的典型开关频率，可在低至
100μA 负载电流及以下的轻负载条件下提供高效率。
• 通过单个电阻器实现VSET 引脚可选输出电压
– TPS628436：0.4V 至0.8V
– TPS628437：0.8V 至1.8V
– TPS628438：1.8V 至3.6V
• 针对小型无源器件进行了优化
– 1μH 电感器
通过将一个电阻器连接到 VSET 引脚，可选择 18 种预
定义的输出电压，因此只需很少的无源器件即可将该系
列器件用于各种应用。
器件信息
封装尺寸（标
V
OUT 范围
封装(1)
– 低至4.7μF COUT
器件型号
称值）
• 在省电模式下具有低输出电压纹波
• 射频友好型快速瞬态DCS-Control
• 自动转换至无纹波100% 模式
• 支持0603 电感器和0402 电感器
• 0.84mm² 尺寸的微型6 引脚0.35mm 间距WCSP
封装
TPS628436
TPS628437
TPS628438
0.4V 至0.8V
0.8V 至1.8V
1.8V 至3.6V
0.80mm ×
1.05mm ×
0.40mm
YKA
（DSBGA
，6）
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 与TPS6280x 系列(1A) 引脚对引脚兼容
2 应用
• 可穿戴电子产品
• 耳麦、耳机和耳塞
• 手机
• 医疗传感器贴片
• 助听器
TPS62843
VIN
1.8 V to 5.5 V
VOUT
0.4 V to 3.4 V
1 µH
100
95
90
85
80
75
70
65
60
VIN
SW
10
F
4.7
F
GND
VOS
EN
VSET
VOUT = 0.7V
55
V
V
OUT = 1.2V
OUT = 1.6V
50
1u
10u
100u
1m
10m
100m 500m
I
OUT [A]
典型应用
效率与输出电流间的关系曲线（电压为3.6VIN 时）
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSFU8
TPS62843
www.ti.com.cn
ZHCSLS3A –JANUARY 2022 –REVISED MAY 2023
Table of Contents
8.3 Feature Description.....................................................9
8.4 Device Functional Modes..........................................11
9 Application and Implementation..................................12
9.1 Application Information............................................. 12
9.2 Typical Application.................................................... 12
9.3 Power Supply Recommendations.............................17
9.4 Layout....................................................................... 17
10 Device and Documentation Support..........................19
10.1 Device Support....................................................... 19
10.2 接收文档更新通知................................................... 19
10.3 支持资源..................................................................19
10.4 Trademarks.............................................................19
10.5 静电放电警告.......................................................... 19
10.6 术语表..................................................................... 19
11 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings........................................ 4
7.2 ESD Ratings............................................................... 4
7.3 Recommended Operating Conditions.........................4
7.4 Thermal Information....................................................5
7.5 Electrical Characteristics.............................................5
7.6 Typical Characteristics................................................7
8 Detailed Description........................................................8
8.1 Overview.....................................................................8
8.2 Functional Block Diagram...........................................8
Information.................................................................... 20
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (January 2022) to Revision A (May 2023)
Page
• 将文档状态从“预告信息”更改为“量产数据”................................................................................................1
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLVSFU8
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5 Device Comparison Table
Fixed VOUT
Device
fSW
[MHz]
Selectable Output Voltages
Soft Start tSS
Inductor
VSET = GND
TPS628436
TPS628437
TPS628438
1.0 V
1.8 V
3.6 V
1.5
400 µs
800 µs
800 µs
1 µH
1 µH
1 µH
0.4 V –0.8 V in 25-mV steps
0.8 V –1.6 V in 50-mV steps
1.8 V –3.4 V in 100-mV steps
1.5
1.5
6 Pin Configuration and Functions
1
2
A
B
C
GND
VOS
VIN
SW
VSET
EN
图6-1. 6-Pin DSBGA YKA Package (Top View)
表6-1. Pin Functions
PIN
TYPE
DESCRIPTION
NAME
NO.
GND supply pin. Connect this pin close to the GND terminal of the input and output
capacitor.
GND
A1
PWR
VIN power supply pin. Connect the input capacitor close to this pin for best noise and voltage
spike suppression. A ceramic capacitor is required.
VIN
B1
C1
PWR
I
VSET
Connecting a resistor to GND selects a pre-defined output voltage.
Output voltage sense pin for the internal feedback divider network and regulation loop. This
pin also discharges VOUT by an internal MOSFET when the converter is disabled. Connect
this pin directly to the output capacitor with a short trace.
VOS
A2
I
The switch pin is connected to the internal MOSFET switches. Connect the inductor to this
terminal.
SW
EN
B2
C2
O
I
A high level enables the devices and a low level turns the device off. The pin features an
internal pulldown resistor, which is disabled once the device has started up.
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English Data Sheet: SLVSFU8
TPS62843
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ZHCSLS3A –JANUARY 2022 –REVISED MAY 2023
7 Specifications
7.1 Absolute Maximum Ratings
Over operating junction temperature range (unless otherwise noted) (1)
MIN
–0.3
–0.3
–2.5
–0.3
–0.3
–40
–55
MAX
UNIT
V
Pin voltage
Pin voltage
Pin voltage
Pin voltage
Pin voltage
TJ
VIN
6
SW, DC
VIN + 0.3 V
V
SW, transient < 10 ns, while switching
EN, VSET
9
6
V
V
VOS
5
V
Operating junction temperature
Storage temperature
150
150
°C
°C
Tstg
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
7.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC
JS-001 (1)
±2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per ANSI/ESDA/JEDEC
JS-002 (2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
NOM
MAX
5.5
0.6
1.2
25
UNIT
VIN
Supply voltage VIN
1.8
V
IOUT
L
Output current
A
Effective inductance
0.7
4
1.0
4.7
µH
µF
µF
pF
COUT
CIN
Effective output capacitance
Effective input capacitance
External parasitic capacitance at VSET pin
0.5
CVSET
30
Resistance range for external resistor at VSET pin (E96 1%
resistor values)
10
249
kΩ
RSET
External resistor tolerance E96 series at VSET pin
E96 resistor series temperature coefficient (TCR)
Operating junction temperature range
1%
+200
125
ppm/°C
°C
–200
–40
TJ
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English Data Sheet: SLVSFU8
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7.4 Thermal Information
THERMAL METRIC(1)
YKA (DSBGA) 6 PINS
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
147.7
1.7
RθJC(top)
RθJB
Junction-to-board thermal resistance
47.5
0.5
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJT
47.6
ψJB
RθJC(bot)
–
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
TJ = –40°C to +125°C, VIN = 1.8 V to 5.5 V. Typical values are at TJ = 25°C, VIN = 3.6 V and VOUT = 0.7 V (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
Non-switching, VEN = VIN, IOUT = 0 µA, TJ =
–40°C to 85°C
275
350
4
1500
nA
nA
nA
Operating Quiescent Current (Power Save
Mode)
IQ
Switching, VEN = VIN, IOUT = 0 µA, VOUT
0.7 V
=
VEN = 0 V, VSET = GND, TJ = –40°C to
85°C
ISD
Shutdown Current
850
UVLO
VUVLO(R)
VUVLO(F)
VUVLO(H)
VSET PIN
VSET(LKG)
VSET(H)
RSET
Undervoltage Lockout Rising Threshold
Undervoltage Lockout Falling Threshold
Undervoltage Lockout Hysteresis
VIN rising, IOUT = 0 µA
VIN falling, IOUT = 0 µA
1.75
1.65
100
1.8
1.7
V
V
mV
VSET Input leakage current
VSET High-level detection
RSET accuracy
TJ = -40°C to 85°C
10
800
nA
V
Voltage at VSET during startup
TJ = –20°C to 125°C
TJ = –40°C to 125°C
1.0
–4
4
%
%
RSET
RSET accuracy
3.5
–3.5
ENABLE
VEN(R)
EN voltage rising threshold
EN voltage falling threshold
EN Input leakage current
EN rising, enable switching
EN falling, disable switching
VEN > 0.8 V, TJ = –40°C to 85°C
EN pin to GND
0.8
V
V
VEN(F)
0.4
25
VEN(LKG)
REN;PD
1
nA
EN internal pull-down resistance
425
500
kΩ
VOUT VOLTAGE
VOUT
DC Output voltage accuracy
DC Output voltage accuracy
TPS628436
+1
+1.5
0.8
%
%
V
PWM operation, TJ = –20°C to 125°C
PWM operation, TJ = –40°C to 125°C
–1
–1.5
0.4
VOUT
VOUT
TPS628437
0.8
1.8
V
TPS628438
1.8
3.6
V
TPS628436, VEN = VIN, VVOS = 0.7 V, TJ =
–40°C to 85°C
100
250
450
nA
nA
TPS628437, VEN = VIN, VVOS = 1.2 V, TJ =
–40°C to 85°C
IVOS(LKG)
VOS input leakage current
100
TPS628438, VEN = VIN, VVOS = 3.3 V, TJ =
–40°C to 85°C
275
1.5
nA
fSW
IOUT = 400 mA
MHz
STARTUP
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7.5 Electrical Characteristics (continued)
TJ = –40°C to +125°C, VIN = 1.8 V to 5.5 V. Typical values are at TJ = 25°C, VIN = 3.6 V and VOUT = 0.7 V (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
0.45
1.0
MAX
0.6
UNIT
ms
TPS628436 soft-start time
TPS628438 soft-start time
TPS628437 soft-start time
EN HIGH to start of switching delay
From VOUT= 0% to VOUT= 95% of VOUT
nominal
tSS
1.4
0.7
1.0
tStartup_delay
POWER STAGE
RDSON(HS)
R2D = GND
330
560
µs
High-side MOSFET on-resistance
Low-side MOSFET on-resistance
Leakage Current into SW-Pin
Leakage Current into SW-Pin
VIN = 3.6 V, IOUT = 300 mA
VIN = 3.6 V, IOUT = 300 mA
170
70
0
260
115
35
mΩ
mΩ
nA
RDSON(LS)
VSW = 0.7 V, TJ = –40°C to 85°C
ILKG_SW
ILKG_SW
VSW = 1.2V, TJ = -40°C to 85°C
0
45
nA
VVIN > VSW, VSW = 3.3 V, TJ = –40°C to
85°C
Leakage Current into SW-Pin
0
45
nA
ILKG_SW
OVERCURRENT PROTECTION
IHS(OC)
High-side peak current limit
0.9
1.1
1.0
1.3
A
A
VIN ≧2.2 V
VIN ≧2.2 V
ILS(OC)
Low-side valley current limit
0.79
1.11
OUTPUT DISCHARGE
RDSCH_VOS
Output discharge resistor on VOS pin
7
22
VEN = GND, I(VOS) = –10 mA
Ω
THERMAL SHUTDOWN
TJ(SD)
Thermal shutdown threshold
Thermal shutdown hysteresis
Temperature rising
160
20
°C
°C
TJ(HYS)
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English Data Sheet: SLVSFU8
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7.6 Typical Characteristics
550
500
450
400
350
300
250
200
150
100
50
2000
1500
1000
500
0
TJ = -40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
TJ = -40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
0
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
图7-1. Shutdown Current ISD
图7-2. Quiescent Current IQ
360
TJ = -40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
330
300
270
240
210
180
150
120
90
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
图7-3. High Side Switch Drain Source Resistance
图7-4. Low Side Switch Drain Source Resistance
RDS(ON)
RDS(ON)
20
18
16
14
12
10
8
TJ = -40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
6
4
2
0
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
图7-5. VOS Discharge Switch Drain Source Resistance RDIS
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8 Detailed Description
8.1 Overview
The TPS62843 is a high-frequency, synchronous step-down converter with ultra-low quiescent current of
typically 275 nA in a 0.84-mm² chip size. The device operates with a tiny 1-μH inductor and 10-μF output
capacitor over the entire recommended operation range to provide one of the industry's smallest chip and
solution size.
Using TI's DCS-Control topology, the device extends the high efficiency operation area down to microamperes of
load current during power save mode operation. TI's DCS-Control (Direct Control with Seamless Transition into
power save mode) is an advanced regulation topology that combines the advantages of hysteretic and voltage
mode control. Characteristics of DCS-Control are excellent AC load regulation and transient response, low
output ripple voltage, and a seamless transition between PFM and PWM mode operation. DCS-Control includes
an AC loop that senses the output voltage (VOS pin) and directly feeds the information to a fast comparator
stage. This comparator sets the switching frequency, which is constant for steady state operating conditions, and
provides immediate response to dynamic load changes. To achieve accurate DC load regulation, a voltage
feedback loop is used. The internally compensated regulation network achieves fast and stable operation with
small external components and low-ESR capacitors.
8.2 Functional Block Diagram
VIN
VI
HS Limit
Device Control
and Logic
EN
Smart-Enable
UVLO
Start-up Handling
Thermal Shutdown
Power Control
Power Save Mode
Gate
PWM
Operation
VREF
Driver
Ultra Low Power
Reference
100% Mode
Resistor-to-Digital
Converter
VSET
LS Limit
VO
VOS
Direct
Control
VI
Active
Discharge
TON timer
VFB
–
+
VO
EN
DCS-Control
VREF
GND
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English Data Sheet: SLVSFU8
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8.3 Feature Description
8.3.1 Smart Enable and Shutdown (EN)
An internal 500-kΩ resistor pulls the EN pin to GND and avoids floating the pin. This action prevents an
uncontrolled start-up of the device in case the EN pin cannot be driven to low level safely. With EN low, the
device is in shutdown mode. The device is turned on with EN set to a high level. The pulldown control circuit
disconnects the pulldown resistor on the EN pin once the internal control logic and the reference have been
powered up. With EN set to a low level, the device enters shutdown mode and the pulldown resistor is activated
again.
8.3.2 Soft Start
After the device has been enabled with EN high, the device initializes and powers up its internal circuits. This
action occurs during the regulator start-up delay time, tStartup_delay. After tStartup_delay expires, the internal soft-start
circuitry ramps up the output voltage within the soft-start time, tss. See 图8-1.
The start-up delay time, tStartup_delay, varies depending on the selected VSET value. The start-up delay is
shortest with VSET = 0 and longest with VSET = 16.
EN
Device starts switching
and ramps VOUT
VOUT
tStartup_delay
tSS
图8-1. Device Start-Up
8.3.3 VSET Pin: Output Voltage Selection
The output voltage is set with a single external resistor connected between the VSET pin and GND. After the
device has been enabled and the control logic as well as the internal reference have been powered up, a R2D
(resistor-to-digital) conversion is started to detect the external resistor, RSET, within the regulator start-up delay
time, tStartup_delay. An internal current source applies current through the external resistor and an internal ADC
reads back the resulting voltage level. Depending on the level, an internal feedback divider network is selected
to set the correct output voltage. After this R2D conversion is finished, the current source is turned off to avoid
current flow through the external resistor. The circuit can detect resistive values, high-level, low-level, and a pin-
open.
For a proper reading, ensure that there is no additional current path or capacitance greater than 30 pF total to
GND during R2D conversion. Otherwise, the additional current to GND is interpreted as a lower resistor value
and a false output voltage is set. 表 8-1 lists the correct resistor values for RSET to set the appropriate output
voltages. The R2D converter is designed to operate with resistor values out of the E96 table and requires 1%
resistor value accuracy. The external resistor RSET is not a part of the regulator feedback loop and has therefore
no impact on the output voltage accuracy. Ensure that there is no other leakage path than the RSET resistor at
the VSET pin during an undervoltage lockout event. Otherwise, a false output voltage is set.
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表8-1. Output Voltage Setting
Output Voltage Setting [V]
VSET
RSET [Ω]
TPS628436
0.400
0.425
0.450
0.475
0.500
0.525
0.550
0.575
0.600
0.625
0.650
0.675
0.700
0.725
0.750
0.775
0.8
TPS628437
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.55
1.6
TPS628438
1.8
1
2
10.0 k
12.1 k
1.9
3
2.0
15.4 k
4
2.1
18.7 k
5
2.2
23.7 k
6
2.3
28.7 k
7
2.4
36.5 k
8
2.5
44.2 k
9
2.6
56.2 k
10
11
12
13
14
15
16
17
0
2.7
68.1 k
2.8
86.6 k
2.9
105.0 k
133.0 k
162.0 k
205.0 k
249.0 k or larger
VIN
3.0
3.1
3.2
3.3
3.4
1.0
1.8
3.6
GND
8.3.4 Undervoltage Lockout (UVLO)
To avoid misoperation of the device at low input voltages, an undervoltage lockout (UVLO) comparator monitors
the supply voltage. The UVLO comparator shuts down the device at an input voltage of 1.7 V (maximum) with
falling VIN. The device starts at an input voltage of 1.8 V (maximum) rising VIN. After the device re-enters
operation out of an undervoltage lockout condition, the device behaves like it does being enabled. The internal
control logic is powered up and the external resistor at the VSET pin is read out.
8.3.5 Switch Current Limit, Short-Circuit Protection
The TPS62843 integrates a current limit on the high-side and low-side MOSFETs to protect the device against
overload or short circuit conditions. The current in the switches is monitored cycle by cycle. If the high-side
MOSFET current limit, ILIMF trips, the high-side MOSFET is turned off and the low-side MOSFET is turned on to
ramp down the inductor current. After the inductor current through the low-side switch decreases beneath the
low-side MOSFET current limit, ILIMF, the low-side MOSFET is turned off and the high-side MOSFET turns on
again.
8.3.6 Thermal Shutdown
The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds the
thermal shutdown temperature, TSD, of 160°C (typical), the device enters thermal shutdown. Both the high-side
and low-side power FETs are turned off. When TJ decreases below the hysteresis amount of typically 20°C, the
converter resumes operation, beginning with a soft start to the originally set VOUT (there is no R2D conversion of
RSET). The thermal shutdown is not active in power save mode.
8.3.7 Output Voltage Discharge
The purpose of the output discharge function is to ensure a defined down-ramp of the output voltage when the
device is disabled and to keep the output voltage close to 0 V.
The internal discharge resistor is connected to the VOS pin. The discharge function is enabled as soon as the
device is disabled. The minimum supply voltage required to keep the discharge function active is VIN
VTH_UVLO-
>
.
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8.4 Device Functional Modes
8.4.1 Power Save Mode Operation
The DCS-Control topology supports power save mode operation. At light loads, the device operates in PFM
(pulse frequency modulation) mode that generates a single switching pulse to ramp up the inductor current and
recharge the output capacitor, followed by a sleep period where most of the internal circuits are shut down to
achieve the lowest operating quiescent current. During this time, the load current is supported by the output
capacitor. The duration of the sleep period depends on the load current and the inductor peak current. During
the sleep periods, the current consumption is reduced to typically 275 nA. This low quiescent current
consumption is achieved by an ultra-low power voltage reference, an integrated high impedance feedback
divider network, and an optimized power save mode operation.
In PFM mode, the switching frequency varies linearly with the load current. At medium and high load conditions,
the device enters automatically PWM (pulse width modulation) mode and operates in continuous conduction
mode with a nominal switch frequency fsw of typically 1.5 MHz. The switching frequency in PWM mode is
controlled and depends on VIN and VOUT. The boundary between PWM and PFM mode is when the inductor
current becomes discontinuous.
If the load current decreases, the converter seamlessly enters PFM mode to maintain high efficiency down to
very light loads. Because DCS-Control supports both operation modes within one single building block, the
transition from PWM to PFM mode is seamless with minimum output voltage ripple.
8.4.2 100% Mode Operation
The duty cycle of the buck converter operating in PWM mode is given as D = VOUT/VIN. The duty cycle increases
as the input voltage comes close to the output voltage. In 100% duty cycle mode, the device keeps the high-side
switch on continuously. The high-side switch stays turned on as long as the output voltage is below the internal
set point. This allows the conversion of small input to output voltage differences.
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9 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
9.1 Application Information
The following sections discuss the design of the external components to complete the power supply design for
several input and output voltage options by using typical applications as a reference.
9.2 Typical Application
VIN
VOUT
0.4 V to 3.6 V
L = 1 µH
1.8 V to 5.5 V
VIN
SW
COUT
10 µF
=
GND
VOS
CIN
4.7
=
F
EN
VSET
RSET
图9-1. TPS62843 Typical Application Circuit
9.2.1 Design Requirements
表9-1 shows the list of components for the application circuit and the characteristic application curves.
表9-1. Components for Application Characteristic Curves
Reference
Description
Value
Size Code Inch [metric L × W × T]
Manufacturer
TPS628436,
TPS628437,
TPS628438
275 nA-IQ buck converter
[1.05 mm × 0.8 mm × 0.4 mm]
TI
Ceramic capacitor
GRM155R60J475ME47D
CIN
L
0402 [1.0 mm × 0.5 mm × 0.5 mm]
0806 [2.0 mm × 1.6 mm × 1.0 mm]
0402 [1.0 mm × 0.5 mm × 0.5 mm]
0402 [1.0 mm × 0.5 mm × 0.5 mm]
Murata
Murata
Murata
4.7 μF
1 μH
Inductor DFE201610-1R0M
Ceramic capacitor
GRM155R60J106ME15D
COUT
RSET
10 μF
See voltage setting table
9.2.2 Detailed Design Procedure
Follow the passive component selection per the typical application circuit.
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9.2.3 Application Curves
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
V
V
V
V
V
V
IN = 1.8V
IN = 2.5V
IN = 3.0V
IN = 3.6V
IN = 4.2V
IN = 5.0V
V
V
V
V
V
V
IN = 1.8V
IN = 2.5V
IN = 3.0V
IN = 3.6V
IN = 4.2V
IN = 5.0V
1u
10u
100u
1m
10m
100m 500m
1u
10u
100u
1m
10m
100m 500m
I
OUT [A]
I
OUT [A]
图9-2. Efficiency at 0.4 VOUT
图9-3. Efficiency at 0.7 VOUT
95
90
85
80
75
70
65
60
55
50
45
100
95
90
85
80
75
70
65
60
55
50
V
V
V
V
V
V
IN = 1.8V
40
35
30
25
45
40
35
30
IN = 2.5V
IN = 3.0V
IN = 3.6V
IN = 4.2V
IN = 5.0V
V
V
V
V
V
IN = 2.5V
IN = 3.0V
IN = 3.6V
IN = 4.2V
IN = 5.0V
1u
10u
100u
1m
10m
100m 500m
1u
10u
100u
1m
10m
100m 500m
I
OUT [A]
I
OUT [A]
图9-4. Efficiency at 1.2 VOUT
图9-5. Efficiency at 1.8 VOUT
100
95
90
85
80
75
70
65
60
55
50
45
40
1.25
1.24
1.23
1.22
1.21
1.2
1.19
1.18
1.17
1.16
1.15
1.14
V
V
V
V
V
IN = 1.8V
IN = 2.5V
IN = 3.0V
IN = 3.6V
IN = 4.5V
VIN = 5.0V
VIN = 5.5V
V
V
V
IN = 3.6V
IN = 4.2V
IN = 5.0V
35
30
1μ
10μ
100μ
10m
100m 500m
1m
I
OUT [A]
1u
10u
100u
1m
IOUT [A]
10m
100m 500m
图9-7. Output Voltage vs Output Current at 1.2
图9-6. Efficiency at 3.3 VOUT
VOUT
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1800
1600
1400
1200
1000
800
600
400
200
0
0.72
0.71
0.7
VIN = 1.8V
VIN = 2.5V
VIN = 3.0V
VIN = 3.6V
VIN = 4.2V
VIN = 5.0V
VIN = 5.5V
V
V
V
V
V
V
V
IN = 1.8V
IN = 2.5V
IN = 3.0V
IN = 3.6V
IN = 4.5V
IN = 5.0V
IN = 5.5V
0.69
0.68
0.67
0
100
200
300
IOUT [mA]
400
500
600
700
1μ
10μ
100μ
10m
100m 500m
1m
I
OUT [A]
图9-9. Switching Frequency vs Output Current at
0.4 VOUT
图9-8. Output Voltage vs Output Current at 0.7
VOUT
图9-10. Switching Frequency vs Output Current at 图9-11. Switching Frequency vs Output Current at
0.7 VOUT
1.2 VOUT
图9-12. Switching Frequency vs Output Current at
图9-13. Typical Operation at 0.7 VOUT, 100 μA IOUT
1.8 VOUT
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图9-14. Typical Operation at 0.7 VOUT, 20 mA IOUT 图9-15. Typical Operation at 0.7 VOUT, 400 mA IOUT
图9-16. Load Transient at 0.7 VOUT, IOUT = 100 μA 图9-17. Load Transient at 0.7 VOUT, IOUT = 100 μA
to 20 mA to 400 mA
图9-18. Load Transient at 0.7 VOUT, IOUT = 5 mA to 图9-19. Load Transient at 1.2 VOUT, IOUT = 100 μA
400 mA
to 20 mA
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图9-20. Load Transient at 1.2 VOUT, IOUT = 100 μA 图9-21. Load Transient at 1.2 VOUT, IOUT = 5 mA to
to 400 mA 400 mA
图9-22. AC Load Sweep at 0.7 VOUT, IOUT = 1 mA to 图9-23. AC Load Sweep at 1.2 VOUT, IOUT = 1 mA to
600 mA 600 mA
图9-24. Line Transient at 0.7 VOUT, IOUT = 400 mA, 图9-25. Line Transient at 1.2 VOUT, IOUT = 400 mA,
VIN = 3.6 V to 4.2 V
VIN = 3.6 V to 4.2 V
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tstartup_delay
=335μs
图9-26. Shutdown, Output Discharge at 0.7 VOUT
图9-27. Start-Up Delay Time, VSET = GND
tstartup_delay
=350μs
图9-28. Start-Up Delay Time, VSET = 10 kohms
9.3 Power Supply Recommendations
The power supply must provide a current rating according to the supply voltage, output voltage, and output
current of the TPS62843.
9.4 Layout
9.4.1 Layout Guidelines
The pinout of TPS62843 has been optimized to enable a single top layer PCB routing of the IC and its critical
passive components such as CIN, COUT, and L. Furthermore, this pinout allows the user to connect tiny
components such as 0201 (0603) size capacitors and 0402 (1005) size inductors. A solution size smaller than 5
mm2 can be achieved with a fixed output voltage. As for all switching power supplies, the layout is an important
step in the design. Care must be taken in board layout to get the specified performance. Providing a low
inductance, low impedance ground path is critical. Therefore, use wide and short traces for the main current
paths. Place the input capacitor as close as possible to the VIN of the IC and GND pins. This placement is the
most critical component placement. The VOS line is a sensitive, high impedance line and must be connected to
the output capacitor and routed away from noisy components and traces (for example, the SW line) or other
noise sources.
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9.4.2 Layout Example
VOUT
GND
COUT
GND
VOS
SW
EN
CIN
L
VIN
VSET
RVSET
VIN
GND
图9-29. Layout Example
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10 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
10.1 Device Support
10.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
10.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
10.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
10.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
10.5 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
10.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
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11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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30-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS628436YKAR
TPS628437YKAR
TPS628438YKAR
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
DSBGA
YKA
YKA
YKA
6
6
6
12000 RoHS & Green
12000 RoHS & Green
12000 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
J
Samples
Samples
Samples
SNAGCU
SNAGCU
K
L
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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30-Jun-2023
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE OUTLINE
YKA0006
DSBGA - 0.4 mm max height
SCALE 12.000
DIE SIZE BALL GRID ARRAY
A
B
E
BALL A1
INDEX AREA
D
0.40
0.35
C
SEATING PLANE
0.05 C
0.18
0.13
BALL
TYP
0.35 TYP
C
B
A
0.7
TYP
SYMM
D: Max = 1.04 mm, Min = 0.98 mm
E: Max = 0.787 mm, Min =0.727 mm
0.35
TYP
1
2
0.24
6X
0.19
SYMM
0.015
C A B
4223607/B 06/2023
NanoFree Is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. NanoFreeTM package configuration.
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EXAMPLE BOARD LAYOUT
YKA0006
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.35) TYP
6X ( 0.2)
(0.35) TYP
1
2
A
B
SYMM
C
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:50X
(
0.2)
0.0325 MAX
0.0325 MIN
METAL
UNDER
METAL
SOLDER MASK
EXSPOSED
EXPOSED
METAL
SOLDER MASK
OPENING
(
0.2)
METAL
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4223607/B 06/2023
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YKA0006
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.35) TYP
6X ( 0.21)
(R0.05) TYP
1
2
A
(0.35) TYP
SYMM
B
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.075 mm - 0.1 mm THICK STENCIL
SCALE:50X
4223607/B 06/2023
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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Copyright © 2023，德州仪器 (TI) 公司
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