TPS630241 [TI]
高效 1.5A 单电感器降压/升压转换器;
| 型号： | TPS630241 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 高效 1.5A 单电感器降压/升压转换器 升压转换器 电感器 |
| 文件： | 总28页 (文件大小：2431K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
TPS63024x 高电流、高效单电感器降压-升压转换器
1 特性
3 说明
1
•
支持降压和升压运行间自动和无缝转换的实际降压
或升压运行
TPS63024 是一款高效、低静态电流降压-升压转换
器，此转换器适用于输入电压会高于或低于输出的应
用。在升压模式下，输出电流可高达 1.5A，而在降压
模式下，输出电流可高达 3A。开关内的最大平均电流
被限制在 3A（典型值）。TPS63024 根据输入电压在
降压或升压模式之间自动切换，以便在整个输入电压范
围内调节输出电压，从而确保两个模式间的无缝转换。
此降压-升压转换器基于一个使用同步整流的固定频
率、脉宽调制 (PWM) 控制器以获得最高效率。在低负
载电流情况下，此转换器进入省电模式，以便在整个负
载电流范围内保持高效率。有一个使用户能够在自动
PFM/PWM 模式运行和强制 PWM 运行之间进行选择
的 PFM/PWM 引脚。在 PWM 模式期间，通常使用一
个 2.5MHz 的固定频率。使用一个外部电阻分压器可
对输出电压进行编程，或者在芯片上对输出电压进行内
部固定。转换器可被禁用以最大限度地减少电池消耗。
在关机期间，负载从电池上断开。此器件采用 20 引
脚，1.766mm x 2.086 mm，WCSP 封装。
•
•
•
•
输入电压范围 2.3V 至 5.5V
1.5A 持续输出电流：VIN ≥ 2.5V，VOUT = 3.3V
可调和固定输出电压
在降压或升压模式中效率高达 95%，而在 VIN
=
VOUT 时，效率高达 97%
•
•
•
•
•
•
•
•
•
2.5MHz 典型开关频率
运行静态电流 35μA
集成软启动
省电模式
真正关断功能
输出电容器放电功能
过热保护和过流保护
宽电容值选择
小型 1.766mm x 2.086mm，20 引脚晶圆级芯片尺
寸 (WCSP) 封装
2 应用范围
器件信息(1)
•
•
•
•
•
手机、智能电话
平板个人电脑
器件型号
TPS63024
封装
封装尺寸（标称值）
个人电脑和智能手机配件
负载点稳压
芯片尺寸球状引脚
栅格阵列
(DSBGA) (20)
TPS630241
TPS630242
1.766mm x 2.086mm
电池供电类 应用
(1) 如需了解所有可用封装，请参阅产品说明书末尾的可订购产品
附录。
器件比较
器件编号
TPS63024
TPS630241
TPS630242
VOUT
可调节
2.9V
3.3 V
典型应用
效率与输出电流间的关系
L1
1µH
100
95
90
85
80
75
70
65
60
55
50
45
TPS63024
VIN
VOUT
L1
L2
2.5 V to 5.5 V
3.3 V up to 1.5A
VIN
EN
VOUT
C1
C2
2X22µF
FB
10µF
VINA
GND
PFM/
PWM
VIN = 2.8V, VOUT = 3.3V
V
V
V
IN = 3.3V, VOUT = 3.3V
IN = 3.6V, VOUT = 3.3V
IN = 4.2V, VOUT = 3.3V
PGND
TPS630242
100µ 1m
10m
100m
1 1.5
Output Current (A)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSCK8
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 11
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application .................................................. 14
Power Supply Recommendations...................... 21
1
2
3
4
5
6
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements................................................ 6
6.7 Typical Characteristics.............................................. 7
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 9
8
9
10 Layout................................................................... 21
10.1 Layout Guidelines ................................................. 21
10.2 Layout Example .................................................... 21
11 器件和文档支持 ..................................................... 22
11.1 器件支持 ............................................................... 22
11.2 文档支持 ............................................................... 22
11.3 相关链接................................................................ 22
11.4 商标....................................................................... 22
11.5 静电放电警告......................................................... 22
11.6 Glossary................................................................ 22
12 机械、封装和可订购信息....................................... 22
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Original (November 2014) to Revision A
Page
•
Added Specifications, Detailed Description section, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section; and, changed status to
Production Data. .................................................................................................................................................................... 4
2
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
5 Pin Configuration and Functions
WCSP
20-Pin
YFF (TOP VIEW)
E1
E2
D1
C1
C2
C3
C4
B1
B2
B3
B4
A1
A2
A3
A4
D2
E3
E4
D3
D4
Pin Functions
PIN
I/O
DESCRIPTION
NAME
VOUT
FB
NO.
A1,A2,A3
A4
PWR Buck-boost converter output
IN Voltage feedback of adjustable version, must be connected to VOUT for fixed output voltage versions
PWR Connection for Inductor
IN set low for PFM mode, set high for forced PWM mode. It must not be left floating
L2
B1,B2,B3
B4
PFM/PWM
PGND
GND
L1
C1,C2,C3
C4
PWR Power Ground
PWR Analog Ground
D1,D2,D3
D4
PWR Connection for Inductor
EN
IN
Enable input. Set high to enable and low to disable. It must not be left floating.
VIN
E1,E2,E3
E4
PWR Supply voltage for power stage
PWR Supply voltage for control stage.
VINA
6 Specifications
6.1 Absolute Maximum Ratings(1)
over junction temperature range (unless otherwise noted)
VALUE
MIN
–0.3
–0.3
–0.3
-0.3
MAX
7
UNIT
Voltage(2)
VIN, L1, EN, VINA, PFM/PWM
VOUT, FB
L2(3)
V
V
V
V
A
4
4
L2(4)
5.5
2.7
125
150
Input current
Continuos average current into L1(5)
Operating junction temperature
Storage temperature range
TJ
–40
–65
°C
Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground pin.
(3) DC voltage rating.
(4) AC transient voltage rating.
(5) Maximum continuos average input current 3.5A, under those condition do not exceed 105°C for more than 25% operating time.
Copyright © 2014, Texas Instruments Incorporated
3
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
6.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2)
±700
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions(1)
MIN
2.3
2.5
0.5
16
TYP
MAX
5.5
UNIT
V
VIN
VOUT
L
Input Voltage Range
Output Voltage
3.6
V
(2)
Inductance
1
1.3
µH
µF
°C
°C
Cout
TA
Output Capacitance(3)
Operating ambient temperature
Operating virtual junction temperature
–40
–40
85
TJ
125
(1) Refer to the Application Information section for further information
(2) Effective inductance value at operating condition. The nominal value given matches a typical inductor to be chosen to meet the
inductance required.
(3) Due to the dc bias effect of ceramic capacitors, the effective capacitance is lower then the nominal value when a voltage is applied. This
is why the capacitance is specified to allow the selection of the nominal capacitor required with the dc bias effect for this type of
capacitor. The nominal value given matches a typical capacitor to be chosen to meet the minimum capacitance required.
6.4 Thermal Information
TPS63024x
THERMAL METRIC(1)
YFF
20 PINS
53.8
0.5
UNIT
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
10.1
1.4
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
9.8
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
6.5 Electrical Characteristics
VIN=2.3V to 5.5V, TJ= –40°C to 125°C, typical values are at TA=25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY
VIN
Input voltage range
2.3
5.5
V
V
VIN_Min
Minimum input voltage to turn on into full load
VIN
Quiescent current
RLOAD= 2.2Ω
2.7
35
IOUT=0mA, EN=VIN=3.6V,
VOUT=3.3V TJ=-40°C to 85°C,
not switching
70 μA
12 μA
IQ
VOUT
Isd
Shutdown current
EN=low, TJ=-40°C to 85°C
VIN falling
0.1
1.7
70
2
2
μA
V
Under voltage lockout threshold
Under voltage lockout hysteresis
Thermal shutdown
1.6
1.2
2.5
UVLO
mV
°C
Temperature rising
140
LOGIC SIGNALS EN, PFM/PWM
VIH
High level input voltage
Low level input voltage
Input leakage current
VIN=2.3V to 5.5V
V
V
VIL
VIN=2.3V to 5.5V
0.4
Ilkg
PFM/PWM, EN=GND or VIN
0.01
0.8
0.2 μA
OUTPUT
VOUT
VFB
Output Voltage range
3.6
V
V
Feedback regulation voltage
Feedback voltage accuracy
Feedback voltage accuracy
Output voltage accuracy
Output voltage accuracy(1)
Output voltage accuracy
Output voltage accuracy(1)
TPS63024
VFB
PWM mode, TPS63024
PFM mode, TPS63024
PWM mode, TPS630241
PFM mode, TPS630241
PWM mode, TPS630242
PFM mode, TPS630242
VIN =3V; VOUT = 3.3V
VFB = 0.8V
-1%
-1%
1%
+3%
(1)
VFB
1.3%
2.9
VOUT
VOUT
VOUT
VOUT
IPWM/PFM
IFB
2.871
2.871
3.267
3.267
2.929
2.987
3.333
3.399
V
V
2.938
3.3
V
3.343
350
10
V
Output current to enter PFM mode
Feedback input bias current
High side FET on-resistance
Low side FET on-resistance
High side FET on-resistance
Low side FET on-resistance
mA
100 nA
mΩ
VIN=3.0V, VOUT=3.3V
VIN=3.0V, VOUT=3.3V
VIN=3.0V, VOUT=3.3V
VIN=3.0V, VOUT=3.3V
35
RDS_Buck(on)
50
mΩ
25
mΩ
RDS_Boost(on)
IIN
50
mΩ
VIN=3.0V, VOUT=3.3V TJ= 25°C
to 125°C
(2)
Average input current limit
2.12
3
3.54
A
fs
Switching Frequency
2.5
MHz
RON_DISC
Discharge ON-Resistance
EN=low
120
Ω
mV/
V
Line regulation
Load regulation
VIN=2.8V to 5.5V, IOUT=1.5A
7.4
2.5
mV/
A
VIN=3.6V,IOUT=0A to 1.5A
(1) Conditions: L=1 µH, COUT= 2 × 22µF.
(2) For variation of this parameter with Input voltage and temperature see Figure 8. To calculate minimum output current in a specific
working point see Figure 8 and Equation 1 trough Equation 4.
Copyright © 2014, Texas Instruments Incorporated
5
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
6.6 Timing Requirements
VIN= 2.3V to 5.5V, TJ= –40°C to 125°C, typical values are at TA= 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
OUTPUT
EN=low to high, Buck mode
VIN=3.6V, VOUT=3.3V,
IOUT=1.5A
450
µs
tSS
Softstart time
EN=low to high, Boost mode
VIN=2.8V, VOUT=3.3V,
IOUT=1.5A
700
100
µs
µs
Time from when EN=high to
when device starts switching
td
Start up delay
6
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
6.7 Typical Characteristics
.
.
60
50
40
30
20
0.016
0.012
0.008
0.004
T
= -40 ºC
= 25 ºC
= 85 ºC
A
T
A
T
A
T
= -40 ºC
= 25 ºC
= 85 ºC
A
10
0
T
A
TPS630242
T
A
2.5 2.8 3.1 3.4 3.7
4
4.3 4.6 4.9 5.2 5.5
2.5 2.8 3.1 3.4 3.7
4
4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Input Voltage (V)
Figure 1. High Side FET On-Resistance vs VIN
Figure 2. Quiescent Current vs Input Voltage
Copyright © 2014, Texas Instruments Incorporated
7
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
7 Detailed Description
7.1 Overview
The TPS63024x use 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over the complete input voltage and output
power range. To regulate the output voltage at all possible input voltage conditions, the device automatically
switches from buck operation to boost operation and back as required by the configuration. It always uses one
active switch, one rectifying switch, one switch is held on, and one switch held off. Therefore, it operates as a
buck converter when the input voltage is higher than the output voltage, and as a boost converter when the input
voltage is lower than the output voltage. There is no mode of operation in which all 4 switches are switching at
the same time. Keeping one switch on and one switch off eliminates their switching losses. The RMS current
through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses.
Controlling the switches this way allows the converter to always keep higher efficiency.
The device provides a seamless transition from buck to boost or from boost to buck operation.
7.2 Functional Block Diagram
L1
L2
VIN
VOUT
Current
Sensor
EN
PGND
PGND
PGND
VIN
Gate
Control
VOUT
_
+
_
+
VINA
Modulator
Oscillator
FB
+
-
VREF
Device
Control
PFM/PWM
EN
Temperature
Control
PGND
GND
PGND
Figure 3. Functional Block Diagram (Adjustable Output Voltage)
8
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
Functional Block Diagram (continued)
L1
L2
VIN
VOUT
Current
Sensor
EN
PGND
PGND
PGND
VIN
Gate
Control
VOUT
FB
_
+
_
+
VINA
Modulator
Oscillator
+
-
VREF
Device
Control
PFM/PWM
EN
Temperature
Control
PGND
GND
PGND
Figure 4. Functional Block Diagram (Fixed Output Voltage)
7.3 Feature Description
7.3.1 Undervoltage Lockout (UVLO)
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. UVLO shuts
down the device at input voltages lower than typically 1.7V with a 70 mV hysteresis.
7.3.2 Output Discharge Function
When the device is disabled by pulling enable low and the supply voltage is still applied, the internal transistor
use to discharge the output capacitor is turned on, and the output capacitor is discharged until UVLO is reached.
This means, if there is no supply voltage applied the output discharge function is also disabled. The transistor
which is responsible of the discharge function, when turned on, operates like an equivalent 120Ω resistor,
ensuring typically less than 10ms discharge time for 20uF output capacitance and a 3.3V output.
7.3.3 Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically 140°C.
Copyright © 2014, Texas Instruments Incorporated
9
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
Feature Description (continued)
7.3.4 Softstart
To minimize inrush current and output voltage overshoot during start up, the device has a Softstart. At turn on,
the input current raises monotonically until the output voltage reaches regulation. During Softstart, the input
current follows the current ramp charging the internal Softstart capacitor. The device smoothly ramps up the input
current bringing the output voltage to its regulated value even if a large capacitor is connected at the output.
The Softstart time is measured as the time from when the EN pin is asserted to when the output voltage has
reached 90% of its nominal value. There is typically a 100µs delay time from when the EN pin is asserted to
when the device starts the switching activity. The Softstart time depends on the load current, the input voltage,
and the output capacitor. The Softstart time in boost mode is longer then the time in buck mode. The total typical
Softstart time is 1ms.
The inductor current is able to increase and always assure a soft start unless a real short circuit is applied at the
output.
7.3.5 Short Circuit Protection
The TPS63024x provides short circuit protection to protect itself and the application. When the output voltage
does not increase above 1.2V, the device assumes a short circuit at the output and limits the input current to 3A.
10
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
7.4 Device Functional Modes
7.4.1 Control Loop Description
0.8V
Ramp and Clock
Generator
Figure 5. Average Current Mode Control
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 5 shows the
control loop.
The non inverting input of the transconductance amplifier, gmv, is assumed to be constant. The output of gmv
defines the average inductor current. The inductor current is reconstructed by measuring the current through the
high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode
the current is measured during the on time of the same MOSFET. During the off time, the current is
reconstructed internally starting from the peak value at the end of the on time cycle. The average current and the
feedback from the error amplifier gmv forms the correction signal gmc. This correction signal is compared to the
buck and the boost sawtooth ramp giving the PWM signal. Depending on which of the two ramps the gmc output
crosses either the Buck or the Boost stage is initiated. When the input voltage is close to the output voltage, one
buck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row of the same
mode are allowed. This control method in the buck-boost region ensures a robust control and the highest
efficiency.
Copyright © 2014, Texas Instruments Incorporated
11
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
Device Functional Modes (continued)
7.4.2 Power Save Mode Operation
Heavy Load transient step
PFM mode at light load
current
Comparator High
Vo+1.3%*Vo
Vo
30mV ripple
Comparator low
PWM mode
Absolute Voltage drop
with positioning
Figure 6. Power Save Mode Operation
Depending on the load current, in order to provide the best efficiency over the complete load range, the device
works in PWM mode at load currents of approximately 350 mA or higher. At lighter loads, the device switches
automatically into Power Save Mode to reduce power consumption and extend battery life. The PFM/PWM pin is
used to select between the two different operation modes. To enable Power Save Mode, the PFM/PWM pin must
be set low.
During Power Save Mode, the part operates with a reduced switching frequency and lowest supply current to
maintain high efficiency. The output voltage is monitored with a comparator at every clock cycle by the thresholds
comp low and comp high. When the device enters Power Save Mode, the converter stops operating and the
output voltage drops. The slope of the output voltage depends on the load and the output capacitance. When the
output voltage reaches the comp low threshold, at the next clock cycle the device ramps up the output voltage
again, by starting operation. Operation can last for one or several pulses until the comp high threshold is
reached. At the next clock cycle, if the load is still lower than about 350mA, the device switches off again and the
same operation is repeated. Instead, if at the next clock cycle, the load is above 350mA, the device automatically
switches to PWM mode.
In order to keep high efficiency in PFM mode, there is only one comparator active to keep the output voltage
regulated. The AC ripple in this condition is increased, compared to the PWM mode. The amplitude of this
voltage ripple in the worst case scenario is 50mV pk-pk, (typically 30mV pk-pk), with 20µF effective output
capacitance. In order to avoid a critical voltage drop when switching from 0A to full load, the output voltage in
PFM mode is typically 1.3% above the nominal value in PWM mode. This is called Dynamic Voltage Positioning
and allows the converter to operate with a small output capacitor and still have a low absolute voltage drop
during heavy load transients.
Power Save Mode is disabled by setting the PFM/PWM pin high.
12
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
Device Functional Modes (continued)
7.4.3 Current Limit
The current limit variation depends on the difference between the input and output voltage. The maximum current
limit value is at the highest difference.
Given the curves provided in Figure 8, it is possible to calculate the output current reached in boost mode, using
Equation 1 and Equation 2 and in buck mode using Equation 3 and Equation 4.
V
- V
OUT
V
IN
Duty Cycle Boost
D =
OUT
(1)
(2)
Output Current Boost
IOUT = 0 x IIN (1-D)
V
OUT
V
Duty Cycle Buck
D =
IN
IOUT = ( 0 x IIN ) / D
(3)
Output Current Buck
where
•
•
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
IIN= Minimum average input current (Figure 8)
(4)
7.4.4 Supply and Ground
The TPS63024x provides two input pins (VIN and VINA) and two ground pins (PGND and GND).
The VIN pin supplies the input power, while the VINA pin provides voltage for the control circuits. A similar
approach is used for the ground pins. GND and PGND are used to avoid ground shift problems due to the high
currents in the switches. The reference for all control functions is the GND pin. The power switches are
connected to PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND
pin.
7.4.5 Device Enable
The device starts operation when the EN pin is set high. The device enters shutdown mode when the EN pin is
set low. In shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load
is disconnected from the input.
Copyright © 2014, Texas Instruments Incorporated
13
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS63024x are high efficiency, low quiescent current buck-boost converters suitable for application where
the input voltage is higher, lower or equal to the output. Output currents can go as high as 1.5A in boost mode
and as high as 3A in buck mode. The maximum average current in the switches is limited to a typical value of
3A.
8.2 Typical Application
L1
1µH
TPS63024
VIN
VOUT
L1
L2
2.5 V to
5.5 V
3.3 V up to 1.5A
VIN
EN
VOUT
C1
C2/C3
2X22µF
R1
560k
FB
10µF
VINA
GND
PFM/
PWM
R2
180k
V
IN or GND
PGND
Figure 7. 3.3-V Adjustable Version
8.2.1 Design Requirements
The design guideline provides a component selection to operate the device within the recommended operating
conditions.
Table 1 shows the list of components for the Application Characteristic Curves.
(1)
Table 1. Components for Application Characteristic Curves
REFERENCE
DESCRIPTION
MANUFACTURER
Texas Instruments
XAL4020-102MEB, Coilcraft
Standard
TPS63024
L1
1 μH, 8.75A, 13mΩ, SMD
10 μF 6.3V, 0603, X5R ceramic
22 μF 6.3V, 0603, X5R ceramic
560kΩ
C1
C2,C3
R1
Standard
Standard
R2
180kΩ
Standard
(1) See Third-Party Products Discalimer
14
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
8.2.2 Detailed Design Procedure
The first step is the selection of the output filter components. To simplify this process Table 2 outline possible
inductor and capacitor value combinations.
8.2.2.1 Output Filter Design
Table 2. Matrix of Output Capacitor and Inductor Combinations
NOMINAL
INDUCTOR
NOMINAL OUTPUT CAPACITOR VALUE [µF](2)
VALUE [µH](1)
44
47
66
88
100
0.680
1.0
+
+
+
+
+
+
+
+
+
(3)
+
+
1.5
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and –30%.
(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by 20% and –50%.
(3) Typical application. Other check mark indicates recommended filter combinations
8.2.2.2 Inductor Selection
The inductor selection is affected by several parameter like inductor ripple current, output voltage ripple,
transition point into Power Save Mode, and efficiency. See Table 3 for typical inductors.
(1)
Table 3. List of Recommended Inductors
INDUCTOR VALUE
COMPONENT SUPPLIER
Coilcraft XAL4020-102ME
Toko, DFE322512C
SIZE (LxWxH mm)
4 X 4 X 2.10
3.2 X 2.5 X 1.2
4.4 X 4.1 X 1.2
3 X 3 X 1.2
Isat/DCR
4.5A/10mΩ
4.7A/34mΩ
4.1A/38mΩ
6.6A/42.10mΩ
5A/17.40mΩ
7.7A/36mΩ
1 µH
1 µH
1 µH
TDK, SPM4012
1 µH
Wuerth, 74438334010
Coilcraft XFL4012-601ME
Wuerth,744383340068
0.6 µH
0.68µH
4 X 4 X 1.2
3 X 3 X 1.2
(1) See Third-Party Products Desclaimer
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 6. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
V
- V
OUT
V
IN
Duty Cycle Boost
D =
OUT
(5)
Iout
η ´ (1 - D)
Vin ´ D
IPEAK
=
+
2 ´ f ´ L
where
•
•
•
•
•
D =Duty Cycle in Boost mod
ƒ = Converter switching frequency (typical 2.5MHz)
L = Inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode (6)
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 6. Possible inductors are listed in Table 3.
Copyright © 2014, Texas Instruments Incorporated
15
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
8.2.2.3 Capacitor Selection
8.2.2.3.1 Input Capacitor
At least a 10μF input capacitor is recommended to improve line transient behavior of the regulator and EMI
behavior of the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the
VIN and PGND pins of the IC is recommended. This capacitance can be increased without limit. If the input
supply is located more than a few inches from the TPS63024x converter additional bulk capacitance may be
required in addition to the ceramic bypass capacitors. An electrolytic or tantalum capacitor with a value of 47 μF
is a typical choice.
8.2.2.3.2 Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. The recommended nominal output capacitance value is 20 µF with a variance as
outlined in Table 2.
There is also no upper limit for the output capacitance value. Larger capacitors causes lower output voltage
ripple as well as lower output voltage drop during load transients.
8.2.2.4 Setting The Output Voltage
When the adjustable output voltage version TPS63024x is used, the output voltage is set by an external resistor
divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is
regulated properly, the typical value of the voltage at the FB pin is 800mV. The current through the resistive
divider should be about 10 times greater than the current into the FB pin. The typical current into the FB pin is
0.1μA, and the voltage across the resistor between FB and GND, R2, is typically 800 mV. Based on these two
values, the recommended value for R2 should be lower than 180kΩ, in order to set the divider current at 4μA or
higher. It is recommended to keep the value for this resistor in the range of 180kΩ. From that, the value of the
resistor connected between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be
calculated using Equation 7:
æ
ç
è
ö
VOUT
VFB
R1 = R2 ×
- 1
÷
ø
(7)
8.2.3 Application Curves
100
95
90
85
80
75
70
65
60
55
50
45
4.5
TA
TA
TA
= - 40 °C
TPS630242
4
=
=
25 °C
85 °C
3.5
3
2.5
2
VIN = 2.8V, VOUT = 3.3V
1.5
1
V
V
V
IN = 3.3V, VOUT = 3.3V
IN = 3.6V, VOUT = 3.3V
IN = 4.2V, VOUT = 3.3V
TPS630242
100µ 1m
0.5
2.3
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
10m
100m
1 1.5
Input Voltage (V)
Output Current (A)
VOUT = 3.3 V
PFM/PWM = Low
Figure 8. Minimum Average Input Current vs Input Voltage
Figure 9. Efficiency vs Output Current
16
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
100
90
80
70
60
50
40
30
20
10
0
TPS630242
VIN = 2.8V, VOUT = 3.3V
V
V
V
IN = 3.3V, VOUT = 3.3V
IN = 3.6V, VOUT = 3.3V
IN = 4.2V, VOUT = 3.3V
100µ
1m
10m
Output Current (A)
100m
1 1.5
PFM/PWM = High
Figure 10. Efficiency vs Output Current
100
100
TPS630241
90
TPS630241
95
90
85
80
75
70
65
60
55
50
45
80
70
60
50
40
30
VIN = 2.8V, VOUT = 2.9V
VIN = 2.8V, VOUT = 2.9V
20
10
0
V
V
V
IN = 2.9V, VOUT = 2.9V
IN = 3.6V, VOUT = 2.9V
IN = 4.2V, VOUT = 2.9V
V
V
V
IN = 2.9V, VOUT = 2.9V
IN = 3.6V, VOUT = 2.9V
IN = 4.2V, VOUT = 2.9V
100µ
1m
10m
100m
11.5
100µ
1m
10m
100m
1 1.5
Output Current (A)
Output Current (A)
PFM/PWM = High
PFM/PWM = Low
Figure 12. Efficiency vs Output Current
Figure 11. Efficiency vs Output Current
100
95
90
85
80
75
70
100
90
80
70
60
50
40
30
20
I
I
OUT = 10mA
OUT = 10mA
I
I
OUT = 200mA
= 1A
OUT = 200mA
= 1A
IOUT
IOUT = 1.5A
IOUT
IOUT = 1.5A
TPS630242
TPS630242
2.3 2.6 2.9 3.2 3.5 3.8 4.1 4.4 4.7
5
5.3 5.5
2.3 2.6 2.9 3.2 3.5 3.8 4.1 4.4 4.7
5
5.3 5.5
Input Voltage (V)
Input Voltage (V)
PFM/PWM = Low
VOUT = 3.3 V
PFM/PWM = High
VOUT = 3.3 V
Figure 13. Efficiency vs Input Voltage
Figure 14. Efficiency vs Input Voltage
Copyright © 2014, Texas Instruments Incorporated
17
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
100
100
90
80
70
60
50
40
30
20
95
90
85
80
I
I
OUT = 10mA
OUT = 10mA
I
OUT = 200mA
= 1A
I
OUT = 200mA
= 1A
75
70
IOUT
IOUT = 1.5A
IOUT
IOUT = 1.5A
TPS630241
TPS630241
2.3 2.6 2.9 3.2 3.5 3.8 4.1 4.4 4.7
5
5.3 5.5
2.3 2.6 2.9 3.2 3.5 3.8 4.1 4.4 4.7
5
5.3 5.5
Input Voltage (V)
Input Voltage (V)
PFM/PWM = Low
VOUT = 2.9 V
PFM/PWM = High
VOUT = 2.9 V
Figure 15. Efficiency vs Input Voltage
Figure 16. Efficiency vs Input Voltage
3.3050
3.3600
3.3500
3.3400
3.3300
3.3200
3.3100
3.3000
3.2900
3.2800
VIN = 2.8V
VIN = 3.3V
VIN = 3.6V
3.3000
3.2950
3.2900
3.2850
3.2800
VIN = 4.2V
VIN = 2.8V
VIN = 3.3V
VIN = 3.6V
TPS630242
VIN = 4.2V
10
TPS630242
1k 1.5k
1
100
1k 1.5k
1
10
100
Output Current (mA)
Output Current (mA)
PFM/PWM = Low
PFM/PWM = High
Figure 17. Output Voltage vs Output Current
Figure 18. Output Voltage vs Output Current
TPS630242
TPS630242
L2
L2
L1
L1
V
50mV/div
V
50mV/div
OUT_Ripple
OUT_Ripple
Time 4µs/div
Time 4µs/div
VIN = 3.3 V
IOUT = 290 mA
VIN = 2.8 V
IOUT = 16 mA
Figure 19. Output Voltage Ripple in Buck-Boost Mode
and PFM to PWM Transition
Figure 20. Output Voltage Ripple in Boost Mode and PFM
Operation
18
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
TPS630242
TPS630242
L1
L2
L2
L1
V
50mV/div
OUT_Ripple
V
50mV/div
OUT_Ripple
Time 4µs/div
Time 1µs/div
VIN = 4.2 V
IOUT = 16 mA
VIN = 2.5 V
IOUT = 1 A
Figure 21. Output Voltage Ripple in Buck Mode
and PFM Operation
Figure 22. Switching Waveforms in Boost Mode
and PWM Operation
TPS630242
TPS630242
L1
L2
L2
L1
V
50mV/div
V
10mV/div
OUT_Ripple
OUT_Ripple
Time 1µs/div
Time 1µs/div
VIN = 4.5 V
IOUT = 1 A
VIN = 3.3 V
IOUT = 1 A
Figure 23. Switching Waveforms in Buck Mode
and PWM Operation
Figure 24. Switching Waveforms in Buck-Boost Mode
and PWM Operation
TPS630242
TPS630242
Output Current
1A/div
Output Current
1A/div
Output Voltage
200mV/div, AC
Output Voltage
200mV/div, AC
Time 200µs/div
Time 200µs/div
VIN = 2.8 V
IOUT = 0 A to 1.5 A
VIN = 4.2 V
IOUT = 0 A to 1.5 A
Figure 25. Load Transient Response Boost Mode
Figure 26. Load Transient Response Buck Mode
Copyright © 2014, Texas Instruments Incorporated
19
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
TPS630242
TPS630242
Enable
2V/div, DC
Input Voltage
200mV/div,
Offset 3V
Output Voltage
1V/div, DC
Output Voltage
50mV/div
Inductor Current
500mA/div
Time 100µs/div
Time 100µs/div
VIN = from 3.5 V to 3.6 V
IOUT = 1.5 A
VIN = 2.5 V
Figure 28. Start Up After Enable
IOUT = 0 A
Figure 27. Line Transient Response
TPS630242
Enable
2V/div, DC
Output Voltage
1V/div, DC
Inductor Current
500mA/div
Time 100µs/div
VIN = 4.5 V
Figure 29. Start Up After Enable
IOUT = 0 A
20
Copyright © 2014, Texas Instruments Incorporated
TPS63024
TPS630241, TPS630242
www.ti.com.cn
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
9 Power Supply Recommendations
The TPS63024x device family has no special requirements for its input power supply. The input power supply’s
output current needs to be rated according to the supply voltage, output voltage and output current of the
TPS63024x.
10 Layout
10.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the TPS63024x devices.
•
Place input and output capacitors as close as possible to the IC. Traces need to be kept short. Routing wide
and direct traces to the input and output capacitor results in low trace resistance and low parasitic inductance.
•
•
Use a common-power GND.
The sense trace connected to FB is signal trace. Keep these traces away from L1 and L2 nodes.
10.2 Layout Example
L
GND
GND
Vout
Cin
Cout
Vin
R1
R2
Figure 30. TPS63024x Layout
版权 © 2014, Texas Instruments Incorporated
21
TPS63024
TPS630241, TPS630242
ZHCSDM2A –NOVEMBER 2014–REVISED DECEMBER 2014
www.ti.com.cn
11 器件和文档支持
11.1 器件支持
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 文档支持
11.2.1 相关文档ꢀ
相关文档如下：
《TPS63024EVM-553 用户指南，TPS63024 高电流、高效率单电感器降压-升压转换器》，SLVUA24
11.3 相关链接
下面的表格列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件，以及样片或购买的快速访
问。
表 4. 相关链接
器件
产品文件夹
请单击此处
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
请单击此处
TPS63024
TPS630241
TPS630242
11.4 商标
All trademarks are the property of their respective owners.
11.5 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
22
版权 © 2014, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS630241YFFR
TPS630241YFFT
TPS630242YFFR
TPS630242YFFT
TPS63024YFFR
TPS63024YFFT
ACTIVE
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFF
20
20
20
20
20
20
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
TPS
630241
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
YFF
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
TPS
630241
YFF
TPS
630242
YFF
TPS
630242
YFF
TPS
63024
YFF
TPS
63024
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Jun-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS630241YFFR
TPS630241YFFT
TPS630242YFFR
TPS630242YFFT
TPS63024YFFR
TPS63024YFFT
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
YFF
YFF
YFF
20
20
20
20
20
20
3000
250
180.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
1.89
1.89
1.89
1.89
1.89
1.89
2.2
2.2
2.2
2.2
2.2
2.2
0.69
0.69
0.69
0.69
0.69
0.69
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q1
Q1
Q1
Q1
3000
250
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Jun-2015
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS630241YFFR
TPS630241YFFT
TPS630242YFFR
TPS630242YFFT
TPS63024YFFR
TPS63024YFFT
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
YFF
YFF
YFF
20
20
20
20
20
20
3000
250
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
20.0
20.0
20.0
20.0
20.0
20.0
3000
250
3000
250
Pack Materials-Page 2
D: Max = 2.116 mm, Min =2.056 mm
E: Max = 1.796 mm, Min =1.736 mm
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