TPS63900DSKR [TI]
具有输入电流限制和动态电压调节功能的 1.8V 至 5.5V、75nA IQ 降压/升压转换器 | DSK | 10 | -40 to 125;
| 型号： | TPS63900DSKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有输入电流限制和动态电压调节功能的 1.8V 至 5.5V、75nA IQ 降压/升压转换器 | DSK | 10 | -40 to 125 升压转换器 |
| 文件： | 总40页 (文件大小：4239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS63900
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
TPS63900 1.8V 到5.5V，75nA IQ 降压/升压转换器，具有输入电流限制和DVS
1 特性
3 说明
• 输入电压范围：1.8V 至5.5V
• 输出电压范围：1.8V 至5V（100mV 阶跃）
– 可使用外部电阻器进行编程
TPS63900 器件是一款具有超低静态电流（典型值为
75nA）的高效同步降压/升压转换器。该器件具有 32
个用户可编程的输出电压设置，范围为1.8V 至5V。
– SEL 引脚用于在两个输出电压预设之间切换
• VI ≥2.0V、VO = 3.3V 时，输出电流> 400mA（峰
值开关电流限制典型值1.45A）
动态电压调节特性使各项应用可于运行期间在两个输出
电压之间进行切换；例如，在待机运行期间，可通过降
低系统电源电压来降低功耗。
– 可堆叠：并联多个器件以获得更高的输出电流
• 负载电流为10µA 时，效率> 90%
– 静态电流为75nA
– 60nA 关断电流
• 单模式运行
凭借其宽电源电压范围和可编程的输入电流限制
（1mA 至 100 mA 和无限制），该器件非常适合与 3
节碱性电池、1 节锂二氧化锰 (Li-MnO2) 或1 节锂亚硫
酰氯 (Li-SOCl2) 等各种一次电池以及二次电池搭配使
用。
– 无需在降压、降压/升压和升压模式之间转换
– 低输出波纹
– 出色的瞬态性能
高输出电流功能支持 sub-1GHz、BLE、LoRa、wM-
Bus 和NB-IoT 等常用射频标准。
• 安全、可靠运行的特性
– 集成软启动
器件信息
器件型号(1)
封装尺寸（标称值）
封装
– 可编程输入电流限制，具有八个设置（1mA 至
100mA 和无限制）
– 输出短路和过热保护
TPS63900
WSON (10)
2.5mm × 2.5mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 21mm2 的微小解决方案尺寸
– 小型2.2µH 电感器，单个22µF 输出电容器
– 10 引脚、2.5mm × 2.5mm、0.5mm 间距
WSON 封装
2.2 µH
VI
1.8 V to 5.5 V
VO
1.8 V to 5.0 V
LX1
VIN
LX2
VOUT
2 应用
SEL
EN
10 µF
22 µF
• 智能仪表和传感器节点
• 电子智能锁
TPS63900
• 医疗传感器贴片和患者监护仪
• 可穿戴电子产品
• 资产跟踪
CFG1
CFG2
CFG3
• 工业物联网（智能传感器）/窄带物联网
GND
简化版原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSET3
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
Table of Contents
8 Application and Implementation..................................18
8.1 Application Information............................................. 18
8.2 Typical Application.................................................... 18
9 Power Supply Recommendations................................30
10 Layout...........................................................................31
10.1 Layout Guidelines................................................... 31
10.2 Layout Example...................................................... 31
11 Device and Documentation Support..........................32
11.1 Device Support........................................................32
11.2 Documentation Support.......................................... 32
11.3 接收文档更新通知................................................... 32
11.4 支持资源..................................................................32
11.5 Trademarks............................................................. 32
11.6 静电放电警告...........................................................32
11.7 术语表..................................................................... 32
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings ....................................... 4
6.2 ESD Ratings .............................................................. 4
6.3 Recommended Operating Conditions ........................4
6.4 Thermal Information ...................................................4
6.5 Electrical Characteristics ............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description........................................................8
7.1 Overview.....................................................................8
7.2 Functional Block Diagram...........................................8
7.3 Feature Description.....................................................8
7.4 Device Functional Modes..........................................17
Information.................................................................... 32
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision C (September 2020) to Revision D (October 2020)
Page
• 将器件状态从“预告信息”更改为“量产数据”................................................................................................ 1
Copyright © 2021 Texas Instruments Incorporated
2
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
5 Pin Configuration and Functions
EN
SEL
1
10
9
VIN
2
3
4
5
LX1
Thermal
Pad
CFG1
CFG2
CFG3
8
GND
LX2
7
6
VOUT
Not to scale
图5-1. 10-Pin WSON DSK Package (Top View)
表5-1. Pin Functions
PIN
NAME
I/O
DESCRIPTION
NO.
Device enable. A high level applied to this pin enables the device and a low level disables it.
It must not be left open.
1
EN
I
I
I
I
I
Output voltage select. Selects VO(2) when a high level is applied to this pin. Selects VO(1)
when a low level is applied to this pin. It must not be left open.
2
3
4
5
SEL
Configuration pin 1. Connect a resistor between this pin and ground to set VO(2) and input
current limit, must not be left open.
CFG1
CFG2
CFG3
Configuration pin 2. Connect a resistor between this pin and ground to set VO(2) and input
current limit. Must not be left open.
Configuration pin 3. Connect a resistor between this pin and ground to set VO(1). Must not be
left open.
6
7
VOUT
LX2
Output voltage
—
—
—
—
—
—
Switching node of the boost stage
Ground
8
GND
9
LX1
Switching node of the buck stage
Supply voltage
10
—
VIN
Thermal Pad
Connect this pin to ground for correct operation.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
6 Specifications
6.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted)(1)
MIN
–0.3
–40
–65
MAX
UNIT
V
VI
Input voltage (VIN, LX1, LX2, VOUT, EN, CFG1, CFG2, CFG3, SEL)(2)
Operating junction temperature
5.9
150
150
TJ
°C
Tstg
Storage temperature
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) All voltage values are with respect to network ground terminal, unless otherwise noted.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101
or ANSI/ESDA/JEDEC JS-002(2)
±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
1.8
NOM
MAX
5.5
UNIT
V
VI
Supply voltage
VO
IO
Output voltage
1.8
5.0
V
0.4
A
Output current (VI ≥2.0 V, VO = 3.6 V)
Input capacitance (VI = 2.5 V to 5 V, VO = 3.3 V, IO = 0.4 A)(1)
Output capacitance (VI = 2.5 V to 5 V, VO = 3.3 V, IO = 0.4 A)(1)
Capacitance (CFG1, CFG2, CFG3)
Inductance
CI
5
µF
µF
pF
µH
CO
C(CFG)
L
10
10
2.2
Unlimited current setting
Inductor saturation current rating
2
1
ISAT
A
≤100-mA current settings
TA
TJ
Operating ambient temperature
Operating junction temperature
85
°C
°C
–40
–40
125
(1) Effective capacitance after DC bias effects have been considered.
6.4 Thermal Information
TPS63900
DSK Package
(WSON)
THERMAL METRIC(1)
UNIT
10 PINS
64.6
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
62.3
31.1
Junction-to-top characterization parameter
Junction-to-board characterization parameter
1.6
31.0
ψJB
Copyright © 2021 Texas Instruments Incorporated
4
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
TPS63900
DSK Package
UNIT
THERMAL METRIC(1)
(WSON)
10 PINS
RθJC(bot)
Junction-to-case (bottom) thermal resistance
10.0
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
Over operating junction temperature range and recommended supply voltage range (unless otherwise noted). Typical values
are at VI = 3.0 V, VO = 2.5 V and TJ = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY
V(EN) = 3 V, no load, not switching,
"unlimited" current setting
Quiescent current into VIN
0.075
1
µA
Shutdown current into VIN
V(EN) = 0 V
60
1.75
100
nA
V
VIT+(UVLO)
Vhys(UVLO)
VIT+(POR)
I/O SIGNALS
VIH
Positive-going UVLO threshold voltage
UVLO threshold voltage hysteresis
Positive-going POR threshold voltage
1.73
90
1.77
110
mV
V
1.37
1.74
High-level input voltage (EN, SEL)
Low-level input voltage (EN, SEL)
1.2
V
V
VIL
0.4
V(EN), V(SEL) = 1.8 V or 0 V.
TJ = 25°C
Input current (EN, SEL)
±1
±10
nA
POWER SWITCH
VI = 3 V, VO = 5 V,
test current = 1 A
Q1
Q2
Q3
155
110
110
VI = 3 V, VO = 3 V, test current = 1 A
rDS(on)
On-state resistance
mΩ
VI = 3 V, VO = 3 V,
test current = 1 A
VI = 5 V, VO = 3 V,
test current = 1 A
Q4
155
CURRENT LIMIT
VI = 3.6 V,
unlimited current limit setting
Peak current limit during Startup (Q1)
0.35
1.33
0.15
0.83
1.6
A
A
VI = 1.8 V, VO = 3.6 V,
unlimited current limit setting
1.45
0.29
Peak current limit (Q1)
VI = 3.6 V, VO = 3.3 V,
100-mA current limit setting
0.51
1-mA setting
2.5-mA setting
5-mA setting
1
2.5
5
TJ = –40°C to
10-mA settting
85°C
Average input current limit
10
mA
25-mA setting
50-mA setting
100-mA setting
25
50
100
OUTPUT
IO = 1 mA, CO(eff) = 10 µF, L(eff) = 2.2
µH
Output voltage DC accuracy
Internal reference resistor
±1.5
%
CONTROL
33
kΩ
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
Over operating junction temperature range and recommended supply voltage range (unless otherwise noted). Typical values
are at VI = 3.0 V, VO = 2.5 V and TJ = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
R2D setting #0
0
0.1
R2D setting #1
R2D setting #2
R2D setting #3
R2D setting #4
R2D setting #5
R2D setting #6
R2D setting #7
R2D setting #8
R2D setting #9
R2D setting #10
R2D setting #11
R2D setting #12
R2D setting #13
R2D setting #14
R2D setting #15
0.511
1.15
1.87
2.74
3.83
5.11
6.49
8.25
10.5
13.3
16.2
20.5
24.9
30.1
36.5
+3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
–3%
+3%
+3%
+3%
+3%
+3%
+3%
RCFG
kΩ
+3%
+3%
+3%
+3%
+3%
+3%
+3%
+3%
PROTECTION FEATURES
Thermal shutdown threshold
140
15
150
20
160
25
°C
°C
temperature
Thermal shutdown hysteresis
TIMING PARAMETERS
POR signal delay after reaching POR
threshold
td(POR)
3.8
ms
Delay between a rising edge on the EN
pin and the start of the output voltage
ramp
Supply voltage stable before EN pin
goes high
td(EN)
tw(SS)
td(SEL)
1.5
150
40
ms
µs
µs
Soft-start step duration
VO > 1.8 V
100
100
125
30
Delay between a change in the state of
the SEL pin and the first step change in
the output voltage
tw(DVS)
Dynamic voltage scaling step duration
Restart delay after protection
125
10
150
11
µs
td(RESTART)
ms
Copyright © 2021 Texas Instruments Incorporated
6
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
6.6 Typical Characteristics
0.375
0.4
0.35
0.3
-40 èC
-40 èC
25 èC
85 èC
25 èC
0.325
85 èC
0.275
0.25
0.2
0.225
0.175
0.125
0.075
0.025
0.15
0.1
0.05
0
1.8
2.3
2.8
3.3
3.8
VIN (V)
4.3
4.8
5.3
1.8
2.3
2.8
3.3
3.8
VIN (V)
4.3
4.8
5.3
VO = 5.1 V
EN = HIGH
IO = 0 mA, device
not switching
VO = 5.1 V
EN = HIGH
IO = 0 mA, device
not switching
图6-1. Quiescent Current into VIN versus Input
图6-2. Quiescent Current into VOUT versus Input
Voltage
Voltage
0.375
-40 èC
25 èC
85 èC
0.325
0.275
0.225
0.175
0.125
0.075
0.025
1.8
2.3
2.8
3.3
3.8
VIN (V)
4.3
4.8
5.3
VO = 5.1 V
EN = LOW
图6-3. Shutdown Current versus Input Voltage
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
7 Detailed Description
7.1 Overview
The TPS63900 device is a four-switch synchronous buck-boost converter with a maximum output current of 400
mA. It has a single-mode operation that allows the device to regulate the output voltage to a level above, below,
or equal to the input voltage without displaying the mode-switching transients and unpredictable inductor current
ripple from which many other buck-boost devices suffer.
The switching frequency of the TPS63900 device varies with the operating conditions: it is lowest when IO is low
and increases smoothly as IO increases.
7.2 Functional Block Diagram
EN
Enable
&
(to all blocks)
UVLO
tIL(PEAK)
t
State
Machine
Power
Stage
VOUT
Reference
Voltage
Control
Block
tVref
t
tIL(VALLEY)
t
tk‡VOt
Attenuator
Input
Current
Limit
Output
Voltage
VIN
R2D Interface
GND
7.3 Feature Description
7.3.1 Trapezoidal Current Control
图 7-1 shows a simplified block diagram of the power stage of the device. Inductor current is sensed in series
with Q1 (the peak current) and Q4 (the valley current).
Copyright © 2021 Texas Instruments Incorporated
8
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
IL(PEAK)
IL(VALLEY)
Q1
L
Q4
CI
Q2
Q3
CO
图7-1. Power Stage Simplified Block Diagram
The device uses a trapezoidal inductor current to regulate its output under all operating conditions. Thus, the
device only has one operating mode and does not display any of the mode-change transients or unpredictable
switching displayed by many other buck-boost devices.
There are four phases of operation:
• Phase A –Q1 and Q3 are on and Q2 and Q4 are off
• Phase B –Q1 and Q4 are on and Q2 and Q3 are off
• Phase C –Q2 and Q4 are on and Q1 and Q3 are off
• Phase D –Q2 and Q3 are on and Q1 and Q4 are off
图 7-2 shows the inductor current waveform when VI > VO, 图 7-3 shows the current waveform when VI = VO,
and 图7-4 shows the current waveform when VI < VO.
图 7-2 through 图 7-4 show the typical waveforms during continuous conduction mode (CCM) switching for three
operating conditions. During discontinuous conduction mode (DCM), the typical inductor current waveforms look
similar to CCM with Phase D at 0 A inductor current. In deep boost mode, where VI << VO, Phase C length
gradually decreases to zero until the switching waveform becomes triangular.
IL(PEAK)
IL(VALLEY)
0
Time
图7-2. Inductor Current Waveform when VI > VO (CCM)
IL(PEAK)
IL(VALLEY)
0
Time
图7-3. Inductor Current Waveform when VI = VO (CCM)
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
9
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
IL(PEAK)
IL(VALLEY)
0
Time
图7-4. Inductor Current Waveform when VI < VO (CCM)
The ideal relationship between VI and VO (that is, assuming no losses) is
tw A; + t
:
VO = VI F
w(B)G
tw(B) + tw(C)
(1)
where
• VI is the input voltage
• VO is the output voltage
• tw(A) is the duration of phase A
• tw(B) is the duration of phase B
• tw(C) is the duration of phase C
By varying relative duration of each phase, the device can regulate VO to be less than, equal to, or greater than
VI.
7.3.2 Device Enable / Disable
The device turns on when all the following conditions are true:
• The supply voltage is greater than the positive-going undervoltage lockout (UVLO) threshold.
• The EN pin is high.
The device turns off when at least one of the following conditions is true:
• The supply voltage is less than the negative-going UVLO threshold.
• The EN pin is low.
A complete state diagram is shown in 图7-13.
After the device turns on, the internal reference system starts, then the trimming information and the CFG pins
are read out. The device ignores any further changes to the CFG pins during device operation.
图7-5 shows the internal start-up sequence.
Copyright © 2021 Texas Instruments Incorporated
10
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
VI
VIT+(POR)
EN
ttr(SS)
t
td(POR)
ttd(EN)
t
ttlim(SS)
t
ttramp(SS)t
Internal
Sequence
Power-on
reset
Start internal
reference system
Read trim bits
Read CFG pins
VO
1.2 V
图7-5. Internal Start-Up Sequence
7.3.3 Soft Start
The device has a soft-start feature that starts the device typically with 500-mA peak current limit until VO = 1.8 V
and 500 µs elapsed when the input current limit is set to unlimited (see 节 7.3.4). Afterwards, the output voltage
ramps in a series of discrete steps (see 图7-6).
• When VO ≤1.8 V, peak current is limited to 500 mA typical for 500 µs.
• When VO > 1.8 V, each step is 100 mV high and has a duration of 125 µs.
The total soft-start ramp-up time can be calculated with Equation 2.
ms
> ?
C - 1.75 ms
tr(SS)= VO × 1.25 B
W
V
(2)
where
• tr(SS) is the rise time of the output voltage in milliseconds
• VO is the output voltage in volts
图7-6 shows a typical start-up case.
EN
VIH
ttd(EN)
t
Internal ramp
ttr(SS)t
Target voltage
0 V
Output
Voltage
图7-6. Start-Up Behavior
图7-7 illustrates the start-up step size behavior.
t125 µst
1.8 V
t100 mVt
t500 µst
Output
Voltage
图7-7. Typical Soft-Start Ramp Step Size
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
11
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表7-1 shows the typical start-up time for a number of standard output voltages.
表7-1. Typical Start-Up Times
SOFT-START RAMP- START-UP TIME
OUTPUT VOLTAGE
UP TIME (tr(SS)
)
(td(EN) + tr(SS)
)
1.8 V
2.5 V
3.3 V
5 V
0.5 ms
2 ms
1.375 ms
2.375 ms
4.5 ms
2.875 ms
3.875 ms
6 ms
If the output is prebiased –that is, the initial output voltage is not zero –the start-up behavior is as follows:
• If the prebias voltage is lower than the target voltage, the device does not start switching until the ramping
output voltage is greater than the prebias voltage (see 图7-8).
• If the prebias voltage is higher than the target voltage, the device does not start to switch until the output
voltage has decreased to the target voltage (see 图7-9). The device cannot actively discharge the output to
the target voltage and relies on the load current to discharge the output capacitor and decrease the output
voltage to the target value.
EN
VIH
ttd(EN)
t
Internal ramp
ttr(SS)t
Target voltage
Prebias voltage
Output
Voltage
Device not switching
Device switching
图7-8. Start-Up Behavior into Prebiased (Low) Output
EN
VIH
ttd(EN)
t
Internal ramp
ttr(SS)t
Prebias voltage
Target voltage
Output
Voltage
Device not switching
Device switching
图7-9. Start-Up Behavior into Prebiased (High) Output
7.3.4 Input Current Limit
The device can limit the current drawn from its supply, so that it can be used with batteries that do not support
high peak currents. The input current limit is active during normal operation and at start-up to avoid high inrush
current. The device has eight current limit settings:
• 1 mA
• 2.5 mA
• 5 mA
• 10 mA
• 25 mA
• 50 mA
Copyright © 2021 Texas Instruments Incorporated
12
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
• 100 mA
• Unlimited
CFG1 and CFG2 pins select which setting is active (see 节7.3.6).
7.3.5 Dynamic Voltage Scaling
The device has a dynamic voltage scaling function to switch between the two output voltage settings. When the
SEL pin changes state, the output voltage ramps to the new value in 100-mV steps. The duration of each step is
125 µs (see 图7-10).
The device does not actively discharge the output capacitor, when the output voltage ramps to a lower level.
This leads to a longer output voltage settling time when light load is applied (see 图 7-11). The settling time can
be calculated with Equation 3.
VO(HIGH) F VO(LOW)
tsettle= CO ×
IO
(3)
SEL
SEL
ttd(SEL)
t
ttd(SEL)t
VO(1)
VO(1)
Output
Voltage
Output
Voltage
VO(2)
VO(2)
ttw(DVS)
t
ttw(DVS)t
t100 mVt
图7-11. Dynamic Voltage Scaling with Light Load
图7-10. Dynamic Voltage Scaling with High Load
7.3.6 Device Configuration (Resistor-to-Digital Interface)
The device has three configuration pins (CFG1, CFG2, and CFG3) that control its operation. When the device
starts up, a resistor-to-digital (R2D) interface reads the values of the configuration resistors on the CFG pins and
transfers the setting to an internal configuration register (see 图7-12).
• CFG1 and CFG2 set VO(2) level and the input current limit.
• CFG3 sets VO(1) level.
To reduce power consumption, the device reads the value of the resistors connected to the configuration pins
during start-up and then disables these pins. Once the device has started to operate, changes to the
configuration pins have no effect.
VIN
CFG[4:0]
RCFG1
RCFG2
RCFG3
CFG1
CFG2
CFG3
33 kΩ
To DVS
CFG[11:8]
12-Bit
Configuration
Register
4
MUX
ADC
To input
current
limit
CFG[7:5]
2
图7-12. Resistor-to-Digital Interface Block Diagram
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
13
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表 7-2 summarizes the resistor values needed to configure the device for different input current limit and output
voltage (SEL = high) settings. For correct operation, use resistors with a tolerance of ±1% or better and a
temperature coefficient of ±200 ppm or better.
Note
For correct operation, TI recommends that the total RMS error of the configuration resistors—including
initial tolerance, temperature drift, and ageing—is less than ±3%.
表7-2. Input Current Limit and Output Voltage (SEL = High) Settings
OUTPUT VOLTAGE -
VO(2)
INPUT CURRENT LIMIT
UNLIMITED
100 mA
50 mA
25 mA
10 mA
5 mA
2.5 mA
1 mA
(SEL = HIGH)
RCFG1
0 Ω
1.8 V
RCFG2
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
8.25 kΩ
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
511 Ω
10.5 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
1.15 kΩ
13.3 kΩ
1.87 kΩ
2.74 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
3.83 kΩ
24.9 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
5.11 kΩ
30.1 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
6.49 kΩ
36.5 kΩ
RCFG1
511 Ω
1.87 kΩ 2.74 kΩ
1.15 kΩ
1.87 kΩ 2.74 kΩ
1.87 kΩ
1.87 kΩ 2.74 kΩ
2.74 kΩ
1.87 kΩ 2.74 kΩ
3.83 kΩ
1.87 kΩ 2.74 kΩ
5.11 kΩ
1.87 kΩ 2.74 kΩ
6.49 kΩ
1.87 kΩ 2.74 kΩ
8.25 kΩ
1.87 kΩ 2.74 kΩ
10.5 kΩ
1.87 kΩ 2.74 kΩ
13.3 kΩ
1.87 kΩ 2.74 kΩ
16.2 kΩ
1.87 kΩ 2.74 kΩ
20.5 kΩ
1.87 kΩ 2.74 kΩ
24.9 kΩ
1.87 kΩ 2.74 kΩ
30.1 kΩ
1.87 kΩ 2.74 kΩ
36.5 kΩ
1.87 kΩ 2.74 kΩ
1.9 V
RCFG2
RCFG1
2.0 V
RCFG2
RCFG1
2.1 V
RCFG2
RCFG1
2.2 V
RCFG2
RCFG1
2.3 V
RCFG2
RCFG1
2.4 V
RCFG2
RCFG1
2.5 V
RCFG2
RCFG1
2.6 V
RCFG2
RCFG1
2.7 V
RCFG2
RCFG1
2.8 V
RCFG2
RCFG1
2.9 V
RCFG2
RCFG1
3.0 V
RCFG2
RCFG1
3.1 V
RCFG2
RCFG1
3.2 V
RCFG2
RCFG1
3.3 V
RCFG2
RCFG1
0 Ω
3.4 V
RCFG2
16.2 kΩ
20.5 kΩ
Copyright © 2021 Texas Instruments Incorporated
14
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表7-2. Input Current Limit and Output Voltage (SEL = High) Settings (continued)
OUTPUT VOLTAGE -
VO(2)
INPUT CURRENT LIMIT
UNLIMITED
100 mA
50 mA
25 mA
10 mA
5 mA
2.5 mA
1 mA
(SEL = HIGH)
RCFG1
511 Ω
3.5 V
RCFG2
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
8.25 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
10.5 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
13.3 kΩ
16.2 kΩ
20.5 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
24.9 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
30.1 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
36.5 kΩ
RCFG1
1.15 kΩ
3.6 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
1.87 kΩ
3.7 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
2.74 kΩ
3.8 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
3.83 kΩ
3.9 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
5.11 kΩ
4.0 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
6.49 kΩ
4.1 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
8.25 kΩ
4.2 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
10.5 kΩ
4.3 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
13.3 kΩ
4.4 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
16.2 kΩ
4.5 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
20.5 kΩ
4.6 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
24.9 kΩ
4.7 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
30.1 kΩ
4.8 V
RCFG2
16.2 kΩ
20.5 kΩ
RCFG1
36.5 kΩ
5.0 V
RCFG2
16.2 kΩ
20.5 kΩ
表 7-3 summarizes the resistor values needed to configure the device for different output voltage (SEL = low)
settings. For correct operation, use resistors with a tolerance of ±1% or better and a temperature coefficient of
better than ±200 ppm.
表7-3. Output Voltage (SEL Pin = Low) Settings
OUTPUT VOLTAGE - VO(1)
RCFG3
(SEL = LOW)
1.8 V
2.0 V
2.1 V
2.2 V
2.3 V
0 Ω
511 Ω
1.15 kΩ
1.87 kΩ
2.74 kΩ
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表7-3. Output Voltage (SEL Pin = Low) Settings
(continued)
OUTPUT VOLTAGE - VO(1)
RCFG3
(SEL = LOW)
2.4 V
3.83 kΩ
5.11 kΩ
6.49 kΩ
8.25 kΩ
10.5 kΩ
13.3 kΩ
16.2 kΩ
20.5 kΩ
24.9 kΩ
30.1 kΩ
36.5 kΩ
2.5 V
2.6 V
2.7 V
2.8 V
3.0 V
3.3 V
3.6 V
4.0 V
4.5 V
5.0 V
7.3.7 SEL Pin
The SEL pin selects which configuration bits control the output voltage.
• When SEL = high, the output voltage VO(2) is set.
• When SEL = low, the output voltage VO(1) is set.
7.3.8 Short-Circuit Protection
7.3.8.1 Current Limit Setting = 'Unlimited'
The device has a inbuilt short circuit protection function to limit the current through Q1. The maximum current
that flows is limited by the peak current limit. The output voltage decreases if the load is higher than the peak
current limit. If the output voltage falls below 1.25 typically, the short circuit protection is activated. With short
circuit protection activated the input current is limited to 26 mA on average.
The device automatically restarts to normal operation after the short condition is removed.
7.3.8.2 Current Limit Setting = 1 mA to 100 mA
The input current limiting function automatically limits current during a short-circuit condition. The device
regulates the average input current for as long as the short-circuit condition exists. If the output voltage falls
below 1.25 V typically, the short circuit protection is activated. For input current limit settings of 100 mA, 50 mA
and 25 mA, the short circuit protection limits the input current to 26 mA on average. For input current limit setting
of 10 mA, 5 mA, 2.5 mA, and 1 mA, the short circuit protection limits the input current to slightly above the typical
values for each setting. 表7-4 shows the typical short circuit currents for each input current limit setting.
The device automatically restarts to previous operation after the short condition is removed.
表7-4. Typical Input Current During Short Circuit Condition (VO < 1.25 V Typically) for All Input Current
Limit Settings
INPUT CURRENT LIMIT SETTING
TYPICAL SHORT CIRCUIT INPUT CURRENT
1 mA
2.5 mA
5 mA
1.2 mA
2.8 mA
5.2 mA
12 mA
26 mA
26 mA
26 mA
10 mA
25 mA
50 mA
100 mA
Copyright © 2021 Texas Instruments Incorporated
16
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表7-4. Typical Input Current During Short Circuit Condition (VO < 1.25 V Typically) for All Input Current
Limit Settings (continued)
INPUT CURRENT LIMIT SETTING
TYPICAL SHORT CIRCUIT INPUT CURRENT
Unlimited
26 mA
7.3.9 Thermal Shutdown
The device has a thermal shutdown function that disables the device if it gets too hot for correct operation. When
the device cools down, it automatically restarts operation after a typical delay of td(RESTART) = 10 ms. The device
starts with the soft-start feature (see 节7.3.3) and keeps the previously read CFG pin setting.
7.4 Device Functional Modes
The device has two functional modes: on and off. The device enters the on mode when the voltage on the VIN
pin is higher than the UVLO threshold and a high logic level is applied to the EN pin. The device enters the off
mode when the voltage on the VIN pin is lower than the UVLO threshold or a low logic level is applied to the EN
pin.
on
EN pin = high &&
VI > VIT+
EN pin = low ||
VI < VITœ
off
图7-13. Device Functional Modes
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
17
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
8 Application and Implementation
Note
以下应用部分的信息不属于TI 组件规范，TI 不担保其准确性和完整性。客户应负责确定 TI 组件是否适
用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The TPS63900 is a high efficiency, non-inverting buck-boost converter with an extremely low quiescent current,
suitable for applications that need a regulated output voltage from an input supply that can be higher or lower
than the output voltage. The input current limit and output voltage are set through resistors connected to the
three CFGx pins.
8.2 Typical Application
L1
LX1
LX2
VO
3.3 V, 400 mA
1.8 V to 5.5 V
VIN
VOUT
10 µF
22 µF
CFG1
CFG2
CFG3
36.5 kΩ
To/from
system
EN
SEL
GND
图8-1. 3.3 VOUT Typical Application
8.2.1 Design Requirements
The design guideline provides a component selection to operate the device within 节6.3.
表8-1. Matrix of Output Capacitor and Inductor Combinations
NOMINAL OUTPUT CAPACITOR VALUE [µF](2)
NOMINAL INDUCTOR
VALUE [µH](1)
10
22
47
100
≥300
(3)
(4)
(5)
2.2
+
+
+
+
+
(1) Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and –30%.
(2) Capacitance tolerance and DC bias voltage derating is anticipated. The effective capacitance can vary by 20% and –50%.
(3) Output voltage ripple increases versus typical application.
(4) Typical application. Other check marks indicate possible filter combinations.
(5) Start-up time increased.
8.2.2 Detailed Design Procedure
The first step is the selection of the output filter components. To simplify this process, 节 6.3 outlines minimum
and maximum values for inductance and capacitance. Tolerance and derating must be taken into account when
selecting nominal inductance and capacitance.
8.2.2.1 Custom Design with WEBENCH Tools
Click here to create a custom design using the TPS63900 device with the WEBENCH® Power Designer.
1. Start by entering your VIN, VOUT and IOUT requirements.
Copyright © 2021 Texas Instruments Incorporated
18
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
2. Optimize your design for key parameters like efficiency, footprint or cost using the optimizer dial and
compare this design with other possible solutions from Texas Instruments.
3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real
time pricing and component availability.
4. In most cases, you will also be able to:
• Run electrical simulations to see important waveforms and circuit performance,
• Run thermal simulations to understand the thermal performance of your board,
• Export your customized schematic and layout into popular CAD formats,
• Print PDF reports for the design, and share your design with colleagues.
5. Get more information about WEBENCH tools at www.ti.com/webench.
8.2.2.2 Inductor Selection
The inductor selection is affected by several parameters such as inductor ripple current, output voltage ripple,
transition point into Power Save Mode, and efficiency. See 表8-2 for typical inductors.
For high efficiencies, the inductor must have a low DC resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the core and conduction losses of the converter. Conversely,
larger inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak
current for the inductor in steady state operation is calculated using Equation 5. Only the equation which defines
the switch current in boost mode is shown, because this provides the highest value of current and represents the
critical current value for selecting the right inductor.
V
- V
IN
OUT
V
Duty Cycle Boost
D =
OUT
(4)
(5)
Iout
η ´ (1 - D)
Vin ´ D
IPEAK
=
+
2 ´ f ´ L
where:
• D = Duty Cycle in Boost mode
• f = Converter switching frequency
• L = Inductor value
• η= Estimated converter efficiency (use the number from the efficiency curves or 0.9 as an assumption)
Note
The calculation must be done for the minimum input voltage in boost mode.
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It is recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 5. Possible inductors are listed in 表8-2.
表8-2. List of Recommended Inductors
INDUCTOR SATURATION CURRENT
PART NUMBER
MANUFACTURER
SIZE (LxWxH
mm)
DCR [mΩ]
VALUE [µH](1)
[A]
3.5
1.7
3.1
2.4
2.2
2.2
2.2
2.2
21
72
XFL4020-222ME
SRN3015TA-2R2M
DFE252010F-2R2M
DFE201612E-2R2M
Coilcraft
Bourns
Murata
Murata
4 x 4 x 2
3 x 3 x 1.5
97
2.5 x 2 x 1
116
2.0 x 1.6 x 1.2
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
19
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表8-2. List of Recommended Inductors (continued)
INDUCTOR SATURATION CURRENT
PART NUMBER
MANUFACTURER
SIZE (LxWxH
mm)
DCR [mΩ]
VALUE [µH](1)
[A]
2.2
2.0
190
DFE201210U-2R2M
Murata
2.0 x 1.2 x 1.0
(1) See the Third-party Products Disclaimer.
8.2.2.3 Output Capacitor Selection
For the output capacitor, use of small ceramic capacitors placed as close as possible to the VOUT and GND pins
of the IC is recommended. The recommended nominal output capacitor value is a single 22 µF. If, for any
reason, the application requires the use of large capacitors which cannot be placed close to the IC, use a
smaller ceramic capacitor in parallel to the large capacitor. The small capacitor must be placed as close as
possible to the VOUT and GND pins of the IC.
It is important that the effective capacitance is given according to the recommended value in 节 6.3. In general,
consider DC bias effects resulting in less effective capacitance. The choice of the output capacitance is mainly a
tradeoff between size and transient behavior as higher capacitance reduces transient response overshoot and
undershoot and increases transient response time. Possible output capacitors are listed in 表8-3.
There is no upper limit for the output capacitance value.
At light load currents the output voltage ripple is dependent on the output capacitor value. Larger output
capacitors reduce the output voltage ripple. The leakage current of the output capacitor adds to the overall
quiescent current.
表8-3. List of Recommended Capacitors
CAPACITOR
VALUE [µF](1)
VOLTAGE RATING [V]
PART NUMBER
MANUFACTURER
SIZE (METRIC)
22
22
47
6.3
6.3
6.3
GRM187R60J226ME15
GRM219R60J476ME44
GRM188R60J476ME15
Murata
Murata
Murata
0603 (1608)
0805 (3210)
0603 (1608)
(1) See Third-party Products Disclaimer.
8.2.2.4 Input Capacitor Selection
A 10-µF input capacitor is recommended to improve line transient behavior of the regulator and EMI behavior of
the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the VIN and GND
pins of the IC is recommended. This capacitance can be increased without limit. If the input supply is located
more than a few inches from the TPS63900 converter additional bulk capacitance can be required in addition to
the ceramic bypass capacitors. An electrolytic or tantalum capacitor with a value of 47 µF is a typical choice.
When operating from a high impedance source, a larger input buffer capacitor is recommended to avoid voltage
drops during start-up and load transients.
The input capacitor can be increased without any limit for better input voltage filtering. The leakage current of the
input capacitor adds to the overall quiescent current.
表8-4. List of Recommended Capacitors
CAPACITOR
VALUE [µF](1)
VOLTAGE RATING [V]
PART NUMBER
MANUFACTURER
SIZE (METRIC)
10
10
22
6.3
10
GRM188R60J106ME47
GRM188R61A106ME69
GRM187R60J226ME15
Murata
Murata
Murata
0603 (1608)
0603 (1608)
0603 (1608)
6.3
(1) See Third-party Products Disclaimer.
8.2.2.5 Setting The Output Voltage
The output voltage is set with CFGx pins (see 节7.3.6).
Copyright © 2021 Texas Instruments Incorporated
20
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
8.2.3 Application Curves
表8-5. Components for Application Characteristic Curves for VOUT = 3.3 V
REFERENCE(1)
DESCRIPTION(2)
PART NUMBER
MANUFACTURER
U1
L1
400-mA ultra low Iq Buck-Boost Converter (2.5 TPS63900DSK
mm x 2.5 mm QFN)
Texas Instruments
2.2 µH, 2.5 mm x 2 mm x 1.2 mm, 3.3 A, 82
DFE252012F-2R2M
Murata
mΩ
C1
10 µF, 0603, Ceramic Capacitor, ±20%, 6.3 V
22 µF, 0603, Ceramic Capacitor, ±20%, 6.3 V
36.5 kΩ, 0603 Resistor, 1%, 100 mW
0 Ω, 0603 Resistor, 1%, 100 mW
GRM188R60J106ME47
GRM187R60J226ME15
Standard
Murata
C2
Murata
CFG1
CFG2
CFG3
Standard
Standard
Standard
Standard
Standard
0 Ω, 0603 Resistor, 1%, 100 mW
(1) See Third-Party Products Discalimer
(2) For other output voltages, refer to 表8-1 for resistor values.
表8-6. Typical Characteristics Curves
PARAMETER
Output Current Capability
CONDITIONS
FIGURE
Typical Output Current Capability versus Input Voltage
VO = 1.8 V to 5.0 V
图8-2
Switching Frequency
Typical Burst Switching Frequency versus Output Current VI = 3.3 V, VO = 1.8 V to 5.0 V
Typical Burst Switching Frequency versus Output Current VI = 2.0 V, VO = 1.8 V to 5.0 V
Typical Burst Switching Frequency versus Output Current VI = 5.2 V, VO = 1.8 V to 5.0 V
Efficiency
图8-3
图8-4
图8-5
Efficiency versus Output Current
Efficiency versus Output Current
Efficiency versus Output Current
VI = 1.8 V to 5.5 V, VO = 1.8 V
VI = 1.8 V to 5.5 V, VO = 3.3 V
VI = 1.8 V to 5.5 V, VO = 5.0 V
图8-6
图8-7
图8-8
图8-9
Efficiency versus Input Voltage
Switching Waveforms
IO = 1 μA to 400 mA, VO = 3.3 V
Switching Waveforms, Boost Operation
Switching Waveforms, Boost Operation
Switching Waveforms, Buck-Boost Operation
Switching Waveforms, Buck Operation
Output Voltage Ripple
VI = 1.8 V, VO = 3.3 V
VI = 2.8 V, VO = 3.3 V
VI = 3.3 V, VO = 3.3 V
VI = 4.0 V, VO = 3.3 V
图8-10
图8-11
图8-12
图8-13
Output Voltage Ripple
VI = 2.0 V, VO = 1.8 V to 5.0 V
VI = 3.3 V, VO = 1.8 V to 5.0 V
VI = 5.2 V, VO = 1.8 V to 5.0 V
VI = 3.3 V, VO = 3.6 V
图8-14
图8-15
图8-16
图8-17
Output Voltage Ripple
Output Voltage Ripple
Output Voltage Ripple over Temperature
Regulation Accuracy
Load Regulation
VO = 3.3 V
图8-18
图8-19
Line Regulation
VI = 1.8 V to 5.0 V, Load = 1 mA
Transient Performance
Line Transient, Light Load
Line Transient, High Load
Load Transient, 100 mA Step
Load Transient, 100 mA Step
Load Transient, 100 mA Step
VI = 2.5 V to 4.2 V, VO = 3.3 V, Load = 1 mA
VI = 2.5 V to 4.2 V, VO = 3.3 V, Load = 100 mA
VI = 1.8 V, VO = 3.3 V, Load = 0 mA to 100 mA
VI = 3.3 V, VO = 3.3 V, Load = 0 mA to 100 mA
VI = 1.8 V, VO = 3.3 V, Load = 0 mA to 100 mA
图8-20
图8-21
图8-22
图8-23
图8-24
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
21
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
表8-6. Typical Characteristics Curves (continued)
PARAMETER
Load Transient, 300 mA Step
CONDITIONS
FIGURE
图8-25
图8-26
图8-27
VI = 3.3 V, VO = 1.8 V, Load = 0 mA to 300 mA
VI = 3.3 V, VO = 3.3 V, Load = 0 mA to 300 mA
VI = 5.5 V, VO = 3.3 V, Load = 0 mA to 300 mA
Load Transient, 300 mA Step
Load Transient, 300 mA Step
Start-up
Start-up Behavior from Rising Enable
Start-up Behavior from Rising Enable
Start-up Behavior from Rising Enable
Start-up Behavior from Rising Enable
ICL (Input Current Limit)
Start-up with 1 mA ICL
VI = 3.3 V, VO = 3.3 V, Load = 100 mA
VI = 1.8 V, VO = 1.8 V, Load = 10 μA
VI = 1.8 V, VO = 5.0 V, Load = 10 μA
VI = 1.8 V, VO = 5.0 V, Load = 1000 μF
图8-28
图8-29
图8-30
图8-31
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
VI = 3.3 V, VO = 3.3 V, CO = 300 μF
图8-32
图8-33
图8-34
图8-35
图8-36
图8-37
图8-38
Start-up with 2.5 mA ICL
Start-up with 5 mA ICL
Start-up with 10 mA ICL
Start-up with 25 mA ICL
Start-up with 50 mA ICL
Start-up with 100 mA ICL
Short Circuit Behavior
Short Circuit Behavior
VI = 3.3 V, VO = 1.8 V
VI = 3.3 V, VO = 3.3 V
VI = 3.3 V, VO = 5.0 V
图8-39
图8-40
图8-41
Short Circuit Behavior
Short Circuit Behavior
DVS (Digital Voltage Scaling)
DVS Behavior at Light Load
DVS Behavior at High Load
VI = 3.3 V, VO(1) = 2.2 V, VO(2) = 3.6 V, Load = 1 kΩ
VI = 3.3 V, VO(1) = 2.2 V, VO(2) = 3.6 V, Load = 30 Ω
图8-42
图8-43
Copyright © 2021 Texas Instruments Incorporated
22
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
2000000
1000000
1.2
1.1
1
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
100000
10000
1000
0.9
0.8
0.7
0.6
0.5
0.4
100
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
10
2
1E-6
1E-5
0.0001
0.001
IO (A)
0.01
0.10.2 0.5
0.3
1.8
2.3
2.8
3.3 3.8
Input Voltage (V)
4.3
4.8
5.3
VI = 3.3 V
TA = 25°C
TA = 25°C
图8-3. Typical Burst Switching Frequency versus
Output Current
图8-2. Typical Output Current Capability versus
Input Voltage
2000000
2000000
1000000
100000
10000
1000
1000000
100000
10000
1000
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
100
100
10
2
10
2
1E-6
1E-5
0.0001
0.001
IO (A)
0.01
0.10.2 0.5
1E-6
1E-5
0.0001
0.001
IO (A)
0.01
0.10.2 0.5
VI = 2.0 V
TA = 25°C
VI = 5.2 V
TA = 25°C
图8-4. Typical Burst Switching Frequency versus 图8-5. Typical Burst Switching Frequency versus
Output Current Output Current
100
90
80
70
60
50
40
100
90
80
70
60
50
40
VI = 1.8 V
VI = 1.8 V
VI = 2.5 V
VI = 3.0 V
VI = 3.3 V
VI = 3.6 V
VI = 5.0 V
VI = 2.5 V
VI = 3.0 V
VI = 3.3 V
VI = 3.6 V
VI = 5.0 V
1 m
10 m
100 m
1 m
Output Current (A)
10 m
0.1
1
1 m
10 m
100 m
1 m
Output Current (A)
10 m
0.1
1
VO = 1.8 V
TA = 25°C
VO = 3.3 V
TA = 25°C
图8-6. Efficiency versus Output Current
图8-7. Efficiency versus Output Current
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
23
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
100
90
100
90
80
70
60
50
40
80
70
IO = 1 mA
IO = 2 mA
VI = 1.8 V
VI = 2.5 V
VI = 3.0 V
VI = 3.3 V
VI = 3.6 V
VI = 5.0 V
IO = 5 mA
60
IO = 10 mA
IO = 100 mA
IO = 100 mA
IO = 400 mA
50
40
1.8
2.2
2.6
3
3.4
Input Voltage (V)
3.8
4.2
4.6
5
1 m
10 m
100 m
1 m
Output Current (A)
10 m
0.1
1
VO = 3.3 V
TA = 25°C
VO = 5.0 V
TA = 25°C
图8-9. Efficiency versus Input Voltage
图8-8. Efficiency versus Output Current
VI = 1.8 V, VO = 3.3 V
No load
VI = 2.8 V, VO = 3.3 V
No load
图8-10. Switching Waveforms, Boost Operation
图8-11. Switching Waveforms, Boost Operation
VI = 4.0 V, VO = 3.3 V
No load
VI = 3.3 V, VO = 3.3 V
No load
图8-13. Switching Waveforms, Buck Operation
图8-12. Switching Waveforms, Buck-Boost
Operation
Copyright © 2021 Texas Instruments Incorporated
24
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
0.01
1 m
10 m
100 m 1 m
Output Current (A)
10 m
TA = 25°C
0.1
1 m
10 m
100 m 1 m
Output Current (A)
10 m
0.1
VI = 2.0 V
VI = 3.3 V
TA = 25°C
图8-14. Output Voltage Ripple
图8-15. Output Voltage Ripple
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
VO = 3.6 V, TA = -40 èC
VO = 3.6 V, TA = 25 èC
VO = 3.6 V, TA = 85 èC
0.01
1 m
10 m
100 m 1 m
Output Current (A)
10 m
TA = 25°C
0.1
1 m
10 m
100 m
1 m
Output Current (A)
10 m
0.1
VI = 5.2 V
VI = 3.3 V, VO = 3.6 V
图8-16. Output Voltage Ripple
图8-17. Output Voltage Ripple over Temperature
0.3
0.1
1.6
VO = 1.8 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
VO = 2.5 V
VO = 3.3 V
VO = 3.6 V
VO = 5.0 V
1.2
0.8
0.4
0
-0.1
-0.3
-0.5
-0.7
-0.9
-0.4
-0.8
-1.1
0
0.1
0.2 0.3
Output Current (A)
0.4
TA = 25°C
0.5
1.8
2.2
2.6
3
3.4
Input Voltage (V)
3.8
4.2
4.6
5
VO = 3.3 V
VI = 1.8 V to 5.0 V
Load = 1 mA, TA = 25°C
图8-18. Load Regulation
图8-19. Line Regulation
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
25
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
VI = 2.5 V to 4.2 V, VO = 3.3V
Load = 1 mA
VI = 2.5 V to 4.2 V, VO = 3.3 V
Load = 100 mA
图8-20. Line Transient, Light Load
图8-21. Line Transient, High Load
VI = 3.3 V, VO = 1.8 V
Load = 0 mA to 100 mA, tr/tf =
1 μs
VI = 1.8 V, VO = 3.3 V
Load = 0 mA to 100 mA, tr/tf =
1 μs
图8-23. Load Transient, 100 mA Step
图8-22. Load Transient, 100 mA Step
VI = 3.3 V, VO = 1.8 V
Load = 0 mA to 300 mA, tr/tf =
VI = 3.3 V, VO = 3.3 V
Load = 0 mA to 100 mA, tr/tf =
1 μs
1 μs
图8-25. Load Transient, 300 mA Step
图8-24. Load Transient, 100 mA Step
Copyright © 2021 Texas Instruments Incorporated
26
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
VI = 3.3 V, VO = 3.3 V
Load = 0 mA to 300 mA, tr/tf =
VI = 5.5 V, VO = 3.3 V
Load = 0 mA to 300 mA, tr/tf =
1 μs
1 μs
图8-26. Load Transient, 300 mA Step
图8-27. Load Transient, 300 mA Step
VI = 1.8 V, VO = 1.8 V
10-μA resistive load
图8-29. Start-up Behavior from Rising Enable
VI = 3.3 V, VO = 3.3 V
100-mA resistive load
图8-28. Start-up Behavior from Rising Enable
VI = 3.3 V, VO = 3.3 V
1000-μF capacitive load
图8-31. Start-up Behavior from Rising Enable
VI = 1.8 V, VO = 5.0 V
10-μA resistive load
图8-30. Start-up Behavior from Rising Enable
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
27
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
VI = 3.3 V, VO = 3.3 V
VI = 3.3 V, VO = 3.3 V
CI = 32 μF, CO = 300 μF
CI = 32 μF, CO = 300 μF
CI = 32 μF, CO = 300 μF
CI = 32 μF, CO = 300 μF
图8-32. Start-up with 1-mA ICL
图8-33. Start-up with 2.5-mA ICL
VI = 3.3 V, VO = 3.3 V
VI = 3.3 V, VO = 3.3 V
CI = 32 μF, CO = 300 μF
图8-34. Start-up with 5-mA ICL
图8-35. Start-up with 10-mA ICL
VI = 3.3 V, VO = 3.3 V
VI = 3.3 V, VO = 3.3 V
CI = 32 μF, CO = 300 μF
图8-36. Start-up with 25-mA ICL
图8-37. Start-up with 50-mA ICL
Copyright © 2021 Texas Instruments Incorporated
28
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
VI = 3.3 V, VO = 1.8 V
TA = 25°C
VI = 3.3 V, VO = 3.3 V
CI = 32 μF, CO = 300 μF
图8-39. Short Circuit Behavior
图8-38. Start-up with 100-mA ICL
VI = 3.3 V, VO = 5.0 V
TA = 25°C
VI = 3.3 V, VO = 3.3 V
TA = 25°C
图8-41. Short Circuit Behavior
图8-40. Short Circuit Behavior
VI = 3.3 V, VO(1) = 2.2 V, VO(2)
= 3.6 V
VI = 3.3 V, VO(1) = 2.2 V, VO(2)
= 3.6 V
1-kΩresistive load
30-Ωresistive load
图8-42. DVS Behavior at Light Load
图8-43. DVS Behavior at High Load
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
29
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
9 Power Supply Recommendations
The TPS63900 device is designed to operate with input supplies from 1.8 V to 5.5 V. The input supply must be
stable and free of noise to achieve the full performance of the device. If the input supply is located more than a
few centimeters away from the device, additional bulk capacitance can be required. The input capacitance
shown in the application schematics in this data sheet is sufficient for typical applications.
Copyright © 2021 Texas Instruments Incorporated
30
Submit Document Feedback
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
10 Layout
10.1 Layout Guidelines
PCB layout is an important part of any switching power supply design. A poor layout can cause unstable
operation, load regulation problems, increased ripple and noise, and EMI issues.
The following PCB layout design guidelines are recommended:
• Place the input and output capacitors close to the device.
• Minimize the area of the input loop, and use short, wide traces on the top layer to connect the input capacitor
to the VIN and GND pins.
• Minimize the area of the output loop, and use short, wide traces on the top layer to connect the output
capacitor to the VOUT and GND pins.
• The location of the inductor on the PCB is less important than the location of the input and output capacitors.
Place the inductor after the input and output capacitors have been placed close to the device. You can route
the traces to the inductor on an inner layer if necessary.
10.2 Layout Example
图10-1 shows an example of a PCB layout that follows the recommendations of the previous section.
图10-1. PCB Layout Example
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
31
Product Folder Links: TPS63900
TPS63900
www.ti.com.cn
ZHCSL70D –MARCH 2020 –REVISED OCTOBER 2020
11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
Texas Instruments, TPS63900 EVM User Guide
11.3 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
WEBENCH® is a registered trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.6 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
11.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2021 Texas Instruments Incorporated
32
Submit Document Feedback
Product Folder Links: TPS63900
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jun-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS63900DSKR
ACTIVE
SON
DSK
10
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
639
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Oct-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS63900DSKR
SON
DSK
10
3000
180.0
8.4
2.8
2.8
1.0
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Oct-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SON DSK 10
SPQ
Length (mm) Width (mm) Height (mm)
210.0 185.0 35.0
TPS63900DSKR
3000
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DSK 10
2.5 x 2.5 mm, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4225304/A
PACKAGE OUTLINE
DSK0010A
WSON - 0.8 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
2.6
2.4
A
B
PIN 1 INDEX AREA
2.6
2.4
0.8
0.7
C
SEATING PLANE
0.08 C
0.05
0.00
(0.2) TYP
EXPOSED
THERMAL PAD
1.2 0.1
6
5
1
2X
2
11
2
0.1
10
8X 0.5
0.3
10X
0.45
0.35
0.2
0.1
0.05
10X
PIN 1 ID
(OPTIONAL)
C A B
C
4218903/B 10/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DSK0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
10X (0.6)
(1.2)
10
1
10X (0.25)
SYMM
(2)
11
8X (0.5)
(0.75)
(R0.05) TYP
5
6
(0.35)
(
0.2) VIA
TYP
SYMM
(2.3)
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218903/B 10/2020
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DSK0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
10X (0.6)
SYMM
1
10
METAL
TYP
10X (0.25)
SYMM
11
8X (0.5)
(0.89)
6
(R0.05) TYP
5
(1.13)
(2.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11
84% PRINTED SOLDER COVERAGE BY AREA
SCALE:20X
4218903/B 10/2020
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021，德州仪器 (TI) 公司
相关型号：
©2020 ICPDF网 联系我们和版权申明