TPS71501DCKRM3 [TI]
50mA、24V、超低 IQ、低压降 (LDO) 稳压器 | DCK | 5 | -40 to 125;
| 型号： | TPS71501DCKRM3 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 50mA、24V、超低 IQ、低压降 (LDO) 稳压器 | DCK | 5 | -40 to 125 电源电路 线性稳压器IC |
| 文件： | 总11页 (文件大小：222K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS71501
TPS71525, TPS71530
A
c
t
u
a
l
S
i
z
e
(
2
,
1
5
m
m
x
2
,
3
m
m
)
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
50 mA, 24 V, 3.2µA Supply Current
Low-Dropout Linear Regulator in SC70 Package
FEATURES
DESCRIPTION
•
•
•
•
•
24-V Maximum Input Voltage
The TPS715xx low-dropout (LDO) voltage regulators
offer the benefits of high input voltage, low-dropout
voltage, low-power operation, and miniaturized pack-
aging. The devices, which operate over an input
range of 2.5 V to 24 V, are stable with any capacitor
(> 0.47 µF). The low dropout voltage and low
quiescent current allow operations at extremely low
power levels. Therefore, the devices are ideal for
powering battery management ICs. Specifically, since
the devices are enabled as soon as the applied
voltage reaches the minimum input voltage, the
output is quickly available to power continuously
operating battery charging ICs.
Low 3.2-µA Quiescent Current at 50 mA
Stable With Any Capacitor (> 0.47 µF)
50-mA Low-Dropout Regulator
Available in 2.5 V, 3.0 V, 3.3 V, 5.0 V, and
Adjustable (12 V to 15 V)
•
•
•
Minimum/Maximum Specified Current Limit
5-Pin SC70/SOT-323 (DCK) Package
-40°C to 125°C Specified Junction
Temperature Range
APPLICATIONS
The usual PNP pass transistor has been replaced by
a PMOS pass element. Because the PMOS pass
element behaves as a low-value resistor, the low
dropout voltage, typically 415 mV at 50 mA of load
current, is directly proportional to the load current.
The low quiescent current (3.2 µA typically) is stable
over the entire range of output load current (0 mA to
50 mA).
•
•
•
Ultra Low Power Microcontrollers
Cellular/Cordless Handsets
Portable/Battery-Powered Equipment
DCK PACKAGE
(TOP VIEW)
OUT
TPS715xx
IN
MSP430
FB/NC
GND
NC
1
2
5
OUT
IN
−
Li
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2004, Texas Instruments Incorporated
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
AVAILABLE OPTIONS(1)
TJ
VOLTAGE
PACKAGE
PART NUMBER
TPS71525DCKR
TPS71530DCKR
TPS71533DCKR
TPS71550DCKR
TPS71501DCKR
SYMBOL
AQL
2.5 V
3.0 V
3.3 V
5.0 V
SC70/SOT-323 (DCK)
SC70/SOT-323 (DCK)
SC70/SOT-323 (DCK)
SC70/SOT-323 (DCK)
SC70/SOT-323 (DCK)
AQM
AQI
-40°C to 125°C
T48
(Adjustable) 1.2 V-15 V
ARB
(1) Contact the factory for other voltage options between 1.25 V and 5.85 V.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted)(1)(2)
UNIT
VIN range
-0.3 V to 24 V
Internally limited
2 kV
Peak output current
ESD rating, HBM
ESD rating, CDM
500 V
Continuous total power dissipation
Junction temperature range, TJ
Storage temperature range, Tstg
See Dissipation Rating Table
-40°C to 150°C
-65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING FACTOR
ABOVE TA = 25°C
T
A ≤ 25°C
TA = 70°C
TA = 85°C
BOARD
PACKAGE
RθJC°C/W
RθJA°C/W
POWER RATING POWER RATING POWER RATING
Low-K(1)
High-K(2)
DCK
DCK
165
165
395
315
2.52 mW/°C
3.18 mW/°C
250 mW
320 mW
140 mW
175 mW
100 mW
130 mW
(1) The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
2
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
ELECTRICAL CHARACTERISTICS
over operating junction temperature range (TJ = -40°C to 125°C), VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, COUT = 1 µF unless
otherwise noted. Typical values are at TJ = 25°C.
PARAMETER
TEST CONDITIONS
IO = 10 mA
MIN
2.5
3
TYP
MAX UNIT
24
V
Input voltage(1)
VIN
IO = 50 mA
24
VOUT voltage range (TPS71501)
1.2
15
V
VIN + 1.0 V ≤ VIN ≤ 24 V
VOUT accuracy(1) Over VIN, IOUT, and T
-4.0
+4.0
%
100 µA ≤ IOUT ≤ 50 mA
0 ≤ IOUT ≤ 50 mA, TJ = -40°C to +85°C
0 mA ≤ IOUT ≤ 50 mA
3.2
3.2
4.2
4.8
5.8
Ground pin current
IGND
µA
0 mA ≤ IOUT ≤ 50 mA, VIN = 24 V
IOUT = 100 µA to 50 mA
Load regulation
Output voltage
∆VOUT/∆IOUT
∆VOUT/∆VIN
22
20
mV
mV
VOUT + 1 V < VIN ≤ 24 V
60
(1)
line regulation
BW = 200 Hz to 100 kHz, COUT = 10 µF,
IOUT = 50 mA
Output noise voltage
Vn
575
µVrms
Output current limit
ICL
VO = 0 V
125
750
750
mA
dB
Power-supply ripple rejection
PSRR
f = 100 kHz, COUT = 10 µF
60
Dropout voltage
VIN = VOUT(NOM) - 1 V
VDO
IOUT = 50 mA
415
mV
(1) Minimum VIN = VOUT + VDO or the value shown for Input voltage in this table, whichever is greater.
3
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
V
(OUT)
V
(IN)
Current
Sense
ILIM
R1
R2
_
+
GND
FB
V
ref
= 1.205 V
Bandgap
Reference
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
V
(OUT)
V
(IN)
Current
Sense
ILIM
R1
_
+
GND
R2
V
ref
= 1.205 V
Bandgap
Reference
R2 = 840 kΩ
Table 1. Terminal Functions
TERMINAL
NO.
DESCRIPTION
NAME
FIXED
ADJ.
FB
NC
1
Adjustable version. This terminal is used to set the output voltage.
1
2
3
4
5
No connection
Ground
GND
NC
2
3
4
5
No connection
Unregulated input supply.
IN
OUT
Output of the regulator, any output capacitor ≥ 0.47 µF can be used for stability.
4
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
3.320
3.315
3.32
3.31
4.5
4
V
V
= 4.3 V
= 3.3 V
IN
OUT
= 1 µF
V
C
= 4.3 V
IN
= 1 µF
I
= 1 mA
OUT
OUT
I
OUT
T
J
= 25°C
3.30
3.29
3.28
3.27
3.26
3.25
3.310
3.305
3.300
3.5
3
I
= 50 mA
OUT
2.5
2
V
C
= 4.3 V
3.295
3.290
IN
= 1 µF
OUT
0
10
20
30
40
50
−40−25 −10 5 20 35 50 65 80 95 110 125
−40 −25 −10 5 20 35 50 65 80 95 110 125
I
− Output Current − mA
T
J
− Free−Air Temperature − °C
O
T
J
− Free-Air Temperature − °C
Figure 1.
Figure 2.
Figure 3.
OUTPUT SPECTRAL
NOISE DENSITY
vs
OUTPUT IMPEDANCE
vs
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
FREQUENCY
FREQUENCY
8
7
6
5
4
3
2
1
0
600
18
16
14
V
V
C
= 4.3 V
V
V
C
= 4.3 V
= 3.3 V
= 1 µF
OUT
= 25°C
IN
IN
V
= 3.2 V
IN
= 3.3 V
OUT
OUT
I
= 1 mA
C
OUT
= 1 µF
OUT
500
= 1 µF
OUT
T
J
T
J
= 125°C
12
10
8
400
300
I
= 50 mA
OUT
T
J
= 25°C
6
4
2
0
I
= 1 mA
OUT
200
100
0
T
J
= −40°C
I
= 50 mA
1k
OUT
100
1 k
10 k
100 k
10
100
10k 100k
1 M 10 M
0
10
20
30
40
50
f − Frequency − Hz
f − Frequency − Hz
I
− Output Current − mA
OUT
Figure 4.
Figure 5.
Figure 6.
TPS71501
POWER-SUPPLY
DROPOUT VOLTAGE
vs
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
RIPPLE REJECTION
vs
INPUT VOLTAGE
FREQUENCY
1
600
500
400
300
200
100
0
100
I
= 50 mA
OUT
V
V
= 4.3 V
IN
V
= 3.2 V
IN
0.9
0.8
90
80
= 3.3 V
OUT
C
OUT
= 10 µF
T
= 125°C
J
I
= 50 mA
T = 25°C
J
OUT
0.7
0.6
70
60
50
T
J
= 25°C
I
= 1 mA
OUT
0.5
0.4
0.3
0.2
40
30
20
T
J
= −40°C
I
= 10 mA
OUT
I
= 50 mA
OUT
0.1
0
10
0
0
3
6
9
12
15
10
100
1k
10k 100k
1 M 10 M
−40 −25 −10
5
20 35 50 65 80
110 125
95
V
− Input Voltage − V
IN
f − Frequency − Hz
T
J
− Free-Air Temperature − °C
Figure 7.
Figure 8.
Figure 9.
5
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
TYPICAL CHARACTERISTICS (continued)
POWER UP / POWER DOWN
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
8
7
V
V
C
= 4.3 V
IN
V
R
C
= 3.3 V
= 66 Ω
= 10 µF
V
I
C
= 3.3 V
= 50 mA
= 10 µF
OUT
OUT
400
200
0
= 3.3 V
100
50
OUT
L
OUT
= 10 µF
OUT
OUT
OUT
6
5
4
0
-200
60
40
20
0
−50
3
V
IN
5.3
4.3
2
1
0
V
6
OUT
0
100 200 300 400 500 600 700 800 900 1000
0
50 100 150 200 250 300 350 400 450 500
t − Time − µs
0
2
4
8
10 12 14 16 18 20
t − Time − ms
t − Time − ms
Figure 10.
Figure 11.
Figure 12.
6
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
APPLICATION INFORMATION
The TPS715xx family of LDO regulators has been optimized for ultra-low power applications such as the
MSP430 microcontroller. Its ultralow supply current maximizes efficiency at light loads, and its high input voltage
range makes it suitable for supplies such as unconditioned solar panels.
4
5
V
I
IN
OUT
V
O
C1
3
NC
0.1 µF
1
NC/FB
0.47 µF
GND
2
Figure 13. Typical Application Circuit (Fixed Voltage Version)
External Capacitor Requirements
Although not required, a 0.047-µF or larger input bypass capacitor, connected between IN and GND and located
close to the device, is recommended to improve transient response and noise rejection of the power supply as a
whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and
the device is located several inches from the power source.
The TPS715xx requires an output capacitor connected between OUT and GND to stabilize the internal control
loop. Any capacitor (including ceramic and tantalum) ≥ 0.47 µF properly stabilizes this loop.
Power Dissipation and Junction Temperature
To ensure reliable operation, worst-case junction temperature should not exceed 125°C. This restriction limits the
power dissipation the regulator can handle in any given application. To ensure the junction temperature is within
acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which
must be less than or equal to PD(max)
.
The maximum-power-dissipation limit is determined using the following equation:
T max
J
T
A
P
+
D(max)
R
qJA
(1)
where:
•
•
•
TJmax is the maximum allowable junction temperature.
θJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings table).
TA is the ambient temperature.
R
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
D
O
O
(2)
Power dissipation resulting from quiescent current is negligible.
Regulator Protection
The TPS715xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be
appropriate.
7
TPS71501
TPS71525, TPS71530
TPS71533, TPS71550
www.ti.com
SLVS338H–MAY 2001–REVISED JUNE 2004
APPLICATION INFORMATION (continued)
The TPS715xx features internal current limiting. During normal operation, the TPS715xx limits output current to
approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package.
Programming the TPS71501 Adjustable LDO Regulator
The output voltage of the TPS71501 adjustable regulator is programmed using an external resistor divider as
shown in Figure 14. The output voltage is calculated using:
R1
R2
ǒ1 ) Ǔ
V
+ V
O
ref
(3)
where:
VREF = 1.205 V typ (the internal reference voltage)
•
Resistors R1 and R2 should be chosen for approximately 1.5-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially in-
creases/decreases the feedback voltage and thus erroneously decreases/increases VO. The recommended
design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 µA, and then calculate R1 using:
V
O
R1 +
* 1 R2
ǒ Ǔ
V
ref
(4)
TPS71501
IN
OUTPUT VOLTAGE
PROGRAMMING GUIDE
V
I
0.1 µF
OUTPUT
R1
R2
VOLTAGE
OUT
V
O
0.499 MΩ 1 MΩ
1.33 MΩ 1 MΩ
3.16 MΩ 1 MΩ
1.8 V
2.8 V
5.0 V
R1
R2
0.47 µF
FB
GND
Figure 14. TPS71501 Adjustable LDO Regulator Programming
8
PACKAGE OPTION ADDENDUM
www.ti.com
2-Jun-2004
PACKAGING INFORMATION
ORDERABLE DEVICE
STATUS(1)
PACKAGE TYPE
PACKAGE DRAWING
PINS
PACKAGE QTY
BQ71525DCKR
BQ71533DCKR
TPS71501DCKR
TPS71525DCKR
TPS71530DCKR
TPS71533DCKR
TPS71550DCKR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOP
SOP
SOP
SOP
SOP
SOP
SOP
DCK
DCK
DCK
DCK
DCK
DCK
DCK
5
5
5
5
5
5
5
3000
3000
3000
3000
3000
3000
3000
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,10
0,65
5
4
0,13 NOM
1,40 2,40
1,10 1,80
1
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
0,10
1,10
0,80
0,10
0,00
4093553-2/D 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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www.ti.com/wireless
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Copyright 2004, Texas Instruments Incorporated
相关型号：
TPS71501MDCKREP
Enhanced Product 50 mA, 24 V, 3.2 uA Supply Current, Low Dropout, Linear Regulator 5-SC70 -55 to 125
TI
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