TPS73030DBVT [TI]
LOW-NOISE, HIGH PSRR, RF 200-mA LOW-DROPOUT LINEAR REGULATORS; 低噪声,高PSRR ,射频200mA的低压差线性稳压器型号: | TPS73030DBVT |
厂家: | TEXAS INSTRUMENTS |
描述: | LOW-NOISE, HIGH PSRR, RF 200-mA LOW-DROPOUT LINEAR REGULATORS |
文件: | 总13页 (文件大小:264K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS73001, TPS73018
TPS73025
D
B
V
6
D
B
V
5
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
LOW-NOISE, HIGH PSRR, RF 200-mA
LOW-DROPOUT LINEAR REGULATORS
FEATURES
DESCRIPTION
•
200-mA RF Low-Dropout Regulator
With Enable
The TPS730xx family of low-dropout (LDO)
low-power linear voltage regulators features high
power-supply rejection ratio (PSRR), ultralow-noise,
fast start-up, and excellent line and load transient
responses a small SOT23 package. Each device in
the family is stable, with a small 2.2-µF ceramic
capacitor on the output. The TPS730xx family uses
an advanced, proprietary BiCMOS fabrication pro-
cess to yield low dropout voltages (e.g., 120 mV at
200 mA, TPS73030). Each device achieves fast
start-up times (approximately 50 µs with a 0.001-µF
bypass capacitor) while consuming low quiescent
current (170 µA typical). Moreover, when the device
is placed in standby mode, the supply current is
reduced to less than 1 µA. The TPS73018 exhibits
approximately 23 µVRMS of output voltage noise at
2.8-V output with a 0.01-µF bypass capacitor. Appli-
•
Available in 1.8-V, 2.5-V, 3-V, 3.3-V, and
Adjustable (1.22-V to 5.5-V)
•
•
•
•
•
•
High PSRR (68dB at 1 kHz)
Ultralow-Noise (23 µVRMS, TPS73018)
Fast Start-Up Time (50 µs)
Stable With a 2.2-µF Ceramic Capacitor
Excellent Load/Line Transient Response
Very Low Dropout Voltage (120 mV at Full
Load)
•
5- and 6-Pin SOT23 (DBV) Package
APPLICATIONS
•
•
•
•
•
RF: VCOs, Receivers, ADCs
Audio
Cellular and Cordless Telephones
Bluetooth™, Wireless LAN
Handheld Organizers, PDAs
cations with analog components
that
are
noise-sensitive, such as portable RF electronics,
benefit from the high PSRR and low-noise features
as well as the fast response time.
TPS73028
TPS73028
RIPPLE REJECTION
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
DBV PACKAGE
(TOP VIEW)
FREQUENCY
FREQUENCY
0.30
100
90
OUT
NR
IN
1
2
5
V
= 3.8 V
IN
I
= 200 mA
OUT
C
C
= 2.2 µF
OUT
= 0.1 µF
0.25
0.20
GND
80
NR
3
4
70
EN
60
Fixed Option
0.15
50
40
30
DBV PACKAGE
(TOP VIEW)
I
= 1 mA
OUT
I
= 10 mA
OUT
IN
GND
EN
OUT
FB
0.10
0.05
1
2
6
5
I
= 200 mA
OUT
20
10
0
V
C
C
= 3.8 V
= 10 µF
IN
OUT
= 0.01 µF
3
4
NR
NR
0
Adjustable Option
100
1 k
10 k
100 k
10
100
1 k
10 k 100 k 1 M 10 M
Frequency (Hz)
Frequency (Hz)
Figure 1.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Bluetooth is a trademark of Bluetooth Sig, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
AVAILABLE OPTIONS(1)(2)
PRODUCT
TPS73001
TPS73018
TPS73025
TPS73030
TPS73033
VOLTAGE
1.22 V to 5.5 V
1.8 V
PACKAGE
SOT23 (DBV)
SOT23 (DBV)
SOT23 (DBV)
SOT23 (DBV)
SOT23 (DBV)
TJ
SYMBOL
PGVI
PART NUMBER
TPS73001DBVR
TPS73018DBVR
TPS73025DBVR
TPS73030DBVR
TPS73033DBVR
PHHI
2.5 V
-40°C to +125°C
PGWI
PGYI
3 V
3.3 V
PHUI
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
(2) DBVR indicates tape and reel of 3000 parts.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted)(1)
UNIT
VIN range
-0.3 V to 6 V
-0.3 V to VIN + 0.3 V
-0.3 V to 6 V
VEN range
VOUT range
Peak output current
ESD rating, HBM
Internally limited
2 kV
ESD rating, CDM
500 V
Continuous total power dissipation
Junction temperature range
Storage temperature range, Tstg
See Dissipation Ratings Table
-40°C to 150°C
-65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
DISSIPATION RATINGS TABLE
T
A ≤ 25°C
TA = 70°C
POWER
RATING
TA = 85°C
POWER
RATING
DERATING FACTOR
POWER
RATING
BOARD
Low-K(1)
High-K(2)
PACKAGE
DBV
RθJC
RθJA
ABOVE TA = 25°C
65°C/W
65°C/W
255°C/W
180°C/W
3.9 mW/°C
5.6 mW/°C
390 mW
560 mW
215 mW
310 mW
155 mW
225 mW
DBV
(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
ELECTRICAL CHARACTERISTICS
over recommended operating temperature range TJ = -40 to 125°C, VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1 mA,
COUT = 10 µF, CNR = 0.01 µF (unless otherwise noted). Typical values are at 25°C.
PARAMETER
VIN Input voltage(1)
TEST CONDITIONS
MIN
2.7
0
TYP
MAX
5.5
UNIT
V
IOUT Continuous output current
VFB Internal reference (TPS73001)
200
mA
V
1.201 1.225
1.250
5.5 -
VDO
Output voltage range (TPS73001)
VFB
V
Output voltage accuracy
0 µA ≤ IOUT≤ 200 mA,
VOUT + 1 V ≤ VIN≤ 5.5 V
0 µA ≤ IOUT≤ 200 mA,
IOUT = 200 mA
2.75 V ≤ VIN < 5.5 V
TJ = 25°C
-2%
285
VOUT(nom) +2%
V
(1)
Line regulation (∆VOUT%/∆VIN
)
0.05
5
%/V
mV
mV
mA
µA
Load regulation (∆VOUT%/∆IOUT
Dropout voltage(2)(VIN = VOUT(nom) - 0.1V)
)
120
210
600
250
1
Output current limit
VOUT = 0 V
GND pin current
Shutdown current(3)
0 µA ≤ IOUT≤ 200 mA
170
VEN = 0 V, 2.7 V ≤ VIN≤ 5.5 V
0.07
µA
FB pin current
VFB = 1.8 V
1
µA
Power-supply ripple rejection TPS73028
f = 1kHz, TJ = 25°C,
IOUT = 200 mA
68
23
50
dB
BW = 200 Hz to 100 kHz,
IOUT = 200 mA
Output noise voltage (TPS73018)
CNR = 0.01 µF
CNR = 0.001 µF
µVRMS
Time, start-up (TPS73018)
High level enable input voltage
Low level enable input voltage
EN pin current
RL = 14 Ω, COUT = 1 µF
2.7 V ≤ VIN≤ 5.5 V
2.7 V ≤ VIN≤ 5.5 V
VEN = 0
µs
V
1.7
0
VIN
0.7
1
V
-1
µA
V
UVLO threshold
VCC rising
2.25
2.65
UVLO hysteresis
100
mV
(1) Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater.
(2) Dropout is not measured for the TPS73018 and TPS73025 since minimum VIN = 2.7 V.
(3) For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low.
3
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
FUNCTIONAL BLOCK DIAGRAMS
ADJUSTABLE VERSION
IN
OUT
59 k
UVLO
2.45V
Current
Sense
R1
R2
ILIM
SHUTDOWN
GND
EN
_
+
FB
UVLO
Thermal
Shutdown
External to
the Device
QuickStart
Bandgap
Reference
1.22V
250 kΩ
V
ref
IN
NR
FIXED VERSION
IN
OUT
UVLO
2.45V
Current
Sense
GND
EN
SHUTDOWN
+
ILIM
R1
R2
_
UVLO
Thermal
Shutdown
R2 = 40 kΩ
QuickStart
Bandgap
Reference
1.22V
250 kΩ
V
ref
NR
IN
Terminal Functions
TERMINAL
SOT23 SOT23
DESCRIPTION
NAME
NR
ADJ
FIXED
Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This
improves power-supply rejection and reduces output noise.
4
4
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown
mode. EN can be connected to IN if not used.
EN
3
3
FB
GND
IN
5
2
1
6
N/A
2
This terminal is the feedback input voltage for the adjustable device.
Regulator ground
1
Unregulated input to the device.
OUT
5
Output of the regulator.
4
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS (SOT23 PACKAGE)
TPS73028
OUTPUT VOLTAGE
vs
TPS73028
OUTPUT VOLTAGE
vs
TPS73028
GROUND CURRENT
vs
OUTPUT CURRENT
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
2.805
2.804
2.803
2.802
2.801
2.800
2.799
250
200
2.805
2.800
2.795
2.790
2.785
V
= 3.8 V
= 10 µF
OUT
= 25°C
IN
V
C
= 3.8 V
IN
C
T
= 10 µF
I
= 1 mA
OUT
OUT
J
I
= 1 mA
OUT
I
= 200 mA
OUT
150
100
50
0
I
= 200 mA
OUT
2.798
2.797
2.780
2.775
V
C
= 3.8 V
= 10 µF
IN
2.796
2.795
OUT
−40 −25 −10 5 20 35 50 65 80 95 110 125
(°C)
0
50
100
(mA)
150
200
−40 −25−10 5 20 35 50 65 80 95 110 125
I
T
J
(°C)
T
J
OUT
Figure 2.
Figure 3.
Figure 4.
TPS73028 OUTPUT SPECTRAL
ROOT MEAN SQUARE OUTPUT
TPS73028
DROPOUT VOLTAGE
vs
NOISE DENSITY
vs
NOISE
vs
FREQUENCY
CNR
JUNCTION TEMPERATURE
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
180
160
140
120
100
80
60
50
40
30
20
10
V
C
= 2.7 V
IN
V
= 2.8 V
= 200 mA
= 10 µF
V
I
C
= 3.8 V
OUT
IN
= 10 µF
I
= 200 mA
OUT
OUT
C
OUT
= 10 µF
OUT
= 0.001 µF
OUT
C
NR
C
= 0.0047 µF
I
= 200 mA
NR
C
OUT
= 0.01 µF
NR
C
= 0.1 µF
NR
60
40
I
= 10 mA
OUT
20
BW = 100 Hz to 100 kHz
0.01
0
0
100
1 k
10 k
100 k
−40 −25−10 5 20 35 50 65 80 95 110 125
0.001
0.1
Frequency (Hz)
T
(°C)
C
NR
(µF)
J
Figure 5.
Figure 6.
Figure 7.
5
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TPS73028
RIPPLE REJECTION
vs
TPS73028 OUTPUT VOLTAGE,
ENABLE VOLTAGE
vs
TPS73028
LINE TRANSIENT RESPONSE
FREQUENCY
TIME (START-UP)
100
90
4.8
3.8
4
I
= 200 mA
OUT
80
V
V
= 3.8 V
2
0
IN
70
= 2.8 V
OUT
I
= 200 mA
OUT
60
C
T
= 2.2 µF
I
= 200 mA
OUT
OUT
= 25°C
50
40
30
C
C
= 2.2 µF
= 0.01 µF
J
OUT
C
NR
= 0.001 µF
dv
dt
0µ.4sV
NR
+
20
0
3
2
1
0
I
= 10 mA
OUT
C
= 0.0047 µF
= 0.01 µF
20
NR
V
= 3.8 V
= 10 µF
IN
-20
C
C
OUT
= 0.01 µF
10
0
C
NR
NR
10
100
1 k
10 k 100 k 1 M 10 M
0
20 40 60 80 100 120 140 160 180 200
0
10 20 30 40 50 60 70 80 90 100
Frequency (Hz)
Time (µs)
Time (µs)
Figure 8.
Figure 9.
Figure 10.
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
TPS73028
LOAD TRANSIENT RESPONSE
POWER-UP / POWER-DOWN
250
200
150
100
V
C
= 3.8 V
IN
V
R
= 3 V
= 15 Ω
OUT
20
= 10 µF
OUT
L
0
T
= 125°C
J
−20
T
J
= 25°C
−40
300
di
dt
0.02A
µs
+
V
IN
V
OUT
200
100
T
= −55°C
J
50
0
1mA
0
0
50 100 150200 250 300 350 400 450 500
0
20 40 60 80 100 120 140 160 180 200
(mA)
1s/div
I
Time (µs)
OUT
Figure 11.
Figure 12.
Figure 13.
TYPICAL REGIONS OF STABILITY
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
EQUIVALENT SERIES RESISTANCE
(ESR)
vs
OUTPUT CURRENT
(ESR)
vs
OUTPUT CURRENT
100
10
100
10
C
= 2.2 µF
OUT
C
= 10 µF
OUT
= 5.5 V
V
= 5.5 V, V
≥ 1.5 V
IN
OUT
V
IN
= −40°C to 125°C
T
J
= −40°C to 125°C
T
J
Region of Instability
Region of Instability
1
1
0.1
0.1
Region of Stability
Region of Stability
0.01
0.01
0.20
0
0.02
0.04
0.06
(A)
0.08
0.20
0
0.02
0.04
0.06
(A)
0.08
I
I
OUT
OUT
Figure 14.
Figure 15.
6
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
APPLICATION INFORMATION
The TPS730xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170 µA typically), and enable-input to reduce supply currents to less than 1 µA
when the regulator is turned off.
A typical application circuit is shown in Figure 16.
V
IN
VIN
VOUT
IN
OUT
NR
TPS730xx
V
OUT
EN
GND
µ
µ
F
0.1
F
2.2
µ
0.01
F
Figure 16. Typical Application Circuit
External Capacitor Requirements
A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS730xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A
higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device
is located several inches from the power source.
Like most low dropout regulators, the TPS730xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2-µF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load
current is not expected to exceed 100 mA, a 1.0-µF ceramic capacitor can be used.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS730xx has an NR pin which
is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in
conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the
voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate
properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR
drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor should be no more than 0.1-µF to ensure that it is fully charged
during the quickstart time provided by the internal switch shown in the Functional Block Diagrams
As an example, the TPS73018 exhibits only 23 µVRMS of output voltage noise using a 0.01-µF ceramic bypass
capacitor and a 2.2-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance
increases due to the RC time constant at the NR pin that is created by the internal 250-kΩ resistor and external
capacitor.
Board Layout Recommendation to Improve PSRR and Noise Performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board
be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND
pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND
pin of the device.
7
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
APPLICATION INFORMATION (continued)
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max)
.
The maximum power dissipation limit is determined using Equation 1:
TJ max TA
PD max
+
(
)
RQJA
(1)
Where:
•
•
•
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table).
TA is the ambient temperature.
The regulator dissipation is calculated using Equation 2:
ǒ
Ǔ
PD + VIN*VOUT IOUT
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.
Programming the TPS73001 Adjustable LDO Regulator
The output voltage of the TPS73001 adjustable regulator is programmed using an external resistor divider as
shown in Figure 17. The output voltage is calculated using Equation 3:
R1
R2
ǒ1 ) Ǔ
VOUT + VREF
(3)
Where:
•
VREF = 1.225 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially in-
creases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and then
calculate R1 using Equation 4:
VOUT
ǒ Ǔ
R1 +
R2
Vref * 1
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages < 1.8 V, the value of this capacitor should be 100 pF. For voltages >
1.8 V, the approximate value of this capacitor can be calculated as shown in Equation 5:
*7
(3 x 10 ) x (R1 ) R2)
C1
+
(R1 x R2)
(5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage < 1.8 V is chosen, then the minimum
recommended output capacitor is 4.7 µF instead of 2.2 µF.
8
TPS73001, TPS73018
TPS73025
TPS73030, TPS73033
www.ti.com
SBVS054A–NOVEMBER 2004–REVISED NOVEMBER 2004
APPLICATION INFORMATION (continued)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VIN
VOUT
IN
OUT
FB
TPS730xx
OUTPUT
R1
R2
µ
1 F
C1
R1
R2
C1
EN
NR
VOLTAGE
1.22 V
2.5 V
µ
1 F
GND
short
31.6 k
51 k
open
0 pF
µ
0.01 F
30.1 k
30.1 k
30.1 k
22 pF
15 pF
15 pF
Ω
Ω
Ω
Ω
Ω
Ω
3.3 V
3.6 V
59 k
Figure 17. TPS73001 Adjustable LDO Regulator Programming
Regulator Protection
The TPS730xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power-down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be
appropriate.
The TPS730xx features internal current limiting and thermal protection. During normal operation, the TPS730xx
limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately 165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation
resumes.
9
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
TPS73001DBVR
TPS73001DBVRG4
TPS73001DBVT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS73001DBVTG4
TPS73018DBVR
TPS73018DBVRG4
TPS73018DBVT
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS73018DBVTG4
TPS73025DBVR
TPS73025DBVRG4
TPS73025DBVT
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS73025DBVTG4
TPS73030DBVR
TPS73030DBVRG4
TPS73030DBVT
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS73030DBVTG4
TPS73033DBVR
TPS73033DBVRG4
TPS73033DBVT
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS73033DBVTG4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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