TPS73130MDBVREP [TI]
CAP-FREE NMOS 150 mA LOW DROPOUT REGULATOR WITH REVERSE CURRENT PROTECTION; 具有反向电流保护无电容NMOS 150毫安低压差稳压器
| 型号： | TPS73130MDBVREP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CAP-FREE NMOS 150 mA LOW DROPOUT REGULATOR WITH REVERSE CURRENT PROTECTION |
| 文件： | 总22页 (文件大小：623K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
CAP-FREE NMOS 150 mA LOW DROPOUT REGULATOR
WITH REVERSE CURRENT PROTECTION
1
FEATURES
2
•
Controlled Baseline
•
•
•
Low Noise: 30 μVRMS Typ (10 kHz to 100 kHz)
–
–
–
One Assembly
Test Site
0.5% Initial Accuracy
1% Overall Accuracy Over Line, Load, and
Temperature
One Fabrication Site
•
•
•
Less Than 1 μA Maximum IQ in Shutdown
Mode
•
•
Extended Temperature Performance of
–55°C to 125°C
Thermal Shutdown and Specified Min/Max
Current Limit Protection
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Available in Multiple Output Voltage Versions
•
•
•
Enhanced Product-Change Notification
(1)
–
–
–
Fixed Outputs of 1.2 V to 5 V
Adjustable Outputs from 1.2 V to 5.5 V
Custom Outputs Available
Qualification Pedigree
Stable With No Output Capacitor or Any Value
or Type of Capacitor
•
•
•
Input Voltage Range of 1.7 V to 5.5 V
APPLICATIONS
Ultralow Dropout Voltage: 30 mV Typical
•
•
•
•
Portable/Battery-Powered Equipment
Post-Regulation for Switching Supplies
Noise-Sensitive Circuitry such as VCOs
Point of Load Regulation for DSPs, FPGAs,
ASICs, and Microprocessors
Excellent Load Transient Response—With or
Without Optional Output Capacitor
•
New NMOS Topology Provides Low Reverse
Leakage Current
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
The TPS731xx family of low-dropout (LDO) linear voltage regulators uses a new topology: an NMOS pass
element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR and
even allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and
ground pin current that is nearly constant over all values of output current.
The TPS731xx uses an advanced BiCMOS process to yield high precision while delivering low dropout voltages
and low ground pin current. Current consumption, when not enabled, is under 1 μA and ideal for portable
applications. The low output noise (30 μVRMS with 0.1 μF CNR) is ideal for powering VCOs. These devices are
protected by thermal shutdown and foldback current limit.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
Optional
Optional
DBV PACKAGE
SOT23
(TOP VIEW)
VIN
VOUT
IN
OUT
TPS731xx
GND
EN
NR
5
4
IN
GND
EN
1
2
3
OUT
Optional
Typical Application Circuit for Fixed-Voltage Versions
NR/FB
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCT INFORMATION(1)
(2)
PRODUCT
VOUT
TPS731xxMyyyzEP
XX is nominal output voltage (for example, 25 = 2.5 V, 01 = Adjustable(3)).
YYY is package designator.
Z is package quantity.
(1) For the most current specification and package information, see the Package Option Addendum located at the end of this data sheet or
see the Texas Instruments website at www.ti.com.
(2) Output voltages from 1.3 V to 4 V in 100 mV increments are available through the use of innovative factory EEPROM programming.
Minimum order quantities apply; contact factory for details and availability.
(3) For fixed 1.2 V operation, tie FB to OUT
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TPS73101MDBVREP
TPS73115MDBVREP
TPS731125MDBVREP
TPS73118MDBVREP
TPS73125MDBVREP
TPS73130MDBVREP
TPS73132MDBVREP
TPS73133MDBVREP
TPS73150MDBVREP
TOP-SIDE MARKING
PKAM
PKBM
PMMM
PKCM
–55°C to 125°C
SOT23 - DBV
PKDM
PKEM
PKFM
PKHM
PKIM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
ABSOLUTE MAXIMUM RATINGS
over operating junction temperature range unless otherwise noted(1)
VIN range
–0.3 V to 6 V
–0.3 V to 6 V
–0.3 V to 5.5 V
Internally limited
Indefinite
VEN range
VOUT range
Peak output current
Output short-circuit duration
See Power Dissipation Ratings
Continuous total power dissipation
Table
Ambient temperature range, TA
Storage temperature range
ESD rating, HBM
–55°C to 150°C
–65°C to 150°C
2 kV
ESD rating, CDM
500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics
is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
POWER DISSIPATION RATINGS(1)
T
A ≤ 25°C
TA = 70°C
POWER
RATING
TA = 85°C
POWER
RATING
TA = 125°C
POWER
RATING
DERATING FACTOR
ABOVE TA = 25°C
BOARD
PACKAGE
RΘJC
RΘJA
POWER
RATING
Low-K(2)
DBV
DBV
64°C/W 255°C/W
64°C/W 180°C/W
3.9 mW/°C
5.6 mW/°C
450 mW
638 mW
275 mW
388 mW
215 mW
305 mW
58 mW
83 mW
(3)
High-K
(1) See Power Dissipation in the Application Information section for more information related to thermal design.
(2) The JEDEC Low-K (1s) board design used to derive this data was a 3 inch × 3 inch, two-layer board with 2-ounce copper traces on top
of the board.
(3) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch × 3 inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on the top and bottom of the board.
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
ELECTRICAL CHARACTERISTICS
Over operating temperature range (TA = –55°C to +125°C), VIN = VOUT(nom) + 0.5 V(1), IOUT = 10 mA, VEN = 1.7 V, and
COUT = 0.1 μF, unless otherwise noted. Typical values are at TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
1.7
TYP
MAX UNIT
VIN
Input voltage range(1)
Internal reference (TPS73101)
Output voltage range (TPS73101)
Nominal
5.5
1.21
V
V
VFB
TA = 25°C
1.198
VFB
1.2
5.5 – VDO
V
TA = 25°C
±0.5
±0.5
%
VOUT
Accuracy(1)
VOUT + 0.5 V ≤ VIN ≤ 5.5 V,
10 mA ≤ IOUT ≤ 150 mA
VIN, IOUT, and T
–1
+1
%
ΔVOUT%/ΔVIN Line regulation(1)
ΔVOUT%/ΔIOUT Load regulation
VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V
1 mA ≤ IOUT ≤ 150 mA
0.01
0.002
%/V
%/mA
mV
10 mA ≤ IOUT ≤ 150 mA
0.0005
Dropout voltage(2)
VDO
IOUT = 150 mA
30
100
500
(VIN = VOUT (nom) – 0.1 V)
ZO(DO)
ICL
Output impedance in dropout
Output current limit
1.7 V ≤ VIN ≤ VOUT + VDO
VOUT = 0.9 × VOUT(nom)
VOUT = 0 V
0.25
360
Ω
150
mA
mA
μA
ISC
Short-circuit current
200
IREV
Reverse leakage current(3) (–IIN
)
VEN ≤ 0.5 V, 0 V ≤ VIN ≤ VOUT
0.1
15
550
750
1
IOUT = 10 mA (IQ)
IOUT = 150 mA
400
IGND
Ground pin current
μA
550
ISHDN
IFB
Shutdown current (IGND
)
VEN ≤ 0.5 V, VOUT ≤ VIN ≤ 5.5
0.02
μA
μA
FB pin current (TPS73101)
0.1
0.475
f = 100 Hz, IOUT = 150 mA
f = 10 kHz, IOUT = 150 mA
COUT = 10 μF, No CNR
58
Power-supply rejection ratio
(ripple rejection)
PSRR
dB
37
27 × VOUT
8.5 × VOUT
Output noise voltage
BW = 10 Hz to 100 kHz
VN
μVRMS
μs
COUT = 10 μF, CNR = 0.01 μF
VOUT = 3 V, RL = 30Ω
COUT = 1 μF, CNR = 0.01 μF
tSTR
Startup time
600
VEN(HI)
VEN(LO)
IEN(HI)
Enable high (enabled)
1.7
0
VIN
0.5
0.1
V
V
Enable low (shutdown)
Enable pin current (enabled)
VEN = 5.5 V
0.02
160
140
μA
Shutdown, Temperature increasing
Reset, Temperature decreasing
TSD
TA
Thermal shutdown temperature
Operating ambient temperature
°C
°C
–55
125
(1) Minimum VIN = VOUT + VDO or 1.7 V, whichever is greater.
(2) VDO is not measured for the TPS73115 (VO(nom) = 1.5 V) and TPS731125 (VO(nom) = 1.25 V) since minimum VIN = 1.7 V.
(3) Fixed-voltage versions only; see the Applications Infomation section for more information.
4
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
16
14
12
10
8
6
4
2
0
100
110
120
130
140
150
160
Continuous Tj (°C)
A. Tj = θJA × W + TA (at standard JESD 51 conditions)
Figure 1. Estimated Device Life at Elevated Temperatures
Electromigration Fail Mode
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
FUNCTIONAL BLOCK DIAGRAMS
IN
4MHz
Charge Pump
EN
Thermal
Protection
Ref
Servo
Ω
27k
Bandgap
Error
Amp
Current
Limit
OUT
Ω
8k
GND
R1
R2
Ω
R1 + R2 = 80k
NR
Figure 2. Fixed Voltage Version
IN
Table 1. Standard 1%
Resistor Values for
Common Output Voltages
V
O
R
1
R
2
4MHz
Charge Pump
1.2V
1.5V
1.8V
2.5V
2.8V
3.0V
3.3V
5.0V
Short
Open
23.2kΩ
28.0kΩ
39.2kΩ
44.2kΩ
46.4kΩ
52.3kΩ
78.7kΩ
95.3kΩ
56.2kΩ
36.5kΩ
33.2kΩ
30.9kΩ
30.1kΩ
24.9kΩ
EN
Thermal
Protection
Ref
Servo
Ω
27k
Bandgap
Error
Amp
OUT
FB
Current
Limit
NOTE: V
= (R + R )/R × 1.204;
1 2 2
OUT
R
R
19kΩ for best
1
2
GND
Ω
80k
Ω
8k
accuracy.
R1
R2
Figure 3. Adjustable Voltage Version
6
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
PIN ASSIGNMENTS
DBV PACKAGE
SOT23
(TOP VIEW)
5
4
IN
GND
EN
1
2
3
OUT
NR/FB
TERMINAL FUNCTIONS
TERMINAL
SOT23
(DBV)
DESCRIPTION
NAME
PIN NO.
IN
1
2
Unregulated input supply
Ground
GND
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown
mode. Refer to the Shutdown section under Application Information for more details. EN can be connected to
IN if not used.
EN
NR
3
4
Fixed voltage versions only—connecting an external capacitor to this pin bypasses noise generated by the
internal bandgap, reducing output noise to very low levels.
Adjustable voltage version only—this is the input to the control loop error amplifier, and is used to set the
output voltage of the device.
FB
4
5
OUT
Output of the regulator. There are no output capacitor requirements for stability.
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
TYPICAL CHARACTERISTICS
For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF,
unless otherwise noted
LOAD REGULATION
Referred to IOUT = 10mA
LINE REGULATION
0.5
0.4
0.3
0.2
0.1
0
0.20
0.15
0.10
0.05
0
Referred to VIN = VOUT + 0.5V at IOUT = 10mA
_
+25 C
_
+125 C
−
−
−
−
−
0.1
0.2
0.3
0.4
0.5
−
0.05
0.10
0.15
0.20
−
_
40 C
−
−
−
0
15
30 45
60
75
90 105 120 135 150
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
−
VIN VOUT (V)
IOUT (mA)
Figure 4.
Figure 5.
DROPOUT VOLTAGE vs OUTPUT CURRENT
DROPOUT VOLTAGE vs TEMPERATURE
50
40
30
20
10
0
50
40
30
20
10
0
TPS73125DBV
IOUT = 150mA
TPS73125DBV
_
+125 C
_
+25 C
−
_
40 C
−
−
25
0
30
60
IOUT (mA)
Figure 6.
90
120
150
50
0
25
50
75
100
125
_
Temperature ( C)
Figure 7.
OUTPUT VOLTAGE ACCURACY HISTOGRAM
OUTPUT VOLTAGE DRIFT HISTOGRAM
IOUT = 10mA
30
18
IOUT = 10mA
16
14
12
10
8
All Voltage Versions
25
20
15
10
5
6
4
2
0
0
_
VOUT Error (%)
Worst Case dVOUT/dT (ppm/ C)
Figure 8.
Figure 9.
8
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
TYPICAL CHARACTERISTICS (continued)
For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF,
unless otherwise noted
GROUND PIN CURRENT vs OUTPUT CURRENT
GROUND PIN CURRENT vs TEMPERATURE
IOUT = 150mA
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
VIN = 5.5V
VIN = 4V
VIN = 2V
VIN = 5.5V
VIN = 4V
VIN = 2V
−
−
25
0
30
60
IOUT (mA)
90
120
150
50
0
25
50
75
100
125
_
Temperature ( C)
Figure 10.
Figure 11.
CURRENT LIMIT vs VOUT
(FOLDBACK)
GROUND PIN CURRENT in SHUTDOWN
vs TEMPERATURE
400
350
300
250
200
150
100
50
1
VENABLE = 0.5V
VIN = VO + 0.5V
ICL
ISC
0.1
TPS73133
0.5
0
0.01
−
−
25
0
1.0
1.5
2.0
2.5
3.0
3.5
50
0
25
50
75
100
125
VOUT (V)
_
Temperature ( C)
Figure 12.
CURRENT LIMIT vs VIN
Figure 13.
CURRENT LIMIT vs TEMPERATURE
500
450
400
350
300
250
200
150
500
450
400
350
300
250
200
150
−
−
25
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
50
0
25
50
75
100
125
VIN (V)
_
Temperature ( C)
Figure 14.
Figure 15.
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
TYPICAL CHARACTERISTICS (continued)
For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF,
unless otherwise noted
PSRR (RIPPLE REJECTION) vs FREQUENCY
PSRR (RIPPLE REJECTION) vs VIN – VOUT
90
80
70
60
50
40
30
20
10
0
40
35
30
25
20
15
10
5
IO = 1mA
IO = 1mA
CO = Any
CO = 1mF
IO = 1mA
CO = 10mF
IO = 100mA
CO = 1mF
IO = 100mA
CO = Any
Frequency = 100kHz
µ
COUT = 10 F
IO = Any
VIN = VOUT = 1.25V
100
VOUT = 2.5V
CO = 0mF
0
1k
100k
10
10k
1M
10M
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Frequency (Hz)
−
VIN VOUT (V)
Figure 16.
Figure 17.
NOISE SPECTRAL DENSITY
NOISE SPECTRAL DENSITY
CNR = 0 μF
CNR = 0.01 μF
1
1
µ
COUT = 1 F
µ
COUT = 1 F
µ
COUT = 0 F
0.1
0.1
µ
COUT = 10 F
µ
COUT = 0 F
µ
COUT = 10 F
IOUT = 150mA
10 100
IOUT = 150mA
10 100
0.01
0.01
1k
10k
100k
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
Figure 18.
Figure 19.
RMS NOISE VOLTAGE vs COUT
RMS NOISE VOLTAGE vs CNR
60
50
40
30
20
10
0
140
120
100
80
VOUT = 5.0V
VOUT = 5.0V
VOUT = 3.3V
VOUT = 1.5V
VOUT = 3.3V
VOUT = 1.5V
60
40
20
µ
CNR = 0.01 F
µ
COUT = 0 F
10Hz < Frequency < 100kHz
10Hz < Frequency < 100kHz
0
0.1
1
10
1p
10p
100p
1n
10n
µ
COUT ( F)
CNR (F)
Figure 20.
Figure 21.
10
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
TYPICAL CHARACTERISTICS (continued)
For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF,
unless otherwise noted
TPS73133
LOAD TRANSIENT RESPONSE
TPS73133
LINE TRANSIENT RESPONSE
µ
COUT = 0 F
VIN = 3.8V
IOUT = 150mA
40mV/tick
40mV/tick
40mV/tick
25mA/tick
VOUT
VOUT
VOUT
IOUT
µ
COUT = 0 F
50mV/div
VOUT
µ
OUT = 1 F
C
µ
COUT = 100 F
µ
COUT = 10 F
50mV/div
1V/div
VOUT
dVIN
dt
5.5V
µ
= 0.5V/
s
150mA
4.5V
VIN
10mA
µ
µ
10 s/div
10 s/div
Figure 22.
Figure 23.
TPS73133
TURN-ON RESPONSE
TPS73133
TURN-OFF RESPONSE
RL = 1kΩ
RL = 20Ω
COUT = 10
VOUT
µ
COUT = 0
F
µ
F
Ω
RL = 20
Ω
RL = 20
1V/div
1V/div
1V/div
1V/div
µ
COUT = 1
F
µ
COUT = 1
F
Ω
RL = 1k
Ω
RL = 20
COUT = 0µF
COUT = 10µF
VOUT
2V
2V
VEN
0V
0V
VEN
100µs/div
100µs/div
Figure 24.
Figure 25.
TPS73133
POWER UP / POWER DOWN
IENABLE vs TEMPERATURE
10
1
6
5
4
3
2
1
0
VIN
VOUT
0.1
0.01
−
−
1
2
−
−
25
50
0
25
50
75
100
125
50ms/div
_
Temperature ( C)
Figure 26.
Figure 27.
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
11
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
TYPICAL CHARACTERISTICS (continued)
For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF,
unless otherwise noted
TPS73101
RMS NOISE VOLTAGE vs CADJ
TPS73101
IFB vs TEMPERATURE
60
55
50
45
40
35
30
25
20
160
140
120
100
80
60
VOUT = 2.5V
40
µ
COUT = 0 F
Ω
R1 = 39.2k
20
10Hz < Frequency < 100kHz
0
10p
100p
1n
10n
−
−
25
50
0
25
50
75
100
125
CFB (F)
_
Temperature ( C)
Figure 28.
Figure 29.
TPS73101
TPS73101
LOAD TRANSIENT, ADJUSTABLE VERSION
LINE TRANSIENT, ADJUSTABLE VERSION
CFB = 10nF
VOUT = 2.5V
CFB = 10nF
Ω
R1 = 39.2k
µ
COUT = 0 F
µ
COUT = 0 F
VOUT
VOUT
100mV/div
100mV/div
50mV/div
50mV/div
µ
COUT = 10 F
VOUT
µ
COUT = 10 F
VOUT
4.5V
150mA
3.5V
VIN
10mA
IOUT
µ
µ
25 s/div
5 s/div
Figure 30.
Figure 31.
12
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
APPLICATION INFORMATION
The TPS731xx belongs to a family of new generation
LDO regulators that use an NMOS pass transistor to
achieve ultra-low-dropout performance, reverse
current blockage, and freedom from output capacitor
constraints. These features, combined with low noise
and an enable input, make the TPS731xx ideal for
portable applications. This regulator family offers a
wide selection of fixed output voltage versions and an
adjustable output version. All versions have thermal
and over-current protection, including foldback
current limit.
INPUT AND OUTPUT CAPACITOR
REQUIREMENTS
Although an input capacitor is not required for
stability, it is good analog design practice to connect
a 0.1 μF to 1 μF low ESR capacitor across the input
supply near the regulator. This counteracts reactive
input sources and improves transient response, noise
rejection, and ripple rejection.
A
higher-value
capacitor may be necessary if large, fast rise-time
load transients are anticipated or the device is
located several inches from the power source.
Figure 32 shows the basic circuit connections for the
fixed voltage models. Figure 33 gives the connections
for the adjustable output version (TPS73101).
The TPS731xx does not require an output capacitor
for stability and has maximum phase margin with no
capacitor. It is designed to be stable for all available
types and values of capacitors. In applications where
VIN – VOUT < 0.5 V and multiple low ESR capacitors
are in parallel, ringing may occur when the product of
COUT and total ESR drops below 50 nΩF. Total ESR
includes all parasitic resistances, including capacitor
ESR and board, socket, and solder joint resistance.
In most applications, the sum of capacitor ESR and
trace resistance will meet this requirement.
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
VIN
VOUT
IN
OUT
TPS731xx
GND
EN
NR
Optional bypass
capacitor to reduce
output noise.
OUTPUT NOISE
A precision band-gap reference is used to generate
the internal reference voltage, VREF. This reference is
the dominant noise source within the TPS731xx and
it generates approximately 32 μVRMS (10 Hz to
100 kHz) at the reference output (NR). The regulator
control loop gains up the reference noise with the
same gain as the reference voltage, so that the noise
voltage of the regulator is approximately given by:
Figure 32. Typical Application Circuit for
Fixed-Voltage Versions
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient
noise, or PSRR.
VOUT
VREF
(R1 ) R2)
VN + 32mVRMS
+ 32mVRMS
VIN
VOUT
IN
OUT
FB
R2
(1)
TPS73101
R1
CFB
Since the value of VREF is 1.2 V, this relationship
reduces to:
EN
GND
R2
mVRMS
V
ǒ Ǔ
VN(mVRMS) + 27
VOUT(V)
Optional capacitor
reduces output noise
and improves
(R1 + R2)
(2)
VOUT
=
x 1.204
R2
for the case of no CNR
.
transient response.
An internal 27 kΩ resistor in series with the noise
reduction pin (NR) forms a low-pass filter for the
voltage reference when an external noise reduction
capacitor, CNR, is connected from NR to ground. For
CNR = 10 nF, the total noise in the 10 Hz to 100 kHz
bandwidth is reduced by a factor of ~3.2, giving the
approximate relationship:
Figure 33. Typical Application Circuit for
Adjustable-Voltage Versions
R1 and R2 can be calculated for any output voltage
using the formula shown in Figure 33. Sample
resistor values for common output voltages are
shown in Figure 3. For the best accuracy, make the
parallel combination of R1 and R2 approximately
19 kΩ.
mVRMS
V
ǒ Ǔ
VN(mVRMS) + 8.5
VOUT(V)
(3)
13
for CNR = 10nF.
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
This noise reduction effect is shown as RMS Noise
Voltage vs CNR in the Typical Characteristics section.
DROPOUT VOLTAGE
The TPS731xx uses an NMOS pass transistor to
achieve extremely low dropout. When (VIN – VOUT) is
less than the dropout voltage (VDO), the NMOS pass
device is in its linear region of operation and the
input-to-output resistance is the RDS-ON of the NMOS
pass element.
The TPS73101 adjustable version does not have the
noise-reduction pin available. However, connecting a
feedback capacitor, CFB, from the output to the FB pin
reduces output noise and improves load transient
performance.
The TPS731xx uses an internal charge pump to
develop an internal supply voltage sufficient to drive
the gate of the NMOS pass element above VOUT. The
charge pump generates ~250 μV of switching noise
at ~4 MHz; however, charge-pump noise contribution
is negligible at the output of the regulator for most
For large step changes in load current, the TPS731xx
requires a larger voltage drop across it to avoid
degraded transient response. The boundary of this
transient dropout region is approximately twice the dc
dropout. Values of VIN – VOUT above this line ensure
normal transient response.
values of IOUT and COUT
.
Operating in the transient dropout region can cause
an increase in recovery time. The time required to
recover from a load transient is a function of the
magnitude of the change in load current rate, the rate
of change in load current, and the available
headroom (VIN to VOUT voltage drop). Under
worst-case conditions (full-scale instantaneous load
change with (VIN – VOUT) close to dc dropout levels),
BOARD LAYOUT RECOMMENDATION TO
IMPROVE PSRR AND NOISE PERFORMANCE
To improve ac performance such as PSRR, output
noise, and transient response, it is recommended that
the PCB be designed with separate ground planes for
VIN and VOUT, with each ground plane connected only
at the GND pin of the device. In addition, the ground
connection for the bypass capacitor should connect
directly to the GND pin of the device.
the TPS731xx can take
a couple of hundred
microseconds to return to the specified regulation
accuracy.
TRANSIENT RESPONSE
INTERNAL CURRENT LIMIT
The low open-loop output impedance provided by the
The TPS731xx internal current limit helps protect the
regulator during fault conditions. Foldback current
helps to protect the regulator from damage during
output short-circuit conditions by reducing current
limit when VOUT drops below 0.5 V. See Figure 12 in
the Typical Characteristics section for a graph of
NMOS pass element in
a
voltage follower
configuration allows operation without an output
capacitor for many applications. As with any
regulator, the addition of a capacitor (nominal value
1 μF) from the output pin to ground reduces
undershoot magnitude but increases duration. In the
IOUT vs VOUT
.
adjustable version, the addition of a capacitor, CFB
,
from the output to the adjust pin also improves the
transient response.
SHUTDOWN
The Enable pin is active high and is compatible with
standard TTL-CMOS levels. VEN below 0.5 V (max)
turns the regulator off and drops the ground pin
current to approximately 10 nA. When shutdown
capability is not required, the Enable pin can be
connected to VIN. When a pullup resistor is used and
operation down to 1.8 V is required, use pullup
resistor values below 50 kΩ.
The TPS731xx does not have active pulldown when
the output is overvoltage. This allows applications
that connect higher voltage sources, such as
alternate power supplies, to the output. This also
results in an output overshoot of several percent if the
load current quickly drops to zero when a capacitor is
connected to the output. The duration of overshoot
can be reduced by adding a load resistor. The
overshoot decays at a rate determined by output
capacitor COUT and the internal/external load
resistance. The rate of decay is given by:
(Fixed voltage version)
VOUT
dVńdt +
COUT 80kW ø RLOAD
(4)
14
Submit Documentation Feedback
Copyright © 2006–2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
TPS73101-EP, TPS73115-EP
TPS731125-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP
TPS73132-EP, TPS73133-EP, TPS73150-EP
www.ti.com
SGLS347A–JUNE 2006–REVISED SEPTEMBER 2007
(Adjustable voltage version)
35°C above the maximum expected ambient
condition of your application. This produces
worst-case junction temperature of 125°C at the
highest expected ambient temperature and
worst-case load.
a
VOUT
dVńdt +
(
)
COUT 80kW ø R1 ) R2 ø RLOAD
(5)
REVERSE CURRENT
The internal protection circuitry of the TPS731xx has
been designed to protect against overload conditions.
It was not intended to replace proper heatsinking.
Continuously running the TPS731xx into thermal
shutdown will degrade device reliability.
The NMOS pass element of the TPS731xx provides
inherent protection against current flow from the
output of the regulator to the input when the gate of
the pass device is pulled low. To ensure that all
charge is removed from the gate of the pass element,
the enable pin must be driven low before the input
voltage is removed. If this is not done, the pass
element may be left on due to stored charge on the
gate.
POWER DISSIPATION
The ability to remove heat from the die is different for
each
package
type,
presenting
different
considerations in the PCB layout. The PCB area
around the device that is free of other components
moves the heat from the device to the ambient air.
Performance data for JEDEC low-K and high-K
boards are shown in the Power Dissipation Ratings
table. Using heavier copper increases the
effectiveness in removing heat from the device. The
addition of plated through-holes to heat-dissipating
layers also improves the heatsink effectiveness.
After the enable pin is driven low, no bias voltage is
needed on any pin for reverse current blocking. Note
that reverse current is specified as the current flowing
out of the IN pin due to voltage applied on the OUT
pin. There is additional current flowing into the OUT
pin due to the 80-kΩ internal resistor divider to
ground (see Figure 2 and Figure 3).
For the TPS73101, reverse current may flow when
VFB is more than 1 V above VIN.
Power dissipation depends on input voltage and load
conditions. Power dissipation is equal to the product
of the output current times the voltage drop across
the output pass element (VIN to VOUT):
THERMAL PROTECTION
Thermal protection disables the output when the
junction temperature rises to approximately 160°C,
allowing the device to cool. When the junction
temperature cools to approximately 140°C, the output
circuitry is again enabled. Depending on power
dissipation, thermal resistance, and ambient
temperature, the thermal protection circuit may cycle
on and off. This limits the dissipation of the regulator,
protecting it from damage due to overheating.
PD = (VIN – VOUT) × IOUT
Power dissipation can be minimized by using the
lowest possible input voltage necessary to ensure the
required output voltage.
Package Mounting
Solder pad footprint recommendations for the
TPS731xx are presented in Application Bulletin
Solder Pad Recommendations for Surface-Mount
Devices (AB-132), available from the Texas
Instruments web site at www.ti.com.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an
inadequate heatsink. For reliable operation, junction
temperature should be limited to 125°C maximum. To
estimate the margin of safety in a complete design
(including
heatsink),
increase
the
ambient
temperature until the thermal protection is triggered;
use worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
Copyright © 2006–2007, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP
PACKAGE OPTION ADDENDUM
www.ti.com
18-Mar-2009
PACKAGING INFORMATION
Orderable Device
TPS73101MDBVREP
TPS731125MDBVREP
TPS73115MDBVREP
TPS73118MDBVREP
TPS73125MDBVREP
TPS73130MDBVREP
TPS73132MDBVREP
TPS73133MDBVREP
TPS73150MDBVREP
V62/06652-01XE
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-02XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-03XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-04XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-05XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-06XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-07XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-08XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
V62/06652-09XE
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Mar-2009
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS73101-EP, TPS731125-EP, TPS73115-EP, TPS73118-EP, TPS73125-EP, TPS73130-EP,
TPS73132-EP, TPS73133-EP, TPS73150-EP :
Catalog: TPS73101, TPS731125, TPS73115, TPS73118, TPS73125, TPS73130, TPS73132, TPS73133, TPS73150
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS73101MDBVREP
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
5
5
5
5
5
5
5
5
5
3000
3000
3000
3000
3000
3000
3000
3000
3000
179.0
179.0
179.0
179.0
179.0
179.0
179.0
179.0
179.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
TPS731125MDBVREP SOT-23
TPS73115MDBVREP
TPS73118MDBVREP
TPS73125MDBVREP
TPS73130MDBVREP
TPS73132MDBVREP
TPS73133MDBVREP
TPS73150MDBVREP
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS73101MDBVREP
TPS731125MDBVREP
TPS73115MDBVREP
TPS73118MDBVREP
TPS73125MDBVREP
TPS73130MDBVREP
TPS73132MDBVREP
TPS73133MDBVREP
TPS73150MDBVREP
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
5
5
5
5
5
5
5
5
5
3000
3000
3000
3000
3000
3000
3000
3000
3000
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
www.ti.com/industrial
www.ti.com/medical
www.ti.com/security
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Medical
Security
Logic
Space, Avionics and Defense www.ti.com/space-avionics-defense
Power Mgmt
power.ti.com
Transportation and
Automotive
www.ti.com/automotive
Microcontrollers
RFID
microcontroller.ti.com
www.ti-rfid.com
Video and Imaging
Wireless
www.ti.com/video
www.ti.com/wireless-apps
RF/IF and ZigBee® Solutions www.ti.com/lprf
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
相关型号：
TPS73131DBVR
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73131DBVRG4
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73131DBVT
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73131DBVTG4
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132-EP
具有反向电流保护功能的无电容 NMOS 150mA 低压降稳压器（增强型产品）Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132DBVR
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132DBVRG4
Single Output LDO, 150mA, Fixed(3.2V), Cap free, Low Noise, Fast Transient Response 5-SOT-23 -40 to 85Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132DBVT
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132DBVTG4
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73132MDBVREP
CAP-FREE NMOS 150 mA LOW DROPOUT REGULATOR WITH REVERSE CURRENT PROTECTIONWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TPS73133
Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current ProtectionWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
©2020 ICPDF网 联系我们和版权申明