TPS75100YFFT [TI]
具有 PWM 亮度控制功能的 10mA/通道低压降双列 LED 驱动器 | YFF | 9 | -40 to 85;
| 型号： | TPS75100YFFT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 PWM 亮度控制功能的 10mA/通道低压降双列 LED 驱动器 | YFF | 9 | -40 to 85 驱动 接口集成电路 驱动器 |
| 文件： | 总28页 (文件大小：1516K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS75100, TPS75103, TPS75105
SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
TPS7510x Low Dropout, Two-Bank LED Driver With PWM Brightness Control
1 Features
3 Description
The TPS7510x linear low dropout (LDO) matching
LED current source is optimized for low-power
keypad and navigation pad LED backlighting
applications. The device provides a constant current
to up to four unmatched LEDs organized in two banks
of two LEDs each in a common-cathode topology.
Without an external resistor, the current source
defaults to a factory-programmable, preset current
level with ±0.5% accuracy (typical). An optional
external resistor can be used to set initial brightness
to user-programmable values with higher accuracy.
Brightness can be varied from off to full brightness by
inputting a pulse width modulation (PWM) signal on
each enable pin (ENx, where x indicates LED bank A
or B). Each bank has independent enable and
brightness control, but current matching is done to all
four channels concurrently. The input supply range is
ideally suited for single-cell Li-Ion battery supplies
and the TPS7510x can provide up to 25 mA per LED.
1
•
Regulated Output Current with 2% LED-to-LED
Matching
•
•
Drives Up to Four LEDs at 25 mA Each in a
Common Cathode Topology
28-mV Typical Dropout Voltage Extends Usable
Supply Range in Li-Ion Battery Applications
•
•
Brightness Control Using PWM Signals
Two 2-LED Banks With Independent Enable and
PWM Brightness Control per Bank
•
•
No Internal Switching Signals—Eliminates EMI
Default LED Current Eliminates External
Components
–
Default Values from 3 mA to 10 mA (in 1-mA
Increments) Available Using Innovative Factory
EEPROM Programming
–
Optional External Resistor can be Used for
High-Accuracy, User-Programmable Current
No internal switching signals are used, eliminating
troublesome electromagnetic interference (EMI). The
TPS7510x is offered in an ultra-small, 9-ball, 0.4-mm
ball-pitch wafer chip-scale package (WCSP) and a
2.50-mm × 2.50-mm, 10-pin WSON package, yielding
a very compact total solution size ideal for mobile
handsets and portable backlighting applications. The
device is fully specified over TJ = –40°C to +85°C.
•
•
Over current and Over temperature Protection
Available in Wafer Chip-Scale Package
or 2.50-mm × 2.50-mm WSON-10
2 Applications
•
•
•
•
Keypad and Display Backlighting
White and Color LEDs
Cellular Handsets
Device Information(1)
PART NUMBER
PACKAGE
WSON (10)
DSBGA (9)
BODY SIZE (NOM)
2.50 mm × 2.50 mm
1.208 mm x 1.208 mm
PDAs and Smartphones
TPS7510x
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Diagram
VBATT
TPS7510x
VIN
D1A
D2A
VENA
VENB
ENA
ENB
D1B
D2B
ISET
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS75100, TPS75103, TPS75105
SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features.................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 9
7.4 Device Functional Modes.......................................... 9
8
Application and Implementation ........................ 10
8.1 Application Information............................................ 10
8.2 Typical Application .................................................. 12
Power Supply Recommendations...................... 14
9
10 Layout................................................................... 14
10.1 Layout Guidelines ................................................. 14
10.2 Layout Example .................................................... 14
11 Device and Documentation Support ................. 15
11.1 Device Support...................................................... 15
11.2 Documentation Support ........................................ 15
11.3 Related Links ........................................................ 15
11.4 Receiving Notification of Documentation Updates 15
11.5 Community Resources.......................................... 15
11.6 Trademarks........................................................... 16
11.7 Electrostatic Discharge Caution............................ 16
11.8 Glossary................................................................ 16
7
12 Mechanical, Packaging, and Orderable
Information ........................................................... 16
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (November 2013) to Revision J
Page
•
Added Device Information table, Typical Application Diagram title to front-page diagram, ESD Ratings table,
Thermal Information table, Feature Description section, Device Functional Modes section, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
Changed SON to WSON throughout document .................................................................................................................... 1
Deleted pin out drawings from Typical Application Diagram figure........................................................................................ 1
Changed I/O status to I from O in D1B row of Pin Functions table ....................................................................................... 3
Deleted Dissipation Ratings table........................................................................................................................................... 4
•
•
•
•
Changes from Revision H (January 2010) to Revision I
Page
•
•
Changed test conditions for ground current parameter in the Electrical Characteristics ....................................................... 5
Deleted Figure 14; duplicate mechanical image. ................................................................................................................. 12
Changes from Revision G (March 2009) to Revision H
Page
•
Revised ground current parameter, Electrical Characteristics; changed symbol from IQ to IGND; added specifications
for YFF and DSK packages.................................................................................................................................................... 5
Added YFF and DSK package specifications for current matching parameter, Electrical Characteristics ............................ 5
Changed diode current accuracy parameter, Electrical Characteristics, to reflect YFF and DSK package specifications.... 5
Deleted operating junction temperature range specification from Electrical Characteristics table to eliminate redundancy . 5
•
•
•
2
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TPS75100, TPS75103, TPS75105
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SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
5 Pin Configuration and Functions
YFF Package
9-Pin DSBGA
Top View
DSK Package
10-Pin WSON
Top View
A3 B3
A2 B2
A1 B1
C3
C2
C1
ENB
ENA
D1A
D2A
GND
1
2
3
4
5
10 ISET
9
8
7
6
VIN
GND
D1B
D2B
NC(1)
NOTE (1): Not connected
Pin Functions
PIN
I/O
DESCRIPTION
NAME
WCSP
WSON
Enable pin, Bank A. Driving this pin high turns on the current source to Bank A
outputs. Driving this pin low turns off the current source to Bank A outputs. An
applied PWM signal reduces the LED current (between 0 mA and the maximum
current set by ISET) as a function of the duty cycle of the PWM signal. ENA and
ENB can be tied together. ENA can be left OPEN or connected to GND if not used.
See the Application and Implementation section for more details.
ENA
A3
2
I
D1A
D2A
B3
C3
3
4
O
O
Diode source current output, Bank A. Connect to LED anode.
Diode source current output, Bank A. Connect to LED anode.
Enable pin, Bank B. Driving this pin high turns on the current source to Bank B
outputs. Driving this pin low turns off the current source to Bank B outputs. An
applied PWM signal reduces the LED current (between 0 mA and the maximum
current set by ISET) as a function of the duty cycle of the PWM signal. ENA and
ENB can be tied together. ENB can be left OPEN or connected to GND if not used.
See the Application and Implementation section for more details.
ENB
A2
1
I
VIN
B2
C2
9
I
Supply input
Ground
GND
5, Pad
—
An optional resistor can be connected between this pin and GND to set the
maximum current through the LEDs. If no resistor is connected, ISET defaults to the
internally programmed value.
ISET
A1
10
I
D1B
D2B
NC
B1
C1
—
8
7
6
O
O
Diode source current output, Bank B. Connect to LED anode.
Diode source current output, Bank B. Connect to LED anode.
Not internally connected
—
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SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
MIN
–0.3
–0.3
35
MAX
7
UNIT
V
VIN range
VISET, VENA, VENB, VDX range
IDX for D1A, D2A, D1B, D2B
D1A, D2A, D1B, D2B short-circuit duration
Continuous total power dissipation
Junction temperature, TJ
VIN
V
mA
Indefinite
Internally limited
–55
–55
150
150
°C
°C
Storage temperature, Tstg
6.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
PARAMETER
MIN
2.7
3
NOM
MAX
UNIT
V
VIN
IDX
Input voltage
5.5
25
Operating current per LED
mA
µs
tPWM
TJ
On-time for PWM signal
33
Operating junction temperature range
–40
85
°C
6.4 Thermal Information
TPS7510x
THERMAL METRIC(1)
YFF (DSBGA)
9 PINS
101.6
1.2
DSK (WSON)
10 PINS
65.3
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
54.0
17.6
39.5
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.6
1.6
ψJB
17.8
39.7
RθJC(bot)
N/A
23.6
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
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SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
6.5 Electrical Characteristics
over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8 V, DxA and DxB = 3.3 V, RSET = 32.4 kΩ, and
ENA and ENB = 3.8 V (unless otherwise noted); typical values are at TA = 25°C
PARAMETER
TEST CONDITIONS
VENA,B = 0 V, VDX = 0 V
MIN
TYP
0.03
170
250
170
250
2%
MAX
1
UNIT
ISHDN
Shutdown supply current
µA
I
DX ≤ 5 mA, VIN = 3.8 V
IDX > 5 mA, VIN = 3.8 V
DX ≤ 5 mA, VIN = 4.5 V
230
300
200
300
4%
DSK
package
IGND
Ground current
µA
I
YFF
package
IDX > 5 mA, VIN = 4.5 V
TA = 25°C
0%
0%
YFF
Current matching
(IDXMAX – IDXMIN / IDXMAX) × 100%
5%
6%
ΔID
package
TA = –40°C to +85°C
DSK
0%
package
ΔIDX%/ΔVIN
ΔIDX%/ΔVDX
Line regulation
Load regulation
3.5 V ≤ VIN ≤ 4.5 V, IDX = 5 mA
1.8 V ≤ VDX ≤ 3.5 V, IDX = 5 mA
IDXnom = 5 mA
2.0
0.8
28
%/V
%/V
Dropout voltage of any
DX current source
(VDX at IDX = 0.8 × IDX, nom
100
VDO
mV
V
IDXnom = 15 mA
70
)
VISET
Reference voltage for current set
1.183
1.225
1.257
3%
YFF
package
0.5%
0.5%
ISET = open,
IOPEN
Diode current accuracy(1)
VDX = VIN – 0.2 V
DSK
4%
package
ISET
k
ISET pin current range
2.5
1.2
62.5
µA
ISET to IDX current ratio(1)
Enable high level input voltage
Enable low level input voltage
420
VIH
VIL
V
V
0.4
6.1
VENA = 3.8 V
VENA = 1.8 V
VENB = 3.8 V
VENB = 1.8 V
5.0
2.2
4.0
1.8
IINA
Enable pin A (VENA) input current
Enable pin B (VENB) input current
µA
µA
4.9
30
IINB
Delay from ENA and ENB = low to
reach shutdown current
(IDX = 0.1 × IDX, nom
tSD
Shutdown delay time
5
13
µs
°C
)
Shutdown, temperature increasing
Reset, temperature decreasing
165
140
TSD
Thermal shutdown temperature
(1) Average of all four IDX outputs.
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6.6 Typical Characteristics
over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8 V, DxA and DxB = 3.3 V, RSET = 32.4 kΩ, and
ENA and ENB = high (unless otherwise noted); typical values are at TA = 25°C
25
20
3.9V
1V/div
VIN
15
10
5
3.6V
0.5mA/div
IOUT
0
20ms/div
0
10
20
30
40
50
60
70
80
90 100
Duty Cycle (%)
Figure 2. Line Transient (600-mV Pulse)
Figure 1. LED Current vs Duty Cycle (f = 300 Hz)
1.2V
3.6V
1V/div
3.3V
VIN
0.4V
1V/div
ENA = ENB
20mA/div
IOUT
0.5mA/div
IOUT
20ms/div
20ms/div
Figure 4. Dimming Response (Both Channels)
Figure 3. Line Transient (300-mV Pulse)
25
20
15
10
5
ENA = 3.8V
-40°C
1.2V
0.4V
1V/div
ENB
+25°C
+85°C
20mA/div
IOUT
0
20ms/div
0
0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20
V
IN - VOUT (V)
Figure 5. Dimming Response (Single Channel)
Figure 6. Output Current vs Headroom Voltage
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SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
Typical Characteristics (continued)
over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8 V, DxA and DxB = 3.3 V, RSET = 32.4 kΩ, and
ENA and ENB = high (unless otherwise noted); typical values are at TA = 25°C
28
26
24
22
20
18
16
14
12
10
8
28
26
24
22
20
18
16
14
12
10
8
Expanded Range
6
6
4
4
2
2
0
0
20 60 100 140 180 220 260 300 340 380 420 460 500
20
30
40
50
60
70
80
90
100
RSET (kW)
RSET (kW)
Figure 7. Output Current vs RSET
Figure 8. Output Current vs RSET
180
175
170
165
160
155
5.4
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
+25°C
-40°C
+85°C
+85°C
+25°C
-40°C
2.5
3.0
3.5
4.0
4.5
5.0
5.5
3.4
3.9
4.4
4.9
5.4
5.9
VIN (V)
VIN (V)
Figure 9. Ground Current vs Input Voltage
Figure 10. TPS75105 Output Current vs Input Voltage
RSET = Open
5.4
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
20
18
16
14
12
10
8
IOUT D1B
IOUT D2B
IOUT D2A
IOUT D1A
6
+85°C
+25°C
-40°C
4
2
0
-40
-20
0
20
40
60
80 85
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Temperature (°C)
VOUT (V)
Figure 11. TPS75105 Output Current vs Temperature
RSET = Open
Figure 12. Output Current vs Output Voltage
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7 Detailed Description
7.1 Overview
The TPS7510x linear low dropout (LDO) matching LED current source is optimized for low-power keypad and
navigation pad LED backlighting applications. The device provides a constant current to up to four unmatched
LEDs organized in two banks of two LEDs each in a common-cathode topology. Brightness can be varied from
off to full brightness by inputting a pulse width modulation (PWM) signal on each enable pin (ENx, where x
indicates LED bank A or B). Each bank has independent enable and brightness control, but current matching is
done to all four channels concurrently. The input supply range is ideally suited for single-cell Li-Ion battery
supplies and the TPS7510x can provide up to 25 mA per LED.
7.2 Functional Block Diagram
Controlled Current Source
D1A
D2A
D1B
Control
Logic
ENA
800kW
Controlled Current Source
Controlled Current Source
ENB
Control
Logic
1MW
VIN
D2B
Controlled Current Source
Int/Ext
Set Current
Sense
ISET
Current
Reference
GND
8
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7.3 Feature Description
7.3.1 Load Regulation
The TPS7510x is designed to provide very tight load regulation. In the case of a fixed current source, the output
load change is a change in voltage. Tight load regulation means that output voltages (LED forward voltages) with
large variations can be used without impacting the fixed current being sourced by the output or the output-to-
output current matching. The permissible variation on the output not only allows for large variations in white LED
forward voltages, but even permits the use of different color LEDs on different outputs with minimal effect on
output current.
7.3.2 Line Regulation
The TPS7510x is also designed to provide very tight line regulation. This architecture allows for voltage transient
events to occur on the power supply (battery) without effecting the fixed output current levels or the output-to-
output current matching. A prime example of such a supply transient event is the occurrence of a transmit pulse
on the radio of a mobile handset. These transient pulses can cause variations of 300 mV and 600 mV on the
supply to the TPS7510x. The line regulation limitation is that the lower supply voltage level of the event does not
cause the input-to-output voltage difference to drop below the dropout voltage range.
7.4 Device Functional Modes
7.4.1 LED ON
Apply 1.2 V or more to ENx to turn the LED bank on.
7.4.2 LED OFF
Apply a voltage less than or equal to 0.4V to ENx to turn the LED bank off.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS7510x provides a constant current to up to four unmatched LEDs organized in two banks of two LEDs
each in a common-cathode topology. Without an external resistor, the current source defaults to a factory-
programmable, preset current level with ±0.5% accuracy (typical). An optional external resistor can be used to
set initial brightness to user-programmable values with higher accuracy. Brightness can be varied from off to full
brightness by inputting a pulse width modulation (PWM) signal on each enable pin (ENx, where x indicates LED
bank A or B). Each bank has independent enable and brightness control, but current matching is done to all four
channels concurrently. The input supply range is ideally suited for single-cell Li-Ion battery supplies and the
TPS7510x can provide up to 25 mA per LED. No internal switching signals are used, eliminating troublesome
electromagnetic interference (EMI). The device is fully specified over TJ = –40°C to +85°C.
8.1.1 Setting the Output Current Level
The TPS7510x is a quad matched current source. Each of the four current source output levels is set by a single
reference current. An internal voltage reference of 1.225 V (nominal) in combination with a resistor sets the
reference current level. This reference current is then mirrored onto each of the four outputs with a ratio of
typically 420:1. The resistor required to set the LED current is calculated using Equation 1:
K ´ VISET
RISET
=
ILED
where:
•
•
•
K is the current ratio
VISET is the internal reference voltage
ILED is the desired LED current
(1)
For example, to set the LED current level to 10mA, a resistor value of 51.1 kΩ is required. This value sets up a
reference current of 23.9 μA (1.22 V / 51.1 kΩ). In turn, this reference current is mirrored to each output current
source, resulting in an output current of 10 mA (23.9 μA × 420).
The TPS7510x offers two methods for setting the output current levels. The LED current is set either by
connecting a resistor (calculated using Equation 1) from the ISET pin to GND, or leaving ISET unconnected to
employ the factory-programmed RSET resistance. The internal programmed resistance is implemented using
high-precision processing and yields a reference current accuracy of 0.5%, nominal. Accuracy using external
resistors is subject to the tolerance of the external resistor and the accuracy of the internal reference voltage.
The TPS7510x automatically detects the presence of an external resistor by monitoring the current out of the ISET
pin. Current levels in excess of 3 μA signify the presence of an external resistor and the device uses the external
resistor to set the reference current. If the current from ISET is less than 3 μA, the device defaults to the preset
internal reference set resistor. The TPS7510x is available with eight preset current levels, from 3 mA to 10 mA
(per output) in 1-mA increments. Solutions using the preset internal current level eliminate an external
component, thereby increasing accuracy and reducing cost.
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SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
Application Information (continued)
Table 1. Recommended (1% Tolerance) Set Resistor Values
RSET (kΩ)
511
ISET (μA)
2.4
IDX (mA)(1)
1.0
255
4.8
2.0
169
7.2
3.0
127
9.6
4.1
102
12.0
14.5
16.7
18.9
21.8
24.0
26.4
29.0
31.3
33.6
36.0
37.8
40.7
42.7
45.9
48.0
50.4
52.8
55.4
57.0
59.8
5.0
84.5
73.2
64.9
56.2
51.1
46.4
42.2
39.2
36.5
34.0
32.4
30.1
28.7
26.7
25.5
24.3
23.2
22.1
21.5
20.5
6.1
7.0
7.9
9.2
10.1
11.1
12.2
13.1
14.1
15.1
15.9
17.1
17.9
19.3
20.2
21.2
22.2
23.3
23.9
25.1
(1) IDX = (VSET / RSET) × k.
8.1.2 Limitations on LED Forward Voltages
The TPS7510x is a linear current source implementing LDO regulator building blocks. Therefore, to maintain
accurate operation, there are some limitations to the forward (output) voltages that can be used. The first
limitation is the maximum LED forward voltage. The dropout voltage must be considered because LDO
technology is employed. The TPS7510x is an ultra-low dropout device with typical dropouts in the range of 30
mV at 5 mA. Care must be taken in the design to ensure that the difference between the lowest possible input
voltage (for example, battery cut-off) and the highest possible forward voltage yields at least 100 mV of
headroom. Headroom levels less than dropout decrease the accuracy of the current source (see Figure 6).
The other limitation to consider is the minimum output voltage required to yield accurate operation. The current
source employs NMOS MOSFETs, and a minimum forward LED voltage of approximately 1.5 V on the output is
required to maintain highest accuracy. The TPS7510x is ideal for white LEDs and color LEDs with forward
voltages greater than 1.5 V. This range includes red LEDs that have typical forward voltages of 1.7 V.
8.1.3 Use of External Capacitors
The TPS7510x does not require the use of any external capacitors for stable operation. Nominal stray and
power-supply decoupling capacitance on the input is adequate for stable operation. Capacitors are not needed
for stability and are therefore not recommended on the outputs.
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8.1.4 Use of Unused Outputs or Tying Outputs Together
Unused outputs can be left unconnected or tied to the VIN supply. Although open outputs are acceptable, tying
unused outputs to the VIN supply increases ESD protection. Connecting unused outputs to ground violates the
minimum recommended output voltage, results in current levels that potentially exceed the set or preset LED
current, and must be avoided.
Connecting outputs in parallel is an acceptable way of increasing the amount of LED current drive. This
configuration is a useful trick when the higher current level is a multiple of the preset value.
8.1.5 Use of Enable Pins for PWM Dimming
The TPS7510x divides control of the LED outputs into two banks of two current sources each. Each bank is
controlled by the use of an independent, active-high enable pin (ENA and ENB). The enable pin can be used for
standard ON or OFF operation of the current source, driven by standard logic levels from processor GPIO pins,
for example. Drive ENx high to turn on the bank of LEDs; drive ENx low to turn off the bank of LEDs.
Another use of the enable pins is for LED dimming. LED brightness is a function of the current level being driven
across the diode and the time that current is being driven through the diode. The perceived brightness of an LED
can be changed by either varying the current level or, more effectively, by changing the time in which that current
is present. When a PWM signal is input into the enable pin, the duty cycle (high- or on-time) determines how
long the fixed current is driven across the LEDs. Reducing or increasing that duration has the effect of dimming
or brightening the LED, without having to employ the more complex method of varying the current level. This
technique is particularly useful for reducing LED brightness in low ambient light conditions, where LED brightness
is not required, thereby decreasing current consumption. The enable pins can also be used for LED blinking,
varying blink rates based on system status.
Although providing many useful applications, PWM dimming does have a minimum duty cycle required to
achieve the required current level. The recommended minimum on-time of the TPS7510x is approximately 33 μs.
On-times less than 33 μs result in reductions in the output current by not allowing enough time for the output to
reach the desired current level. Also, having both enables switching together, asynchronously, or having one
enable on at all times, effects the minimum recommended on-time (see Figure 4 and Figure 5). If one enable is
already on, the speed at which the other channel turns on is faster than if both channels are turning on together
or if the other channel is off. Therefore, already having one channel enabled allows for approximately 10-μs to
12-μs shorter minimum on-times for the switching channel.
Unused enable pins can be left unconnected or connected to ground to minimize current consumption.
Connecting unused enable pins to ground increases ESD protection. If connected to VIN, a small amount of
current drains through the enable input (see the Electrical Characteristics table).
8.2 Typical Application
TPS7510x
ENA
ENB
D1A
D2A
D1B
D2B
Dimming PWM
or CPU GPIO
VIN
Li-Ion
Battery
ISET
GND
RSET
(optional)
Figure 13. Typical Application Diagram
12
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Product Folder Links: TPS75100 TPS75103 TPS75105
TPS75100, TPS75103, TPS75105
www.ti.com
SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
Typical Application (continued)
8.2.1 Design Requirements
Table 2 shows the design requirements.
Table 2. Design Parameters
PARAMETER
DESIGN REQUIREMENT
Input voltage
Number of LEDs
LED current
3.8 V
4
5 mA (per LED)
8.2.2 Detailed Design Procedure
Select the TPS75105 so that no external resistor is required to set the LED current.
8.2.3 Application Curve
5.4
5.3
IOUT D1B
IOUT D2B
5.2
5.1
5.0
4.9
4.8
4.7
4.6
IOUT D2A
IOUT D1A
-40
-20
0
20
40
60
80 85
Temperature (°C)
RSET = open
Figure 14. TPS75105 Output Current vs Temperature
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www.ti.com
9 Power Supply Recommendations
The TPS7510x is designed to operate with an input voltage between 2.7 V to 5.5 V.
10 Layout
10.1 Layout Guidelines
Figure 15 demonstrates an example layout for the WSON package.
10.2 Layout Example
w{9Ç
ENB
ENA
VIN
GND PLANE
Figure 15. Layout Example for the WSON (DSK) Package
14
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Product Folder Links: TPS75100 TPS75103 TPS75105
TPS75100, TPS75103, TPS75105
www.ti.com
SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
Two evaluation modules (EVMs) are available to assist in the initial circuit performance evaluation using the
TPS7510x. The TPS75105EVM-174 and TPS75105DSKEVM-529 evaluation modules (and related user guides)
can be requested at the Texas Instruments website through the product folders or purchased directly from the TI
eStore.
11.1.2 Device Nomenclature
PRODUCT ID
OPTIONS(1)(2)
X is the nominal default diode output current (for example, 3 = 3 mA, 5 = 5 mA, and 0 = 10 mA).
YYY is the package designator.
TPS7510x yyyz
Z is the reel quantity (R = 3000, T = 250).
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Default set currents from 3 mA to 10 mA in 1-mA increments are available through the use of innovative factory EEPROM programming.
Minimum order quantities may apply. Contact factory for details and availability.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
•
•
TPS75105EVM-174 Evaluation Module (SLVU182)
TPS75105DSKEVM-529 Evaluation Module (SLVU334)
11.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related Links
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TPS75100
TPS75103
TPS75105
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
Click here
11.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
Copyright © 2006–2016, Texas Instruments Incorporated
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TPS75100, TPS75103, TPS75105
SBVS080J –SEPTEMBER 2006–REVISED NOVEMBER 2016
www.ti.com
11.6 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.7 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16
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Product Folder Links: TPS75100 TPS75103 TPS75105
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS75100DSKR
TPS75100DSKT
TPS75100YFFR
TPS75100YFFT
TPS75103YFFR
TPS75103YFFT
TPS75105DSKR
TPS75105DSKT
TPS75105YFFR
TPS75105YFFT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SON
SON
DSK
DSK
YFF
YFF
YFF
YFF
DSK
DSK
YFF
YFF
10
10
9
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
SKX
SKX
FB
NIPDAU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
NIPDAU
NIPDAU
SNAGCU
SNAGCU
DSBGA
DSBGA
DSBGA
DSBGA
SON
9
FB
9
FC
9
FC
10
10
9
CHH
CHH
FE
SON
DSBGA
DSBGA
9
FE
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Dec-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS75100DSKR
TPS75100DSKT
TPS75100YFFR
TPS75100YFFT
TPS75103YFFR
TPS75103YFFT
TPS75105DSKR
TPS75105DSKT
TPS75105YFFR
TPS75105YFFT
SON
SON
DSK
DSK
YFF
YFF
YFF
YFF
DSK
DSK
YFF
YFF
10
10
9
3000
250
179.0
179.0
180.0
180.0
180.0
180.0
179.0
179.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
2.73
2.73
1.34
1.34
1.45
1.45
2.73
2.73
1.45
1.45
2.73
2.73
1.34
1.34
1.45
1.45
2.73
2.73
1.45
1.45
0.8
0.8
0.81
0.81
0.8
0.8
0.8
0.8
0.8
0.8
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q1
Q1
Q1
Q1
Q2
Q2
Q1
Q1
DSBGA
DSBGA
DSBGA
DSBGA
SON
3000
250
9
9
3000
250
9
10
10
9
3000
250
SON
DSBGA
DSBGA
3000
250
9
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Dec-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS75100DSKR
TPS75100DSKT
TPS75100YFFR
TPS75100YFFT
TPS75103YFFR
TPS75103YFFT
TPS75105DSKR
TPS75105DSKT
TPS75105YFFR
TPS75105YFFT
SON
SON
DSK
DSK
YFF
YFF
YFF
YFF
DSK
DSK
YFF
YFF
10
10
9
3000
250
200.0
203.0
182.0
182.0
182.0
210.0
200.0
200.0
182.0
182.0
183.0
203.0
182.0
182.0
182.0
185.0
183.0
183.0
182.0
182.0
25.0
35.0
20.0
20.0
20.0
35.0
25.0
25.0
20.0
20.0
DSBGA
DSBGA
DSBGA
DSBGA
SON
3000
250
9
9
3000
250
9
10
10
9
3000
250
SON
DSBGA
DSBGA
3000
250
9
Pack Materials-Page 2
PACKAGE OUTLINE
YFF0009
DSBGA - 0.625 mm max height
SCALE 10.000
DIE SIZE BALL GRID ARRAY
A
D
B
E
BALL A1
CORNER
0.625 MAX
C
SEATING PLANE
0.05 C
0.30
0.12
BALL TYP
0.8 TYP
C
B
SYMM
0.8
D: Max = 1.238 mm, Min =1.178 mm
E: Max = 1.238 mm, Min =1.178 mm
TYP
0.4 TYP
A
0.3
0.2
3
1
2
9X
SYMM
0.015
C A B
0.4 TYP
4219552/A 05/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YFF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
3
9X ( 0.23)
(0.4) TYP
1
2
A
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MAX
0.05 MIN
METAL UNDER
SOLDER MASK
(
0.23)
METAL
(
0.23)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219552/A 05/2016
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information,
see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YFF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
9X ( 0.25)
1
3
2
A
(0.4) TYP
B
SYMM
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4219552/A 05/2016
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
GENERIC PACKAGE VIEW
DSK 10
2.5 x 2.5 mm, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4225304/A
PACKAGE OUTLINE
DSK0010A
WSON - 0.8 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
2.6
2.4
A
B
PIN 1 INDEX AREA
2.6
2.4
0.8
0.7
C
SEATING PLANE
0.08 C
0.05
0.00
(0.2) TYP
EXPOSED
THERMAL PAD
1.2 0.1
6
5
1
2X
2
11
2
0.1
10
8X 0.5
0.3
10X
0.45
0.35
0.2
0.1
0.05
10X
PIN 1 ID
(OPTIONAL)
C A B
C
4218903/B 10/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DSK0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
10X (0.6)
(1.2)
10
1
10X (0.25)
SYMM
(2)
11
8X (0.5)
(0.75)
(R0.05) TYP
5
6
(0.35)
(
0.2) VIA
TYP
SYMM
(2.3)
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218903/B 10/2020
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DSK0010A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
10X (0.6)
SYMM
1
10
METAL
TYP
10X (0.25)
SYMM
11
8X (0.5)
(0.89)
6
(R0.05) TYP
5
(1.13)
(2.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11
84% PRINTED SOLDER COVERAGE BY AREA
SCALE:20X
4218903/B 10/2020
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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