TPS75501KTTT [TI]

FAST-TRANSIENT RESPONSE 5-A LOW-DROPOUT VOLTAGE REGULATORS; 快速瞬态响应5 -A低压差稳压器


型号：	TPS75501KTTT
厂家：	TEXAS INSTRUMENTS
描述：	FAST-TRANSIENT RESPONSE 5-A LOW-DROPOUT VOLTAGE REGULATORS 快速瞬态响应5 -A低压差稳压器稳压器
文件：	总29页 (文件大小：1074K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢂꢃ ꢄ ꢄ ꢅ ꢇ ꢆ ꢀ ꢁꢂꢃ ꢄ ꢄ ꢈ ꢄ ꢆ ꢀ ꢁꢂꢃ ꢄ ꢄ ꢉ ꢉ ꢊ ꢋꢀ ꢌ ꢁꢍ ꢊ ꢎꢏ ꢐꢍ ꢍ ꢑ ꢒ ꢓꢑ

ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TO−220 (KC) PACKAGE

(TOP VIEW)

5-A Low-Dropout Voltage Regulator

Available in 1.5-V, 1.8-V, 2.5-V, and 3.3-V

Fixed-Output and Adjustable Versions

Open Drain Power-Good (PG) Status

Output (Fixed Options Only)

GND

OUTPUT

FB/PG

Tab is GND

Dropout Voltage Typically 250 mV at 5 A

(TPS75533)

TO−263 (KTT) PACKAGE

(TOP VIEW)

Low 125 µA Typical Quiescent Current

Fast Transient Response

3% Tolerance Over Specified Conditions for

Fixed-Output Versions

GND

OUTPUT

FB/PG

Available in 5-Pin TO−220 and TO−263

Surface-Mount Packages

Tab is GND

Thermal Shutdown Protection

description

The TPS755xx family of 5-A low dropout (LDO) regulators contains four fixed voltage option regulators with

integrated power-good (PG) and an adjustable voltage option regulator. These devices are capable of supplying

5 A of output current with a dropout of 250 mV (TPS75533). Therefore, the device is capable of performing a

3.3-V to 2.5-V conversion. Quiescent current is 125 µA at full load and drops down to less than 1 µA when the

device is disabled. The TPS755xx is designed to have fast transient response for large load current changes.

TPS75533

DROPOUT VOLTAGE

TPS75515

LOAD TRANSIENT RESPONSE

JUNCTION TEMPERATURE

150

100

400

350

= 1.5 V

= 100 µF

= 5 A

= 3.3 V

300

250

200

150

−50

−100

−150

1.25 A

100

20 40 60 80 100 120 140 160 180 200

−40 −25 −10

20 35 50 65 80 95 110 125

t − Time − µs

− Junction Temperature − °C

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢅ ꢄ ꢆ ꢀ ꢁꢂ ꢃꢄ ꢄ ꢅ ꢇ ꢆ ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢈ ꢄꢆ ꢀꢁ ꢂ ꢃ ꢄꢄ ꢉ ꢉ ꢊ ꢋꢀ ꢌ ꢁꢍ ꢊ ꢎꢏ ꢐ ꢍ ꢍꢑ ꢒꢓꢑ

ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

description (continued)

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 250 mV

at an output current of 5 A for the TPS75533) and is directly proportional to the output current. Additionally, since

the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output

loading (typically 125 µA over the full range of output current). These two key specifications yield a significant

improvement in operating life for battery-powered systems.

The device is enabled when EN is connected to a low-level voltage. This LDO family also features a sleep mode;

applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than

1 µA at T = 25°C. The power-good terminal (PG) is an active low, open drain output, which can be used to

implement a power-on reset or a low-battery indicator.

The TPS755xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version

(programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% over

line, load, and temperature ranges. The TPS755xx family is available in a 5-pin TO−220 (KC) and TO−263 (KTT)

packages.

AVAILABLE OPTIONS

OUTPUT VOLTAGE

TO−220 (KC)

TO−263(KTT)

(TYP)

3.3 V

TPS75533KC

TPS75525KC

TPS75518KC

TPS75515KC

TPS75501KC

TPS75533KTT

TPS75525KTT

TPS75518KTT

TPS75515KTT

TPS75501KTT

2.5 V

1.8 V

−40°C to 125°C

1.5 V

Adjustable 1.22 V to 5 V

NOTE: The TPS75501 is programmable using an external resistor divider (see application

information). The KTT package is available taped and reeled. Add an R suffix to the

device type (e.g., TPS75501KTTR) to indicate tape and reel.

OUT

1 µF

†

47 µF

GND

†

See application information section for capacitor selection details.

Figure 1. Typical Application Configuration (For Fixed Output Options)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

functional block diagram—adjustable version

OUT

Current

Sense

UVLO

SHUTDOWN

ILIM

GND

UVLO

Thermal

External to

the Device

Shutdown

ref

= 1.22 V

Bandgap

Reference

functional block diagram—fixed version

OUT

UVLO

Current

Sense

SHUTDOWN

ILIM

GND

UVLO

Thermal

Shutdown

ref

= 1.22 V

Bandgap

Reference

Falling

Edge Delay

Terminal Functions (TPS755xx)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

Enable input

FB/PG

GND

Feedback input voltage for adjustable device/PG output for fixed options

Regulator ground

Input voltage

OUTPUT

Regulated output voltage

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TPS755xx PG timing diagram

IN1

UVLO

OUT

V (see Note A)

IT+

Threshold

Voltage

IT−

(see Note A)

Output

NOTE A: V −Trip voltage is typically 9% lower than the output voltage (91%V ). V

to V

is the hysteresis voltage.

IT−

IT+

detailed description

The TPS755xx family includes four fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, and 3.3 V), and an

adjustable regulator, the TPS75501 (adjustable from 1.22 V to 5 V). The bandgap voltage is typically 1.22 V.

pin functions

enable (EN)

The EN terminal is an input which enables or shuts down the device. If EN is a logic high, the device will be in

shutdown mode. When EN goes to logic low, the device will be enabled.

power-good (PG)

The PG terminal for the fixed voltage option devices is an open drain, active low output that indicates the status

of V (output of the LDO). When V reaches approximately 91% of the regulated voltage, PG will go to a low

impedance state. It will go to a high-impedance state when V falls below approximately 89% (i.e. over load

condition) of the regulated voltage. The open drain output of the PG terminal requires a pullup resistor.

feedback (FB)

FB is an input terminal used for the adjustable-output option and must be connected to the output terminal either

directly, in order to generate the minimum output voltage of 1.22 V, or through an external feedback resistor

divider for other output voltages. The FB connection should be as short as possible. It is essential to route it in

such a way to minimize/avoid noise pickup. Adding RC networks between FB terminal and V to filter noise is

not recommended because it may cause the regulator to oscillate.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

detailed description (continued)

input voltage (IN)

The V terminal is an input to the regulator.

output voltage (OUTPUT)

The V

terminal is an output to the regulator.

OUTPUT

absolute maximum ratings over operating junction temperature range (unless otherwise noted)

‡

Input voltage range , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V

Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V

Maximum PG voltage (fixed options only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V

Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Tables

Output voltage, V (OUTPUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V

Operating junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV

ESD rating, CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V

†

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

All voltage values are with respect to network terminal ground.

DISSIPATION RATING TABLE

PACKAGE

TO−220

(°C/W)

θJC

θJA

58.7

38.7

TO−263

For both packages, the R

with 1 ounce internal copper plane and ground plane. There was no air flow across the

packages.

values were computed using JEDEC high K board (2S2P)

θJA

was computed assuming a vertical, free standing TO-220 package with pins

θJA

soldered to the board. There is no heatsink attached to the package.

was computed assuming a horizontally mounted TO-263 package with pins

θJA

soldered to the board. There is no copper pad underneath the package.

recommended operating conditions

MIN

2.8

1.22

MAX

5.5

UNIT

Input voltage, V

Output voltage range, V

Output current, I

Operating virtual junction temperature, T

−40

125

°C

To calculate the minimum input voltage for your maximum output current, use the following equation: V

= V

+ V .

DO(max load)

I(min)

O(max)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

electrical characteristics over recommended operating junction temperature range (T = −40°C to

125°C), V = V

+ 1 V, I = 1 mA, EN = 0 V, C = 100 µF (unless otherwise noted)

O(typ)

PARAMETER

TEST CONDITIONS

1.22 V ≤ V ≤ 5.5 V, T = 25°C

MIN

TYP

MAX

UNIT

1.22 V ≤ V ≤ 5.5 V

0.97 V

1.03 V

Adjustable voltage

1.22 V ≤ V ≤ 5.5 V, T = 0 to 125°C

0.98 V

1.02 V

(see Note 1)

T = 25°C,

2.8 V < V < 5.5 V

1.5

1.8

1.5 V Output

1.8 V Output

2.5 V Output

3.3 V Output

2.8 V ≤ V ≤ 5.5 V

1.455

1.746

2.425

3.201

1.545

1.854

2.575

3.399

200

Output voltage (see Note 2)

T = 25°C,

2.8 V < V < 5.5 V

2.8 V ≤ V ≤ 5.5 V

T = 25°C,

3.5 V < V < 5.5 V

2.5

3.5 V ≤ V ≤ 5.5 V

T = 25°C,

4.3 V < V < 5.5 V

3.3

4.3 V ≤ V ≤ 5.5 V

T = 25°C

125

0.04

Quiescent current (GND current) (see Notes 2 and 3)

µA

%/V

+ 1 V ≤ V ≤ 5.5 V, T = 25°C

I J

Output voltage line regulation (∆V /V ) (see Note 3)

+ 1 V ≤ V < 5.5 V

0.1

Load regulation (see Note 2)

Output noise voltage

0.35

%/V

µVrms

TPS75515

BW = 300 Hz to 50 kHz, T = 25°C, V = 2.8 V

J I

Output current limit

= 0 V

5.5

Thermal shutdown junction temperature

150

0.1

°C

EN = V ,

T = 25°C

µA

Standby current

EN = V

µA

FB input current

TPS75501

FB = 1.5 V

−1

µA

f = 100 Hz,

V = 2.8 V,

T = 25°C,

Power supply ripple rejection

TPS75515

= 5 A

Minimum input voltage for valid PG

PG trip threshold voltage

PG hysteresis voltage

= 300 µA,

(PG)

≤ 0.8 V

O(PG)

decreasing

Fixed options only

Measured at V

0.5

PG output low voltage

V = 2.8 V,

= 1 mA

0.15

0.4

O(PG)

PG leakage current

(PG)

= 5 V

µA

NOTES: 1. The adjustable option operates with a 2% tolerance over T = 0 to 125 °C.

= 1 mA to 5 A

3. If V ≤ 2.5 V then V

= 2.8 V, V

Imin Imax

= 5.5 V:

ǒ_VImax_{* 2.8 V}Ǔ

Line regulation (mV) + %ńV

1000

100

If V > 2.5 V then V

Imin

= V + 1 V, V = 5.5 V:

Imax

_*ǒ_VO

ǒ_VImax

_{) 1 V}Ǔ

Line regulation (mV) + %ńV

1000

100

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

electrical characteristics over recommended operating junction temperature range (T = −40°C to

125°C), V = V

+ 1 V, I = 1 mA, EN = 0 V, C = 100 µF (unless otherwise noted) (continued)

O(typ)

PARAMETER

TEST CONDITIONS

MIN

−1

TYP

MAX

UNIT

µA

EN = V

Input current (EN)

EN = 0 V

High level EN input voltage

Low level EN input voltage

0.7

500

= 5 A,

V = 3.2 V,

T = 25°C

250

Dropout voltage, (3.3 V output) (see Note 4)

V = 3.2 V

Discharge transistor current

UVLO

= 1.5 V, T = 25°C

T = 25°C,

V rising

2.2

2.75

UVLO hysteresis

T = 25°C,

V falling

100

NOTE 4: IN voltage equals V (typ) − 100 mV; TPS75515, TPS75518, and TPS75525 dropout voltage limited by input voltage range limitations

(i.e., TPS75533 input voltage is set to 3.2 V for the purpose of this test).

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

vs Output current

vs Junction temperature

vs Frequency

2, 3

4, 5

Output voltage

Ground current

Power supply ripple rejection

Output spectral noise density

Output impedance

vs Frequency

vs Input voltage

Dropout voltage

vs Junction temperature

vs Output voltage

Minimum required input voltage

Line transient response

13, 15

14, 16

Load transient response

Output voltage and enable voltage

Equivalent series resistance

vs Time (start-up)

vs Output current

19, 20

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢄ

ꢆ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢇ

ꢆ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢈ

ꢄ

ꢆ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢉ

ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢊ

ꢋ

ꢀ

ꢌ

ꢁ

ꢍ

ꢊ

ꢎ

ꢏ

ꢐ

ꢍ

ꢍꢑ

ꢒ

ꢓ

ꢑ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TYPICAL CHARACTERISTICS

TPS75533

TPS75515

OUTPUT VOLTAGE

OUTPUT CURRENT

3.345

1.545

1.530

1.515

V = 2.8 V

V = 4.3 V

= 25°C

3.330

3.315

3.3

1.5

1.485

1.470

1.455

3.285

3.270

3.255

− Output Current − A

Figure 2

Figure 3

TPS75515

TPS75533

OUTPUT VOLTAGE

JUNCTION TEMPERATURE

1.545

3.345

3.33

V = 4.3 V

V = 2.8 V

1.530

1.515

3.315

3.3

1.5

1.485

3.285

1.470

1.455

3.270

3.255

−40 −25 −10

20 35 50 65 80 95 110 125

−40 −25 10

20 35 50 65 80 95 110 125

− Junction Temperature − °C

Figure 4

Figure 5

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ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TYPICAL CHARACTERISTICS

TPS755xx

TPS75733

GROUND CURRENT

JUNCTION TEMPERATURE

POWER SUPPLY RIPPLE REJECTION

FREQUENCY

150

125

V = 4.3 V

V = 5 V

= 100 µF

= 25°C

= 5 A

= 1 mA

= 5 A

100

−40 −25 −10

20 35 50 65 80 95 110 125

10k

100k

10M

− Junction Temperature − °C

f − Frequency − Hz

Figure 6

Figure 7

TPS75533

OUTPUT SPECTRAL NOISE DENSITY

OUTPUT IMPEDANCE

FREQUENCY

2.5

100

V = 4.3 V

= 3.3 V

= 100 µF

= 25°C

= 100 µF

= 25°C

= 5 A

1.5

= 1 mA

0.1

0.5

= 5 A

0.01

0.001

100

10k

100k

100

10k

100k

10M

f − Frequency − Hz

Figure 8

Figure 9

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ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TYPICAL CHARACTERISTICS

TPS75501

TPS75533

DROPOUT VOLTAGE

INPUT VOLTAGE

JUNCTION TEMPERATURE

450

400

350

= 5 A

= 3.3 V

= 125°C

= 25°C

350

300

250

200

150

250

200

= −40°C

150

100

−40 −25 −10

20 35 50 65 80 95 110 125

2.5

3.5

4.5

V − Input Voltage − V

− Junction Temperature − °C

Figure 11

Figure 10

MINIMUM REQUIRED INPUT VOLTAGE

TPS75515

LINE TRANSIENT RESPONSE

OUTPUT VOLTAGE

= 1.5 V

= 5 A

= 100 µF

= 5 A

= 125°C

= 25°C

= −40°C

−50

−100

2.8

3.8

2.8

50 100 150 200 250 300 350 400 450 500

1.5 1.75

2.25 2.5 2.75

3.25 3.5

t − Time − µs

− Output Voltage − V

Figure 12

Figure 13

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TYPICAL CHARACTERISTICS

TPS75515

TPS75533

LOAD TRANSIENT RESPONSE

LINE TRANSIENT RESPONSE

150

100

= 3.3 V

= 5 A

= 100 µF

= 1.5 V

= 100 µF

−50

−100

−150

−100

1.25 A

5.3

4.3

20 40 60 80 100 120 140 160 180 200

50 100 150 200 250 300 350 400 450 500

t − Time − µs

Figure 14

Figure 15

TPS75533

OUTPUT VOLTAGE AND ENABLE VOLTAGE

TPS75533

LOAD TRANSIENT RESPONSE

TIME (START-UP)

=3 .3 V

= 100 µF

V = 4.3 V

3.3

= 10 mA

= 25°C

200

100

4.3

1.25 A

−100

20 40 60 80 100 120 140 160 180 200

0.2

0.4

0.6

0.8

t − Time − µs

t − Time (Start-Up) − ms

Figure 16

Figure 17

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ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

TYPICAL CHARACTERISTICS

To Load

OUT

GND

ESR

Figure 18. Test Circuit for Typical Regions of Stability (Figures 19 and 20) (Fixed Output Options)

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

= 680 µF

= 25°C

= 47 µF

= 25°C

Region of Stability

0.2

0.1

Region of Instability

0.015

0.01

Region of Instability

0.01

− Output Current − A

Figure 19

Figure 20

†

Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally,

and PWB trace resistance to C .

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

THERMAL INFORMATION

The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it

dissipates during operation. All integrated circuits have a maximum allowable junction temperature (T max)

above which normal operation is not assured. A system designer must design the operating environment so

that the operating junction temperature (T ) does not exceed the maximum junction temperature (T max). The

two main environmental variables that a designer can use to improve thermal performance are air flow and

external heatsinks. The purpose of this information is to aid the designer in determining the proper operating

environment for a linear regulator that is operating at a specific power level.

In general, the maximum expected power (P

) consumed by a linear regulator is computed as:

D(max)

(1)

_{PDmax +}ǒ_VI(avg)

* V

) V

x I

I(avg) (Q)

O(avg)

Where:

is the average input voltage.

I(avg)

O(avg)

is the average output voltage.

is the average output current.

is the quiescent current.

(Q)

For most TI LDO regulators, the quiescent current is insignificant compared to the average output current;

therefore, the term V x I can be neglected. The operating junction temperature is computed by adding

I(avg) (Q)

the ambient temperature (T ) and the increase in temperature due to the regulator’s power dissipation. The

temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal

resistances between the junction and the case (R

), the case to heatsink (R

), and the heatsink to ambient

θJC

θCS

). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the

θSA

device, the more surface area available for power dissipation and the lower the object’s thermal resistance.

Figure 21 illustrates these thermal resistances for (a) a TO−220 package attached to a heatsink, and (b) a

TO−263 package mounted on a JEDEC High-K board.

θJC

θCS

θSA

TO−263 Package

(b)

TO−220 Package

(a)

Figure 21. Thermal Resistances

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ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

THERMAL INFORMATION

Equation 2 summarizes the computation:

_{) P max x}ǒ_R

(2)

+ T

) R

θJC

θCS

θSA

The R

is specific to each regulator as determined by its package, lead frame, and die size provided in the

θJC

regulator’s datasheet. The R

type heatsinks, like the one attached to the TO−220 package in Figure 21(a), can have R

is a function of the type and size of heatsink. For example, black body radiator

θSA

values ranging

is a function of how the

θCS

from 5°C/W for very large heatsinks to 50°C/W for very small heatsinks. The R

θCS

package is attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a

TO−220 package, R of 1°C/W is reasonable.

θCS

Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator

is mounted will provide some heatsinking through the pin solder connections. Some packages, like the TO−263

and TI’s TSSOP PowerPAD packages, use a copper plane underneath the package or the circuit board’s

ground plane for additional heatsinking to improve their thermal performance. Computer aided thermal

modeling can be used to compute very accurate approximations of an integrated circuit’s thermal performance

in different operating environments (e.g., different types of circuit boards, different types and sizes of heatsinks,

and different air flows, etc.). Using these models, the three thermal resistances can be combined into one

thermal resistance between junction and ambient (R

environment used in the computer model.

). This R

is valid only for the specific operating

θJA

Equation 2 simplifies into equation 3:

(3)

+ T ) P max x R

θJA

Rearranging equation 3 gives equation 4:

T –T

(4)

θJA

P max

Using equation 3 and the computer model generated curves shown in Figures 22 and 25, a designer can quickly

compute the required heatsink thermal resistance/board area for a given ambient temperature, power

dissipation, and operating environment.

PowerPAD is a trademark of Texas Instruments.

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

THERMAL INFORMATION

TO−220 power dissipation

The TO−220 package provides an effective means of managing power dissipation in through-hole applications.

The TO−220 package dimensions are provided in the Mechanical Data section at the end of the data sheet. A

heatsink can be used with the TO−220 package to effectively lower the junction-to-ambient thermal resistance.

To illustrate, the TPS75525 in a TO−220 package was chosen. For this example, the average input voltage is

3.3 V, the output voltage is 2.5 V, the average output current is 3 A, the ambient temperature 55°C, the air flow

is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,

the maximum average power is:

(5)

(

)

P max + 3.3 – 2.5 V x 3 A + 2.4 W

Substituting T max for T into equation 4 gives equation 6:

(6)

max + (125 – 55)°Cń2.4 W + 29°CńW

θJA

From Figure 22, R

vs Heatsink Thermal Resistance, a heatsink with R

= 22°C/W is required to dissipate

θJA

θSA

2.4 W. The model operating environment used in the computer model to construct Figure 22 consisted of a

standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. Since the package

pins were soldered to the board, 450 mm of the board was modeled as a heatsink. Figure 23 shows the side

view of the operating environment used in the computer model.

THERMAL RESISTANCE

HEATSINK THERMAL RESISTANCE

Natural Convection

Air Flow = 150 LFM

Air Flow = 250 LFM

Air Flow = 500 LFM

No Heatsink

− Heatsink Thermal Resistance − °C/W

θSA

Figure 22

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ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

THERMAL INFORMATION

TO−220 power dissipation (continued)

0.21 mm

1 oz. Copper

Power Plane

1 oz. Copper

Ground Plane

Figure 23

From the data in Figure 22 and rearranging equation 4, the maximum power dissipation for a different heatsink

and a specific ambient temperature can be computed (see Figure 24).

θSA

POWER DISSIPATION

HEATSINK THERMAL RESISTANCE

= 55°C

Air Flow = 500 LFM

Air Flow = 250 LFM

Air Flow = 150 LFM

Natural Convection

No Heatsink

− Heatsink Thermal Resistance − °C/W

θSA

Figure 24

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ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

THERMAL INFORMATION

TO−263 power dissipation

The TO−263 package provides an effective means of managing power dissipation in surface mount

applications. The TO−263 package dimensions are provided in the Mechanical Data section at the end of the

data sheet. The addition of a copper plane directly underneath the TO−263 package enhances the thermal

performance of the package.

To illustrate, the TPS75525 in a TO−263 package was chosen. For this example, the average input voltage is

3.3 V, the output voltage is 2.5 V, the average output current is 3 A, the ambient temperature 55°C, the air flow

is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,

the maximum average power is:

(7)

(

)

P max + 3.3 – 2.5 V x 3 A + 2.4 W

Substituting T max for T into equation 4 gives equation 8:

(8)

max + (125 – 55)°Cń2.4 W + 29°CńW

θJA

From Figure 25, R

vs Copper Heatsink Area, the ground plane needs to be 2 cm for the part to dissipate

θJA

2.4 W. The model operating environment used in the computer model to construct Figure 25 consisted of a

standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. The package is

soldered to a 2 oz. copper pad. The pad is tied through thermal vias to the 1 oz. ground plane. Figure 26 shows

the side view of the operating environment used in the computer model.

THERMAL RESISTANCE

COPPER HEATSINK AREA

No Air Flow

150 LFM

250 LFM

0.01

0.1

100

Copper Heatsink Area − cm

Figure 25

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ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

THERMAL INFORMATION

TO−263 power dissipation (continued)

2 oz. Copper Solder Pad

with 25 Thermal Vias

1 oz. Copper

Power Plane

1 oz. Copper

Ground Plane

Thermal Vias, 0.3 mm

Diameter, 1.5 mm Pitch

Figure 26

From the data in Figure 25 and rearranging equation 4, the maximum power dissipation for a different ground

plane area and a specific ambient temperature can be computed (see Figure 27).

MAXIMUM POWER DISSIPATION

COPPER HEATSINK AREA

= 55°C

250 LFM

150 LFM

No Air Flow

0.01

0.1

100

Copper Heatsink Area − cm

Figure 27

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢅ ꢄꢆ ꢀꢁ ꢂꢃ ꢄ ꢄ ꢅ ꢇ ꢆ ꢀ ꢁꢂꢃ ꢄ ꢄ ꢈ ꢄ ꢆ ꢀ ꢁꢂꢃ ꢄ ꢄ ꢉ ꢉ ꢊ ꢋꢀ ꢌ ꢁꢍ ꢊ ꢎꢏ ꢐ ꢍ ꢍ ꢑ ꢒ ꢓꢑ

ꢀꢁ ꢂ ꢃꢄ ꢄ ꢔ ꢅ ꢕꢒꢂ ꢀꢖꢀ ꢏꢒꢓꢂ ꢋꢎꢓꢀ ꢏꢎ ꢂꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏ ꢍ ꢁꢍ ꢘ ꢀ

ꢙꢍ ꢗꢀꢒꢐ ꢎ ꢏꢎꢐ ꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

APPLICATION INFORMATION

programming the TPS75501 adjustable LDO regulator

The output voltage of the TPS75501 adjustable regulator is programmed using an external resistor divider as

shown in Figure 28. The output voltage is calculated using:

ǒ_{1 )}

(9)

+ V

ref

Where:

= 1.224 V typ (the internal reference voltage)

ref

Resistors R1 and R2 should be chosen for approximately 40-µA divider current. Lower value resistors can be

used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage

currents at FB increase the output voltage error. The recommended design procedure is to choose

R2 = 30.1 kΩ to set the divider current at 40 µA and then calculate R1 using:

R1 +

* 1

(10)

ref

TPS75501

OUTPUT VOLTAGE

PROGRAMMING GUIDE

1 µF

OUTPUT

VOLTAGE

UNIT

≥ 2 V

OUT

2.5 V

3.3 V

3.6 V

31.6

30.1

kΩ

≤ 0.7 V

58.3

GND

Figure 28. TPS75501 Adjustable LDO Regulator Programming

regulator protection

The TPS755xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input

voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the

input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be

appropriate.

The TPS755xx also features internal current limiting and thermal protection. During normal operation, the

TPS755xx limits output current to approximately 10 A. When current limiting engages, the output voltage scales

back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device

failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of

the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below

130°C(typ), regulator operation resumes.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢅ ꢄ ꢆ ꢀ ꢁꢂ ꢃꢄ ꢄ ꢅ ꢇ ꢆ ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢈ ꢄꢆ ꢀꢁ ꢂ ꢃ ꢄꢄ ꢉ ꢉ ꢊ ꢋꢀ ꢌ ꢁꢍ ꢊ ꢎꢏ ꢐ ꢍ ꢍꢑ ꢒꢓꢑ

ꢀ ꢁ ꢂ ꢃ ꢄꢄ ꢔ ꢅ ꢕꢒ ꢂꢀꢖꢀ ꢏꢒꢓ ꢂꢋ ꢎ ꢓꢀ ꢏꢎ ꢂ ꢁꢍ ꢓꢂꢎ ꢄ ꢖꢒ ꢗ ꢍ ꢊꢖꢑꢏꢍ ꢁꢍ ꢘꢀ

ꢙ ꢍꢗꢀꢒ ꢐꢎ ꢏ ꢎꢐꢘ ꢗꢒꢀꢍ ꢏꢂ

SLVS293D − NOVEMBER 2000 − REVISED MAY 2002

APPLICATION INFORMATION

input capacitor

For a typical application, a ceramic input bypass capacitor (0.22 µF−1 µF) is recommended to ensure device

stability. This capacitor should be as close as possible to the input pin. Due to the impedance of the input supply,

large transient currents will cause the input voltage to droop. If this droop causes the input voltage to drop below

the UVLO threshold, the device will turn off. Therefore, it is recommended that a larger capacitor be placed in

parallel with the ceramic bypass capacitor at the regulator’s input. The size of this capacitor depends on the

output current, response time of the main power supply, and the main power supply’s distance to the regulator.

At a minimum, the capacitor should be sized to ensure that the input voltage does not drop below the minimum

UVLO threshold voltage during normal operating conditions.

output capacitor

As with most LDO regulators, the TPS755xx requires an output capacitor connected between OUT and GND

to stabilize the internal control loop. The minimum recommended capacitance value is 47 µF with an ESR

(equivalent series resistance) of at least 200 mΩ. As shown in Figure 29, most capacitor and ESR combinations

with a product of 47e−6 x 0.2 = 9.4e−6 or larger will be stable, provided the capacitor value is at least 47 µF.

Solid tantalum electrolytic and aluminum electrolytic capacitors are all suitable, provided they meet the

requirements described in this section. Larger capacitors provide a wider range of stability and better load

transient response.

This information along with the ESR graphs, Figures 19, 20, and 29, is included to assist in selection of suitable

capacitance for the user’s application. When necessary to achieve low height requirements along with high

output current and/or high load capacitance, several higher ESR capacitors can be used in parallel to meet

these guidelines.

OUTPUT CAPACITANCE

EQUIVALENT SERIES RESISTANCE

1000

Region of Stability

ESR min x C = Constant

100

Region of Instability

Y = ESRmin x C

0.01

0.1

0.2

ESR − Equivalent Series Resistance − Ω

Figure 29

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

PACKAGING INFORMATION

Orderable Device

TPS75501KC

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

ACTIVE

TO-220

Green (RoHS

& no Sb/Br)

CU SN

Call TI

CU SN

Call TI

CU SN

Call TI

N / A for Pkg Type

Call TI

-40 to 125 75501

-40 to 125

TPS75501KCG3

TPS75501KTT

ACTIVE

KTT

Green (RoHS

& no Sb/Br)

OBSOLETE DDPAK/

TO-263

TBD

TPS75501KTTR

TPS75501KTTRG3

TPS75501KTTT

TPS75501KTTTG3

TPS75515KC

ACTIVE

DDPAK/

TO-263

500

Green (RoHS

& no Sb/Br)

Level-2-260C-1 YEAR

N / A for Pkg Type

Call TI

-40 to 125 75501

75501

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

75501

TO-220

Green (RoHS

& no Sb/Br)

-40 to 125 75515

-40 to 125

TPS75515KCG3

TPS75515KTT

TO-220

Green (RoHS

& no Sb/Br)

OBSOLETE DDPAK/

TO-263

KTT

TBD

TPS75515KTTR

TPS75515KTTRG3

TPS75515KTTT

TPS75515KTTTG3

TPS75518KC

ACTIVE

DDPAK/

TO-263

500

Green (RoHS

& no Sb/Br)

Level-2-260C-1 YEAR

N / A for Pkg Type

Call TI

-40 to 125 75515

75515

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

75515

TO-220

Green (RoHS

& no Sb/Br)

-40 to 125 75518

-40 to 125

TPS75518KCG3

TPS75518KTT

TO-220

Green (RoHS

& no Sb/Br)

OBSOLETE DDPAK/

TO-263

KTT

TBD

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

Orderable Device

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

TPS75518KTTR

TPS75518KTTRG3

TPS75518KTTT

TPS75518KTTTG3

TPS75525KC

ACTIVE

DDPAK/

TO-263

KTT

500

Green (RoHS

& no Sb/Br)

CU SN

Call TI

CU SN

Call TI

CU SN

Level-2-260C-1 YEAR

N / A for Pkg Type

Call TI

-40 to 125 75518

75518

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

75518

TO-220

Green (RoHS

& no Sb/Br)

-40 to 125 75525

-40 to 125

TPS75525KCG3

TPS75525KTT

TO-220

Green (RoHS

& no Sb/Br)

OBSOLETE DDPAK/

TO-263

KTT

TBD

TPS75525KTTR

TPS75525KTTRG3

TPS75525KTTT

TPS75525KTTTG3

TPS75533KC

ACTIVE

DDPAK/

TO-263

500

Green (RoHS

& no Sb/Br)

Level-2-260C-1 YEAR

N / A for Pkg Type

Call TI

-40 to 125 75525

75525

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

75525

TO-220

Green (RoHS

& no Sb/Br)

-40 to 125 75533

-40 to 125

TPS75533KCG3

TPS75533KTT

TO-220

Green (RoHS

& no Sb/Br)

OBSOLETE DDPAK/

TO-263

KTT

TBD

TPS75533KTTR

TPS75533KTTRG3

TPS75533KTTT

TPS75533KTTTG3

ACTIVE

DDPAK/

TO-263

500

Green (RoHS

& no Sb/Br)

Level-2-260C-1 YEAR

-40 to 125 75533

75533

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

DDPAK/

TO-263

Green (RoHS

& no Sb/Br)

75533

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾Only one of markings shown within the brackets will appear on the physical device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Mar-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS75501KTTR

TPS75515KTTR

TPS75515KTTT

TPS75518KTTR

TPS75518KTTT

TPS75525KTTR

TPS75525KTTT

TPS75533KTTR

TPS75533KTTT

DDPAK/

TO-263

KTT

500

330.0

24.4

10.6

15.6

4.9

16.0

24.0

DDPAK/

TO-263

DDPAK/

TO-263

DDPAK/

TO-263

500

DDPAK/

TO-263

DDPAK/

TO-263

500

DDPAK/

TO-263

DDPAK/

TO-263

500

DDPAK/

TO-263

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

26-Mar-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS75501KTTR

TPS75515KTTR

TPS75515KTTT

TPS75518KTTR

TPS75518KTTT

TPS75525KTTR

TPS75525KTTT

TPS75533KTTR

TPS75533KTTT

DDPAK/TO-263

KTT

500

367.0

45.0

500

Pack Materials-Page 2

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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TPS75501KTTT [TI]

相关型号：

TPS75501KTTTG3

TPS75515

TPS75515KC

TPS75515KCG3

TPS75515KTT

TPS75515KTTR

TPS75515KTTRG3

TPS75515KTTT

TPS75515KTTTG3

TPS75515_16

TPS75518

TPS75518KC