TPS76718Q [TI]
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS; 快速瞬态响应1 -A低压差稳压器
| 型号： | TPS76718Q |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS |
| 文件： | 总20页 (文件大小：293K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
PWP PACKAGE
(TOP VIEW)
1 A Low-Dropout Voltage Regulator
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and
Adjustable Versions
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
GND/HSINK
NC
GND/HSINK
Dropout Voltage Down to 230 mV at 1 A
(TPS76750)
GND
NC
NC
EN
RESET
FB/NC
Ultra Low 85 µA Typical Quiescent Current
IN
IN
Fast Transient Response
OUT
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
NC
OUT
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
Open Drain Power-On Reset With 200-ms
Delay (See TPS768xx for PG Option)
NC – No internal connection
8-Pin SOIC and 20-Pin TSSOP PowerPAD
(PWP) Package
D PACKAGE
(TOP VIEW)
Thermal Shutdown Protection
GND
EN
IN
RESET
FB/NC
OUT
1
2
3
4
8
7
6
5
description
This device is designed to have a fast transient
response and be stable with 10-µF low ESR
capacitors. This combination provides high
performance at a reasonable cost.
IN
OUT
TPS76733
DROPOUT VOLTAGE
vs
TPS76733
LOAD TRANSIENT RESPONSE
FREE-AIR TEMPERATURE
3
10
2
10
1
10
0
10
100
C
T
= 100 µF
= 25°C
L
A
I
= 1 A
50
0
O
–50
–100
1
I
O
= 10 mA
0.5
0
–1
10
10
I
= 0
O
C
= 10 µF
O
–2
–60 –40 –20
T
0
20 40 60 80 100 120 140
0
20 40 60 80 100 120 140 160 180 200
– Free-Air Temperature – °C
t – Time – µs
A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV
at an output current of 1 A for the TPS76750) and is directly proportional to the output current. Additionally, since
the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output
loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield
a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep
mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to
1 µA at T = 25°C.
J
TheRESET output of the TPS767xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS767xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
The TPS767xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS767xx family is available in 8 pin SOIC
and 20 pin PWP packages.
AVAILABLE OPTIONS
OUTPUT
VOLTAGE
(V)
PACKAGED DEVICES
T
J
TSSOP
(PWP)
SOIC
(D)
TYP
5.0
3.3
3.0
2.8
2.7
2.5
1.8
1.5
TPS76750Q
TPS76733Q
TPS76730Q
TPS76728Q
TPS76727Q
TPS76725Q
TPS76718Q
TPS76715Q
TPS76750Q
TPS76733Q
TPS76730Q
TPS76728Q
TPS76727Q
TPS76725Q
TPS76718Q
TPS76715Q
–40°C to 125°C
Adjustable
1.5 V to 5.5 V
TPS76701Q
TPS76701Q
The TPS76701 is programmable using an external resistor divider (see application
information). The D and PWP packages are available taped and reeled. Add an R
suffix to the device type (e.g., TPS76701QDR).
TPS767xx
6
7
16
V
I
IN
IN
RESET
RESET
14
13
OUT
OUT
V
O
5
0.1 µF
EN
†
C
O
+
10 µF
GND
3
†
See application information section for capacitor selection details.
Figure 1. Typical Application Configuration (For Fixed Output Options)
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
functional block diagram—adjustable version
IN
EN
RESET
OUT
_
+
+
_
200 ms Delay
R1
R2
V
ref
= 1.1834 V
FB/NC
GND
External to the device
functional block diagram—fixed-voltage version
IN
EN
RESET
OUT
_
+
+
_
200 ms Delay
R1
R2
V
ref
= 1.1834 V
GND
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
Terminal Functions – SOIC Package
TERMINAL
I/O
DESCRIPTION
NAME
NO.
2
EN
I
I
Enable input
FB/NC
GND
IN
7
Feedback input voltage for adjustable device (no connect for fixed options)
1
Regulator ground
Input voltage
3, 4
5, 6
8
I
OUT
O
O
Regulated output voltage
RESET output
RESET
Terminal Functions – PWP Package
TERMINAL
NAME
I/O
DESCRIPTION
NO.
EN
5
15
3
I
I
Enable input
FB/NC
GND
Feedback input voltage for adjustable device (no connect for fixed options)
Regulator ground
Ground/heatsink
GND/HSINK
1, 2, 9, 10, 11,
12, 19, 20
IN
6, 7
4, 8, 17, 18
13, 14
I
Input voltage
NC
No connect
OUT
RESET
O
O
Regulated output voltage
RESET output
16
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
timing diagram
V
I
†
V
res
V
res
t
‡
‡
V
O
V
IT+
V
IT+
Threshold
Voltage
Less than 5% of the
output voltage
‡
‡
V
IT–
V
IT–
t
RESET
Output
200 ms
Delay
200 ms
Delay
Output
Undefined
Output
Undefined
t
†
V
is the minimum input voltage for a valid RESET. The symbol V is not currently listed within EIA or JEDEC standards
res
res
for semiconductor symbology.
‡
VIT –Trip voltage is typically 5% lower than the output voltage (95%V ) V
O
IT–
to V
is the hysteresis voltage.
IT+
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Input voltage range , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 13.5 V
I
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V + 0.3 V
I
Maximum RESET voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Output voltage, V (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating tables
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
0
568 mW
5.68 mW/°C
9.04 mW/°C
312 mW
497 mW
227 mW
361 mW
D
250
904 mW
DISSIPATION RATING TABLE 2 – FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
0
2.9 W
23.5 mW/°C
34.6 mW/°C
23.8 mW/°C
57.9 mW/°C
1.9 W
2.8 W
1.9 W
4.6 W
1.5 W
2.2 W
1.5 W
3.8 W
#
PWP
PWP
300
0
4.3 W
3 W
||
300
7.2 W
#
||
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in ).
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
2
2
2
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in ) and layers 3 and 6 at 100% coverage (6 in ). For more information, refer
to TI technical brief SLMA002.
recommended operating conditions
MIN
2.7
1.5
0
MAX
10
UNIT
V
Input voltage, V
I
Output voltage range, V
5.5
V
O
Output current, I (Note 1)
1.0
A
O
Operating virtual junction temperature, T (Note 1)
J
–40
125
°C
To calculate the minimum input voltage for your maximum output current, use the following equation: V
= V
+ V
.
DO(max load)
I(min)
O(max)
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
electrical characteristics over recommended operating free-air temperature range,
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted)
i
O(typ)
O
O
PARAMETER
TEST CONDITIONS
1.5 V ≤ V ≤ 5.5 V, T = 25°C
MIN
TYP
MAX
UNIT
V
O
O
J
TPS76701
TPS76715
TPS76718
TPS76725
TPS76727
TPS76728
TPS76730
TPS76733
TPS76750
1.5 V ≤ V ≤ 5.5 V,
T = –40°C to 125°C
0.98V
1.02V
O
J
O
O
T = 25°C,
J
2.7 V < V < 10 V
IN
1.5
1.8
2.5
2.7
2.8
3.0
3.3
5.0
85
T = –40°C to 125°C, 2.7 V < V < 10 V
J IN
1.470
1.530
T = 25°C,
J
2.8 V < V < 10 V
IN
T = –40°C to 125°C, 2.8 V < V < 10 V
J IN
1.764
2.450
2.646
2.744
2.940
3.234
4.900
1.836
2.550
2.754
2.856
3.060
3.366
5.100
125
T = 25°C,
J
3.5 V < V < 10 V
IN
T = –40°C to 125°C, 3.5 V < V < 10 V
J IN
Output voltage
(10 µA to 1 A load)
(see Note 2)
T = 25°C,
J
3.7 V < V < 10 V
IN
V
T = –40°C to 125°C, 3.7 V < V < 10 V
J IN
T = 25°C,
J
3.8 V < V < 10 V
IN
T = –40°C to 125°C, 3.8 V < V < 10 V
J IN
T = 25°C,
J
4.0 V < V < 10 V
IN
T = –40°C to 125°C, 4.0 V < V < 10 V
J IN
T = 25°C,
J
4.3 V < V < 10 V
IN
T = –40°C to 125°C, 4.3 V < V < 10 V
J IN
T = 25°C,
J
6.0 V < V < 10 V
IN
T = –40°C to 125°C, 6.0 V < V < 10 V
J IN
10 µA < I < 1 A,
T = 25°C
J
Quiescent current (GND current)
EN = 0V, (see Note 2)
O
µA
I
O
= 1 A,
T = –40°C to 125°C
J
Output voltage line regulation (∆V /V
(see Notes 2 and 3)
O
O
)
V
O
+ 1 V < V ≤ 10 V, T = 25°C
0.01
3
%/V
mV
I
J
Load regulation
BW = 300 Hz to 50 kHz,
Output noise voltage
Output current Limit
190
µVrms
C
= 10 µF,
T = 25°C
J
O
V
O
= 0 V
1.7
2
A
Thermal shutdown junction temperature
150
°C
EN = V
EN = V
T = 25°C,
J
I,
I,
1
µA
µA
2.7 V < V < 10 V
I
Standby current
T = –40°C to 125°C
J
10
2.7 V < V < 10 V
I
FB input current
TPS76701
FB = 1.5 V
2
nA
V
High level enable input voltage
Low level enable input voltage
1.7
92
0.9
V
f = 1 KHz,
T = 25°C
J
C
= 10 µF,
O
Power supply ripple rejection (see Note 2)
Minimum input voltage for valid RESET
60
dB
V
I
= 300µA
1.1
O(RESET)
decreasing
Trip threshold voltage
Hysteresis voltage
Output low voltage
Leakage current
V
98
%V
%V
V
O
O
Measured at V
0.5
O
O
Reset
V = 2.7 V,
I
I
= 1mA
O(RESET)
0.15
0.4
1
V
= 5 V
µA
(RESET)
RESET time-out delay
200
ms
NOTE 2: Minimum IN operating voltage is 2.7 V or V
+ 1 V, whichever is greater. Maximum IN voltage 10V.
O(typ)
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
electrical characteristics over recommended operating free-air temperature range,
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted) (continued)
i
O(typ)
O
O
PARAMETER
TEST CONDITIONS
MIN
–1
TYP
MAX
UNIT
EN = 0 V
0
1
1
Input current (EN)
µA
EN = V
–1
I
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
T = 25°C
500
450
350
230
J
TPS76728
TPS76730
TPS76733
TPS76750
T = –40°C to 125°C
J
825
675
575
380
T = 25°C
J
Dropout voltage
(See Note 4)
T = –40°C to 125°C
J
mV
T = 25°C
J
T = –40°C to 125°C
J
T = 25°C
J
T = –40°C to 125°C
J
NOTES: 3. If V ≤ 1.8 V then V
imax
= 10 V, V = 2.7 V:
imin
O
V
V
V
V
2.7 V
1000
O
O
imax
100
Line Reg. (mV)
% V
If V ≥ 2.5 V then V
imax
= 10 V, V
imin
= V + 1 V:
O
O
V
1 V
imax
O
Line Reg. (mV)
% V
1000
100
4. IN voltage equals V (Typ) – 100 mV; TPS76701 output voltage set to 3.3 V nominal with external resistor divider. TPS76715,
O
TPS76718,TPS76725,andTPS76727dropoutvoltagelimitedbyinputvoltagerangelimitations(i.e.,TPS76730inputvoltageneeds
to drop to 2.9 V for purpose of this test).
Table of Graphs
FIGURE
vs Output current
vs Free-air temperature
vs Free-air temperature
vs Frequency
2, 3, 4
5, 6, 7
8, 9
V
O
Output voltage
Ground current
Power supply ripple rejection
Output noise
10
vs Frequency
11
Z
o
Output impedance
vs Frequency
12
V
DO
Dropout voltage
vs Free-air temperature
13
Line transient response
Load transient response
Output voltage
14, 16
15, 17
18
vs Time
Dropout voltage
vs Input voltage
vs Output current
19
Equivalent series resistance (ESR)
21 – 24
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS76715
TPS76733
OUTPUT VOLTAGE
OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
1.4985
3.2835
3.2830
V = 2.7 V
I
V = 4.3 V
I
T
A
= 25°C
T
A
= 25°C
1.4980
1.4975
1.4970
1.4965
1.4960
3.2825
3.2820
3.2815
3.2810
3.2805
3.2800
1.4955
1.4950
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
– Output Current – A
1
I
O
I
O
– Output Current – A
Figure 2
Figure 3
TPS76725
TPS76733
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
2.4960
2.4955
2.4950
2.4945
3.32
3.31
V = 3.5 V
I
V = 4.3 V
I
T
A
= 25°C
3.30
3.29
3.28
3.27
3.26
3.25
I
O
= 1 A
2.4940
2.4935
2.4930
I
O
= 1 mA
2.4925
2.4920
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
–60 –40 –20
0
20 40 60 80 100 120 140
I
O
– Output Current – A
T
A
– Free-Air Temperature – °C
Figure 4
Figure 5
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS76715
OUTPUT VOLTAGE
vs
TPS76725
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1.515
2.515
2.510
2.505
2.500
2.495
2.490
V = 3.5 V
I
V = 2.7 V
I
1.510
1.505
1.500
1.495
1.490
1.485
I
O
= 1 A
I
O
= 1 A
I
= 1 mA
O
I
O
= 1 mA
2.485
2.480
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20
40
60
80 100 120
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 6
Figure 7
TPS76733
GROUND CURRENT
vs
TPS76715
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
92
100
V = 2.7 V
90
88
86
84
82
80
78
76
I
V = 4.3 V
I
95
90
85
80
75
I
O
= 1 A
I
O
= 1 mA
I
= 1 mA
O
I
O
= 500 mA
I
O
= 1 A
I
O
= 500 mA
74
72
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 8
Figure 9
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS76733
TPS76733
OUTPUT SPECTRAL NOISE DENSITY
POWER SUPPLY RIPPLE REJECTION
vs
vs
FREQUENCY
FREQUENCY
–5
10
10
90
80
70
V = 4.3 V
I
O
A
V = 4.3 V
I
O
O
A
C
T
= 10 µF
= 25°C
C
I
T
= 10 µF
= 1 A
= 25°C
I
O
= 7 mA
60
50
40
30
20
–6
I
= 1 A
O
–7
–8
10
10
0
10
–10
2
3
4
10
5
10
10
100
1k
10
10
10k
100k
1M
f – Frequency – Hz
f – Frequency – Hz
Figure 10
Figure 11
TPS76733
OUTPUT IMPEDANCE
vs
TPS76733
DROPOUT VOLTAGE
vs
FREQUENCY
FREE-AIR TEMPERATURE
3
10
2
10
1
10
0
10
0
V = 4.3 V
I
C
T
A
= 10 µF
= 25°C
O
I
= 1 A
O
I
O
= 1 mA
–1
10
I
O
= 10 mA
I
= 1 A
–1
O
10
10
I
O
= 0
C
= 10 µF
O
–2
10
–2
1
10
2
10
3
4
5
10
6
10
–60 –40 –20
0
20 40 60 80 100 120 140
10
10
f – Frequency – kHz
T
A
– Free-Air Temperature – °C
Figure 12
Figure 13
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS76715
TPS76715
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
100
C
T
= 100 µF
= 25°C
L
A
3.7
2.7
50
0
–50
–100
10
1
0
0.5
0
–10
C
T
A
= 10 µF
= 25°C
L
0
20 40 60 80 100 120 140 160 180 200
0
20 40 60 80 100 120 140 160 180 200
t – Time – µs
t – Time – µs
Figure 14
Figure 15
TPS76733
TPS76733
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
100
C
T
= 10 µF
= 25°C
C
T
= 100 µF
= 25°C
L
A
L
A
50
0
5.3
–50
–100
1
4.3
10
0
0.5
0
–10
0
20 40 60 80 100 120 140 160 180 200
0
20 40 60 80 100 120 140 160 180 200
t – Time – µs
t – Time – µs
Figure 16
Figure 17
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS76733
TPS76701
OUTPUT VOLTAGE
DROPOUT VOLTAGE
vs
vs
TIME (AT STARTUP)
INPUT VOLTAGE
4
900
I
O
= 1 A
800
700
600
500
400
300
200
3
2
1
T
= 125°C
0
A
T
A
= 25°C
T
A
= –40°C
0
100
0
2.5
3
3.5
4
4.5
5
0
20 40 60 80 100 120 140 160 180 200
t – Time – µs
V – Input Voltage – V
I
Figure 18
Figure 19
To Load
IN
V
I
OUT
+
C
O
R
EN
L
GND
ESR
Figure 20. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
†
†
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
V
= 3.3 V
o
C = 4.7 µF
l
V = 4.3 V
I
J
T
= 125°C
1
1
Region of Stability
Region of Stability
V
C
= 3.3 V
= 4.7 µF
o
L
V = 4.3 V
I
A
T
= 25°C
0.1
0.1
0
200
400
600
800
1000
0
200
400
600
800
1000
I
O
– Output Current – mA
I
O
– Output Current – mA
Figure 21
Figure 22
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
†
†
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
V
= 3.3 V
o
C = 22 µF
l
V = 4.3 V
I
J
T
= 125°C
1
1
Region of Stability
Region of Stability
V
C
= 3.3 V
= 22 µF
o
L
V = 4.3 V
I
A
T
= 25°C
0.1
0.1
0
200
400
600
800
1000
0
200
400
600
800
1000
I
O
– Output Current – mA
I
O
– Output Current – mA
Figure 23
Figure 24
†
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to C
.
O
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
The TPS767xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,
3.3 V, and 5.0 V), and an adjustable regulator, the TPS76701 (adjustable from 1.5 V to 5.5 V).
device operation
The TPS767xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (I = I /β). The TPS767xx uses a PMOS transistor to pass current; because
B
C
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in I to maintain the load. During power up, this translates
B
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS767xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS767xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown
feature is not used, EN should be tied to ground. Response to an enable transition is quick; regulated output
voltage is typically reestablished in 120 µs.
minimum load requirements
The TPS767xx family is stable even at zero load; no minimum load is required for operation.
FB - pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 26. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS767xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS767xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR
(equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are
acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and
multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of
the commercially available 10 µF surface-mount ceramic capacitors, including devices from Sprague and
Kemet, meet the ESR requirements stated above.
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
external capacitor requirements (continued)
TPS767xx
6
7
16
RESET
V
I
IN
IN
RESET
250 kΩ
14
13
V
OUT
OUT
O
C1
0.1 µF
5
EN
C
+
O
10 µF
GND
3
Figure 25. Typical Application Circuit (Fixed Versions)
programming the TPS76701 adjustable LDO regulator
The output voltage of the TPS76701 adjustable regulator is programmed using an external resistor divider as
shown in Figure 26. The output voltage is calculated using:
R1
R2
(1)
V
V
1
O
ref
Where
V
= 1.1834 V typ (the internal reference voltage)
ref
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:
V
O
R1
1
R2
(2)
V
ref
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS76701
OUTPUT
VOLTAGE
R1
33.2
R2
UNIT
Reset Output
250 kΩ
V
I
IN
RESET
OUT
0.1 µF
≤ 0.9 V
2.5 V
3.3 V
30.1
30.1
30.1
30.1
kΩ
kΩ
kΩ
kΩ
≥ 1.7 V
53.6
61.9
90.8
EN
V
O
3.6 V
R1
C
4.75 V
O
FB / NC
GND
R2
Figure 26. TPS76701 Adjustable LDO Regulator Programming
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
reset indicator
The TPS767xx features a RESET output that can be used to monitor the status of the regulator. The internal
comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires
a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as
a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the
specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer
to timing diagram for start-up sequence).
regulator protection
The TPS767xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS767xx also features internal current limiting and thermal protection. During normal operation, the
TPS767xxlimitsoutputcurrenttoapproximately1.7A. Whencurrentlimitingengages, theoutputvoltagescales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than
D(max)
D
or equal to P
.
D(max)
The maximum-power-dissipation limit is determined using the following equation:
T max
J
T
A
P
D(max)
R
JA
Where
T max is the maximum allowable junction temperature
J
R
is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
θJA
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
T is the ambient temperature.
A
The regulator dissipation is calculated using:
P
V
V
I
D
I
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
PINS **
0.050 (1,27)
8
14
16
DIM
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
M
A MAX
14
8
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
7
A
0.010 (0,25)
0°–8°
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
4040047/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
MECHANICAL DATA
PWP (R-PDSO-G**)
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
20-PIN SHOWN
0,30
0,19
0,65
20
M
0,10
11
Thermal Pad
(See Note D)
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
1
10
0,25
A
0°–8°
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
28
DIM
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4073225/E 03/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusions.
D. Thepackagethermalperformancemaybeenhancedbybondingthethermalpadtoanexternalthermalplane.Thispadiselectrically
and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments Incorporated.
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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