TPS76733QPWPRQ1 [TI]
具有使能功能的汽车类 1A、10V、低压降稳压器 | PWP | 20 | -40 to 125;
| 型号： | TPS76733QPWPRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有使能功能的汽车类 1A、10V、低压降稳压器 | PWP | 20 | -40 to 125 光电二极管 输出元件 稳压器 调节器 |
| 文件： | 总27页 (文件大小：1058K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ꢎꢏꢂ ꢀꢇꢀ ꢐꢏꢑ ꢂꢒ ꢓ ꢑꢀꢇꢐꢓ ꢂꢁꢔ ꢑꢂꢓ ꢅ ꢇꢏ ꢕ ꢔꢖꢇꢗꢐꢔ ꢁ ꢔꢘꢀ ꢙꢔ ꢕꢀꢏꢚ ꢓ ꢐꢓꢚ ꢘ ꢕꢏꢀꢔ ꢐꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
D
D
Qualified for Automotive Applications
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
D
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
Open Drain Power-On Reset With 200-ms
Delay (See TPS768xx for PG Option)
D
D
1−A Low-Dropout (LDO) Voltage Regulator
D
20-Pin TSSOP PowerPAD (PWP) Package
Thermal Shutdown Protection
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3-V, 3.3-V, 5-V Fixed-Output and Adjustable
Versions
D
PWP PACKAGE
(TOP VIEW)
D
Dropout Voltage Down to 230 mV at 1 A
(TPS76750)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
GND/HSINK
NC
GND/HSINK
D
Ultralow 85-µA Typical Quiescent Current
Fast Transient Response
GND
D
NC
NC
EN
RESET
FB/NC
description
IN
IN
OUT
These devices are designed to have a fast transient
response and be stable with 10-µF low ESR
capacitors. This combination provides high
performance at a reasonable cost.
NC
OUT
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
NC − No internal connection
Because the PMOS device behaves as a low-value
resistor, the dropout voltage is very low (typically 230
mV at an output current of 1 A for the TPS76750) and
is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven
device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range
of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in operating life
for battery-powered systems. This low-dropout (LDO) family also features a sleep mode; applying a TTL high
signal to the enable (EN) input shuts down the regulator, reducing the quiescent current to 1 µA at T = 25°C.
J
The RESET output of the TPS767xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS767xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
The TPS767xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3-V, 3.3-V, and 5-V fixed-voltage versions and in
an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS767xx family is available in a 20-pin PWP
package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
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Copyright 2008, Texas Instruments Incorporated
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1
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
TPS76733
DROPOUT VOLTAGE
vs
TPS76733
FREE-AIR TEMPERATURE
LOAD TRANSIENT RESPONSE
3
10
2
10
1
10
0
10
100
C
T
= 10 µF
= 25°C
o
A
I
= 1 A
50
0
O
−50
−100
1
I
O
= 10 mA
0.5
0
−1
10
10
I
= 0
O
C
= 10 µF
o
−2
−60 −40 −20
T
0
20 40 60 80 100 120 140
0
100 200 300 400 500 600 700 800 900 1000
− Free-Air Temperature − °C
t − Time − µs
A
†
AVAILABLE OPTIONS
OUTPUT
VOLTAGE
(V)
TSSOP
(PWP)
T
J
‡
TYP
5
TPS76750QPWPRQ1
TPS76733QPWPRQ1
3.3
3
§
TPS76730QPWPRQ1
TPS76728QPWPRQ1
TPS76727QPWPRQ1
§
§
2.8
2.7
2.5
1.8
1.5
−40°C to 125°C
TPS76725QPWPRQ1
TPS76718QPWPRQ1
TPS76715QPWPRQ1
Adjustable
1.5 V to 5.5 V
TPS76701QPWPRQ1
†
For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see
the TI web site at www.ti.com.
Available taped and reeled in quantities of 2000 per reel
This devices is product preview.
‡
§
2
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
TPS767xx
6
16
V
I
IN
IN
RESET
RESET
7
14
13
OUT
OUT
V
O
5
0.1 µF
EN
†
C
o
+
10 µF
GND
3
†
See application information section for capacitor selection details.
Figure 1. Typical Application Configuration (for Fixed Output Options)
functional block diagram—adjustable version
IN
EN
RESET
OUT
_
+
+
_
200 ms Delay
R1
R2
V
ref
= 1.1834 V
FB/NC
GND
External to the device
3
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
functional block diagram—fixed-voltage version
IN
EN
RESET
OUT
_
+
+
_
200 ms Delay
R1
V
ref
= 1.1834 V
R2
GND
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
5
EN
I
I
Enable
FB/NC
15
3
Feedback voltage for adjustable device (no connect for fixed options)
GND
Regulator ground
Ground/heatsink
GND/HSINK
1, 2, 9, 10, 11,
12, 19, 20
IN
6, 7
4, 8, 17, 18
13, 14
I
Input voltage
No connect
NC
OUT
RESET
O
O
Regulated output voltage
Reset
16
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
timing diagram
V
I
†
V
res
V
res
t
‡
‡
V
O
V
IT+
V
IT+
Threshold
Voltage
Less than 5% of the
output voltage
‡
‡
V
IT−
V
IT−
t
RESET
Output
200 ms
Delay
200 ms
Delay
Output
Undefined
Output
Undefined
t
†
‡
V
is the minimum input voltage for a valid RESET. The symbol V is not currently listed within EIA or JEDEC standards for semiconductor
res
res
symbology.
V
IT
−Trip voltage is typically 5% lower than the output voltage (95%V ) V
IT−
to V is the hysteresis voltage.
IT+
O
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
Ĕ
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Input voltage range , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 13.5 V
I
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V + 0.3 V
I
Maximum RESET voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Output voltage, V (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating tables
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
ESD rating, Human-Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE − FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
0
2.9 W
23.5 mW/°C
34.6 mW/°C
23.8 mW/°C
57.9 mW/°C
1.9 W
2.8 W
1.9 W
4.6 W
1.5 W
2.2 W
1.5 W
3.8 W
§
PWP
PWP
300
0
4.3 W
3 W
¶
300
7.2 W
§
¶
This parameter is measured with the recommended copper heat-sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1-oz copper,
2-in × 2-in coverage (4 in ).
2
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1-oz copper
2
2
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in ) and layers 3 and 6 at 100% coverage (6 in ). For more information, refer
to TI technical brief SLMA002.
recommended operating conditions
MIN
2.7
1.5
0
MAX
10
UNIT
V
Input voltage, V #
I
Output voltage range, V
5.5
V
O
Output current, I (see Note 1)
1.0
A
O
Operating virtual junction temperature, T (see Note 1)
−40
125
°C
J
#
To calculate the minimum input voltage for your maximum output current, use the following equation: V
I(min)
= V
+ V .
DO(max load)
O(max)
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
6
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
electrical characteristics over recommended operating free-air temperature range,
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted)
I
O(typ)
O
o
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.5 V ≤ V ≤ 5.5 V, T = 25°C
V
O
O
J
TPS76701
TPS76715
TPS76718
TPS76725
TPS76727
TPS76728
TPS76730
TPS76733
TPS76750
1.5 V ≤ V ≤ 5.5 V,
T = −40°C to 125°C
J
0.98V
1.02V
O
O
O
T = 25°C,
J
2.7 V < V < 10 V
IN
1.5
1.8
2.5
2.7
2.8
3.0
3.3
5.0
85
T = −40°C to 125°C, 2.7 V < V < 10 V
J IN
1.470
1.530
T = 25°C,
J
2.8 V < V < 10 V
IN
T = −40°C to 125°C, 2.8 V < V < 10 V
J IN
1.764
2.450
2.646
2.744
2.940
3.234
4.900
1.836
2.550
2.754
2.856
3.060
3.366
5.100
125
T = 25°C,
J
3.5 V < V < 10 V
IN
T = −40°C to 125°C, 3.5 V < V < 10 V
J IN
T = 25°C,
J
3.7 V < V < 10 V
IN
Output voltage (10 µA to 1 A load)
(see Note 2)
V
T = −40°C to 125°C, 3.7 V < V < 10 V
J IN
T = 25°C,
J
3.8 V < V < 10 V
IN
T = −40°C to 125°C, 3.8 V < V < 10 V
J IN
T = 25°C,
J
4.0 V < V < 10 V
IN
T = −40°C to 125°C, 4.0 V < V < 10 V
J IN
T = 25°C,
J
4.3 V < V < 10 V
IN
T = −40°C to 125°C, 4.3 V < V < 10 V
J IN
T = 25°C,
J
6.0 V < V < 10 V
IN
T = −40°C to 125°C, 6.0 V < V < 10 V
J IN
10 µA < I < 1 A,
T = 25°C
J
Quiescent current (GND current)
EN = 0V, (see Note 2)
O
µA
I
O
= 1 A,
T = −40°C to 125°C
J
Output voltage line regulation (∆V /V
(see Notes 2 and 3)
O
O
)
V
O
+ 1 V < V ≤ 10 V, T = 25°C
0.01
3
%/V
mV
I
J
Load regulation
BW = 200 Hz to 100 kHz, I = 1 A,
C
Output noise voltage (TPS76718)
Output current limit
55
µVrms
C
= 10 µF,
T = 25°C
J
o
V
O
= 0 V
1.7
2
A
Thermal shutdown junction temperature
150
°C
EN = V
EN = V
T = 25°C,
J
I,
1
2.7 V < V < 10 V
I
Standby current
µA
T = −40°C to 125°C
I,
J
10
2.7 V < V < 10 V
I
FB input current
TPS76701
FB = 1.5 V
2
nA
V
High-level enable input voltage
Low-level enable input voltage
1.7
0.9
V
f = 1 KHz,
T = 25°C
J
C
= 10 µF,
o
Power-supply ripple rejection (see Note 2)
60
dB
NOTES: 2. Minimum IN operating voltage is 2.7 V or V
+ 1 V, whichever is greater. Maximum IN voltage 10 V.
O(typ)
= 2.7 V:
3. If V ≤ 1.8 V then V
Imax
= 10 V, V
Imin
O
OǒVImax * 2.7 VǓ
V
ǒ
Ǔ
Line Regulation (mV) + %ńV
1000
100
If V ≥ 2.5 V then V
Imax
= 10 V, V = V + 1 V:
Imin O
O
* ǒV
Ǔ
1000
ǒVImax
) 1 V Ǔ
V
O
O
ǒ
Ǔ
Line Regulation (mV) + %ńV
100
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
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ꢚꢘ
ꢕ
ꢏ
ꢀ
ꢔ
ꢐ
ꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
electrical characteristics over recommended operating free-air temperature range,
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted) (continued)
I
O(typ)
O
o
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Minimum input voltage for valid RESET
Trip threshold voltage
Hysteresis voltage
I
= 300 µA
1.1
V
O(RESET)
V
decreasing
92
98
%V
%V
V
O
O
Measured at V
0.5
O
O
Reset
Output low voltage
V = 2.7 V,
I
= 1 mA
0.15
0.4
1
I
O(RESET)
Leakage current
V
= 5 V
µA
(RESET)
RESET time-out delay
200
0
ms
EN = 0 V
EN = V
−1
−1
1
1
Input current (EN)
µA
I
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
T = 25°C
500
450
350
230
J
TPS76728
T = −40°C to 125°C
J
825
675
575
380
T = 25°C
J
TPS76730
TPS76733
TPS76750
T = −40°C to 125°C
J
Dropout voltage (see Note 4)
mV
T = 25°C
J
T = −40°C to 125°C
J
T = 25°C
J
T = −40°C to 125°C
J
NOTE 4: IN voltage equals V (typ) − 100 mV; TPS76701 output voltage set to 3.3 V nominal with external resistor divider. TPS76715, TPS76718,
O
TPS76725, and TPS76727 dropout voltage limited by input voltage range limitations (i.e., TPS76730 input voltage needs to drop to 2.9 V
for purpose of this test).
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Output current
vs Free-air temperature
vs Free-air temperature
vs Frequency
2, 3, 4
5, 6, 7
8, 9
10
V
Output voltage
O
Ground current
Power-supply ripple rejection
Output spectral noise density
Input voltage (min)
vs Frequency
11
vs Output voltage
vs Frequency
12
Z
o
Output impedance
13
V
DO
Dropout voltage
vs Free-air temperature
14
Line transient response
Load transient response
Output voltage
15, 17
16, 18
19
V
O
vs Time
Dropout voltage
vs Input voltage
vs Output current
20
Equivalent series resistance (ESR)
22−25
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢅ ꢊ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢋ ꢆ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢃꢋ ꢃꢇ ꢈ ꢅ
ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢋ ꢊꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢌ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢆ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄꢃ ꢍꢅ ꢇꢈ ꢅ
ꢎꢏꢂ ꢀꢇꢀ ꢐꢏꢑ ꢂꢒ ꢓ ꢑꢀꢇꢐꢓ ꢂꢁꢔ ꢑꢂꢓ ꢅ ꢇꢏ ꢕ ꢔꢖꢇꢗꢐꢔ ꢁ ꢔꢘꢀ ꢙꢔ ꢕꢀꢏꢚ ꢓ ꢐꢓꢚ ꢘ ꢕꢏꢀꢔ ꢐꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
TPS76715
OUTPUT VOLTAGE
vs
TPS76733
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
1.4985
1.4980
1.4975
1.4970
1.4965
1.4960
3.2835
3.2830
V = 2.7 V
I
V = 4.3 V
I
T
A
= 25°C
T
A
= 25°C
3.2825
3.2820
3.2815
3.2810
3.2805
3.2800
1.4955
1.4950
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
− Output Current − A
1
I
O
I
O
− Output Current − A
Figure 2
Figure 3
TPS76725
TPS76733
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
2.4960
2.4955
2.4950
2.4945
3.32
3.31
V = 3.5 V
I
V = 4.3 V
I
T
A
= 25°C
3.30
3.29
3.28
3.27
3.26
3.25
I
O
= 1 A
2.4940
2.4935
2.4930
I
O
= 1 mA
2.4925
2.4920
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
−60 −40 −20
0
20 40 60 80 100 120 140
I
O
− Output Current − A
T
A
− Free-Air Temperature − °C
Figure 4
Figure 5
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢏꢀꢔ
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
TPS76715
OUTPUT VOLTAGE
vs
TPS76725
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1.515
2.515
2.510
2.505
2.500
2.495
2.490
V = 3.5 V
I
V = 2.7 V
I
1.510
1.505
1.500
1.495
1.490
1.485
I
O
= 1 A
I
O
= 1 A
I
= 1 mA
O
I
O
= 1 mA
2.485
2.480
−60 −40 −20
0
20 40 60 80 100 120 140
−60 −40 −20
0
20
40
60
80 100 120
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 6
Figure 7
TPS76733
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
92
90
V = 4.3 V
I
88
86
84
82
80
78
76
I
O
= 1 mA
I
O
= 1 A
I
O
= 500 mA
74
72
−60 −40 −20
0
20 40 60 80 100 120 140
T
A
− Free-Air Temperature − °C
Figure 8
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢅ ꢊ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢋ ꢆ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢃꢋ ꢃꢇ ꢈ ꢅ
ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢋ ꢊꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢌ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢆ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄꢃ ꢍꢅ ꢇꢈ ꢅ
ꢎꢏꢂ ꢀꢇꢀ ꢐꢏꢑ ꢂꢒ ꢓ ꢑꢀꢇꢐꢓ ꢂꢁꢔ ꢑꢂꢓ ꢅ ꢇꢏ ꢕ ꢔꢖꢇꢗꢐꢔ ꢁ ꢔꢘꢀ ꢙꢔ ꢕꢀꢏꢚ ꢓ ꢐꢓꢚ ꢘ ꢕꢏꢀꢔ ꢐꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
TPS76715
TPS76733
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
POWER-SUPPLY RIPPLE REJECTION
vs
FREQUENCY
90
80
70
100
95
90
85
80
75
V = 4.3 V
I
V = 2.7 V
I
C
= 10 µF
= 1 A
= 25°C
o
I
T
O
A
60
50
40
30
20
I
= 1 A
O
I
O
= 1 mA
I
= 500 mA
O
10
0
−10
10
100
1k
−60 −40 −20
0
20 40 60 80 100 120 140
10k
100k
1M
T
A
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 9
Figure 10
TPS76733
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
−5
10
10
V = 4.3 V
I
o
A
C
T
= 10 µF
= 25°C
I
O
= 7 mA
−6
I
O
= 1 A
−7
−8
10
10
2
10
3
10
4
10
5
10
f − Frequency − Hz
Figure 11
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
INPUT VOLTAGE (MIN)
vs
OUTPUT VOLTAGE
4
I
O
= 1 A
T
A
= 25°C
T
A
= 125°C
3
T
A
= −40°C
2.7
2
1.5 1.75
2
2.25 2.5 2.75
3
3.25 3.5
V
O
− Output Voltage − V
Figure 12
TPS76733
TPS76733
OUTPUT IMPEDANCE
vs
DROPOUT VOLTAGE
vs
FREQUENCY
FREE-AIR TEMPERATURE
3
2
1
0
0
−1
−2
10
10
10
10
V = 4.3 V
I
C
T
A
= 10 µF
= 25°C
o
I
= 1 A
O
I
O
= 1 mA
10
I
O
= 10 mA
I
= 1 A
−1
O
10
10
I
= 0
O
C
= 10 µF
o
−2
10
1
2
10
3
10
4
5
10
6
10
−60 −40 −20
0
20 40 60 80 100 120 140
10
10
f − Frequency − kHz
T
A
− Free-Air Temperature − °C
Figure 13
Figure 14
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢋ ꢊꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢌ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢆ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄꢃ ꢍꢅ ꢇꢈ ꢅ
ꢎꢏꢂ ꢀꢇꢀ ꢐꢏꢑ ꢂꢒ ꢓ ꢑꢀꢇꢐꢓ ꢂꢁꢔ ꢑꢂꢓ ꢅ ꢇꢏ ꢕ ꢔꢖꢇꢗꢐꢔ ꢁ ꢔꢘꢀ ꢙꢔ ꢕꢀꢏꢚ ꢓ ꢐꢓꢚ ꢘ ꢕꢏꢀꢔ ꢐꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
TPS76715
TPS76715
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
100
C
T
= 10 µF
= 25°C
o
A
3.7
2.7
50
0
−50
−100
10
1
0
0.5
0
−10
C
T
A
= 10 µF
= 25°C
o
0
20 40 60 80 100 120 140 160 180 200
0
100 200 300 400 500 600 700 800 900 1000
t − Time − µs
t − Time − µs
Figure 15
Figure 16
TPS76733
TPS76733
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
100
C
T
= 10 µF
= 25°C
C
T
= 10 µF
= 25°C
o
A
o
A
50
0
5.3
−50
−100
1
4.3
10
0
0.5
0
−10
0
20 40 60 80 100 120 140 160 180 200
0
100 200 300 400 500 600 700 800 900 1000
t − Time − µs
t − Time − µs
Figure 17
Figure 18
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢚꢘ
ꢕ
ꢏꢀꢔ
ꢐ
ꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
TPS76733
TPS76701
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
4
900
800
700
600
500
400
300
200
C
I
T
A
= 10 µF
= 1 A
= 25°C
I
O
= 1 A
o
O
3
2
1
T
A
= 125°C
0
T
A
= 25°C
T
A
= −40°C
0
100
0
2.5
3
3.5
4
4.5
5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
t − Time − ms
1
V − Input Voltage − V
I
Figure 19
Figure 20
To Load
IN
V
I
OUT
+
C
o
R
EN
L
GND
ESR
Figure 21. Test Circuit for Typical Regions of Stability (Figures 22 Through 25) (Fixed-Output Options)
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢅ ꢊ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢋ ꢆ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢃꢋ ꢃꢇ ꢈ ꢅ
ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢋ ꢊꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢌ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢆ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄꢃ ꢍꢅ ꢇꢈ ꢅ
ꢎꢏꢂ ꢀꢇꢀ ꢐꢏꢑ ꢂꢒ ꢓ ꢑꢀꢇꢐꢓ ꢂꢁꢔ ꢑꢂꢓ ꢅ ꢇꢏ ꢕ ꢔꢖꢇꢗꢐꢔ ꢁ ꢔꢘꢀ ꢙꢔ ꢕꢀꢏꢚ ꢓ ꢐꢓꢚ ꢘ ꢕꢏꢀꢔ ꢐꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
TYPICAL CHARACTERISTICS
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
†
†
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
1
Region of Instability
Region of Instability
1
V
C
= 3.3 V
= 4.7 µF
O
o
V
= 3.3 V
O
C
= 4.7 µF
V = 4.3 V
o
Region of Stability
I
A
Region of Stability
V = 4.3 V
T
= 25°C
I
J
T
= 125°C
0.1
0.1
Region of Instability
Region of Instability
0.01
0.01
0
200
I
400
600
800
1000
0
200
400
600
800
1000
− Output Current − mA
I
O
− Output Current − mA
O
Figure 22
Figure 23
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
†
†
EQUIVALENT SERIES RESISTANCE
EQUIVALENT SERIES RESISTANCE
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
1
1
V
C
= 3.3 V
= 22 µF
O
o
V = 3.3 V
O
Region of Stability
C
= 22 µF
o
Region of Stability
V = 4.3 V
I
A
V = 4.3 V
I
J
T
= 25°C
T
= 125°C
0.1
0.1
Region of Instability
Region of Instability
0.01
0.01
0
200
400
600
800
1000
0
200
I
400
600
800
1000
I
O
− Output Current − mA
− Output Current − mA
O
Figure 24
Figure 25
†
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to C .
o
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢏꢀꢔ
ꢐ
ꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
APPLICATION INFORMATION
The TPS767xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3 V, 3.3 V,
and 5 V), and an adjustable regulator, the TPS76701 (adjustable from 1.5 V to 5.5 V).
device operation
The TPS767xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (I = I /β). The TPS767xx uses a PMOS transistor to pass current; because
B
C
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in I to maintain the load. During power up, this translates
B
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS767xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS767xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown
feature is not used, EN should be tied to ground.
minimum load requirements
The TPS767xx family is stable even at zero load; no minimum load is required for operation.
FB—pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as shown in Figure 27. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS767xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS767xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the equivalent
series resistance (ESR) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable,
provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic
capacitors are all suitable, provided they meet the requirements described above. Most of the commercially
available 10-µF surface-mount ceramic capacitors, including devices from Sprague and Kemet, meet the ESR
requirements stated above.
16
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ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢋ ꢊꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢌ ꢌ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄ ꢃ ꢆ ꢍ ꢇꢈ ꢅ ꢉ ꢀ ꢁꢂꢃ ꢄꢃ ꢍꢅ ꢇꢈ ꢅ
ꢎꢏꢂ ꢀꢇꢀ ꢐꢏꢑ ꢂꢒ ꢓ ꢑꢀꢇꢐꢓ ꢂꢁꢔ ꢑꢂꢓ ꢅ ꢇꢏ ꢕ ꢔꢖꢇꢗꢐꢔ ꢁ ꢔꢘꢀ ꢙꢔ ꢕꢀꢏꢚ ꢓ ꢐꢓꢚ ꢘ ꢕꢏꢀꢔ ꢐꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
APPLICATION INFORMATION
external capacitor requirements (continued)
TPS767xx
6
7
16
RESET
V
I
IN
IN
RESET
250 kΩ
14
13
V
OUT
OUT
O
C1
0.1 µF
5
EN
C
+
o
10 µF
GND
3
Figure 26. Typical Application Circuit (Fixed Versions)
programming the TPS76701 adjustable LDO regulator
The output voltage of the TPS76701 adjustable regulator is programmed using an external resistor divider as
shown in Figure 27. The output voltage is calculated using:
R1
R2
ǒ1 )
Ǔ
(1)
V
+ V
O
ref
Where:
V
= 1.1834 V typ (the internal reference voltage)
ref
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:
V
O
R1 +
ǒ
* 1
Ǔ
R2
(2)
V
ref
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS76701
OUTPUT
VOLTAGE
R1
33.2
R2
UNIT
Reset Output
250 kΩ
V
I
IN
RESET
OUT
0.1 µF
2.5 V
3.3 V
30.1
30.1
30.1
30.1
kΩ
kΩ
kΩ
kΩ
≥ 1.7 V
53.6
61.9
90.8
EN
V
O
3.6 V
≤ 0.9 V
R1
C
4.75 V
o
FB / NC
GND
R2
Figure 27. TPS76701 Adjustable LDO Regulator Programming
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢐ
ꢓ
ꢚꢘ
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ꢏꢀꢔ
ꢐ
ꢂ
SGLS009B − MARCH 2003 − REVISED APRIL 2008
APPLICATION INFORMATION
reset indicator
The TPS767xx features a RESET output that can be used to monitor the status of the regulator. The internal
comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires
a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as
a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the
specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer
to timing diagram for start-up sequence).
regulator protection
The TPS767xx PMOS pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS767xx also features internal current limiting and thermal protection. During normal operation, the
TPS767xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 150°C (typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C (typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than
D(max)
D
or equal to P
.
D(max)
The maximum power dissipation limit is determined using the following equation:
T max * T
J
A
P
+
D(max)
R
θJA
Where:
T max is the maximum allowable junction temperature.
J
R
is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
θJA
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
T is the ambient temperature.
A
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
D
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the
thermal protection circuit.
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS76733QPWPRQ1
TPS76750QPWPRQ1
ACTIVE
ACTIVE
HTSSOP
HTSSOP
PWP
PWP
20
20
2000 RoHS & Green
2000 RoHS & Green
NIPDAU
Level-3-260C-168 HR
Level-3-260C-168 HR
-40 to 125
-40 to 125
76733Q1
76750Q1
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
OTHER QUALIFIED VERSIONS OF TPS767-Q1 :
Catalog: TPS767
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jul-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS76733QPWPRQ1 HTSSOP PWP
TPS76750QPWPRQ1 HTSSOP PWP
20
20
2000
2000
330.0
330.0
16.4
16.4
6.95
6.95
7.1
7.1
1.6
1.6
8.0
8.0
16.0
16.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jul-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS76733QPWPRQ1
TPS76750QPWPRQ1
HTSSOP
HTSSOP
PWP
PWP
20
20
2000
2000
350.0
350.0
350.0
350.0
43.0
43.0
Pack Materials-Page 2
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