TPS76828-EP
更新时间:2024-09-18 07:39:23
品牌:TI
描述:FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
TPS76828-EP 概述
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS 快速瞬态响应1 -A低压差稳压器
TPS76828-EP 数据手册
通过下载TPS76828-EP数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
FEATURES
SUPPORTS DEFENSE, AEROSPACE AND
MEDICAL APPLICATION
D
D
1−A Low-Dropout Voltage Regulator
D
D
D
D
Controlled Baseline
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and
Adjustable Versions
One Assembly/Test Site
One Fabrication Site
D
Dropout Voltage Down to 230 mV at 1 A
(TPS76850)
Available in Military (−555C/1255C)
{
Temperature Range
D
D
D
Ultralow 85−µA Typical Quiescent Current
Fast Transient Response
D
D
D
Extended Product LIfe Cycle
Extended Product−Change Notification
Product Traceability
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
†
Additional temperature ranges are available − contact factory.
D
Open Drain Power Good (See TPS767xx for
Power-On Reset With 200-ms Delay Option)
PWP PACKAGE
(TOP VIEW)
D
20-Pin TSSOP (PWP)PowerPAD Package
Thermal Shutdown Protection
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
GND/HSINK
NC
D
GND/HSINK
description
GND
NC
NC
This device is designed to have a fast transient
response and be stable with 10-µF low ESR
capacitors. This combination provides high
performance at a reasonable cost.
EN
PG
IN
IN
FB/NC
OUT
NC
OUT
Because the PMOS device behaves as a low-value
resistor, the dropout voltage is very low (typically 230
mV at an output current of 1 A for the TPS76850) and
is directly proportional to the output current.
Additionally, since the PMOS pass element is a
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
NC − No internal connection
voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over
the full range of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in
operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high
signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at T = 25°C.
J
Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery
indicator.
The TPS768xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.2 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS768xx family is available in a 20-pin PWP
package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
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Copyright 2008, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
description (continued)
TPS76833
DROPOUT VOLTAGE
vs
LOAD TRANSIENT RESPONSE
FREE-AIR TEMPERATURE
3
10
2
10
1
10
0
10
100
C
T
= 10 µF
= 25°C
o
A
I
= 1 A
50
0
O
−50
−100
1
I
O
= 10 mA
0.5
0
−1
10
10
I
= 0
O
C
= 10 µF
o
−2
−60 −40 −20
T
0
20 40 60 80 100 120 140
0
100 200 300 400 500 600 700 800 900 1000
− Free-Air Temperature − °C
t − Time − µs
A
†
ORDERING INFORMATION
OUTPUT
VOLTAGE
(V)
ORDERABLE PART
NUMBER
TOP-SIDE
MARKING
‡
PACKAGE
T
J
TYP
5.0
3.3
3.0
2.8
2.7
TPS76850QPWPREP
TPS76833QPWPREP
76850EP
76833EP
§
§
§
§
TPS76830QPWPREP
TPS76828QPWPREP
TPS76827QPWPREP
76830EP
76828EP
76827EP
76825EP
76818EP
76815EP
§
§
−40°C to 125°C
TSSOP - PWP
Tape and reel
2.5
1.8
1.5
TPS76825QPWPREP
TPS76818QPWPREP
TPS76815QPWPREP
Adjustable
1.2 V to 5.5 V
TPS76801QPWPREP
76801EP
Adjustable
1.2 V to 5.5 V
TPS76801MPWPREP
TPS76850MPWPREP
76801ME
76850ME
−55°C to 125°C
TSSOP - PWP
Tape and reel
5.0
†
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or
see the TI web site at http://www.ti.com.
‡
§
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
This device is Product Preview.
The TPS76801 is programmable using an external resistor divider (see application information). The PWP package is
available taped and reeled. Note R suffix to the device type (e.g., TPS76801QPWPREP).
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
description (continued)
TPS768xx
6
16
V
I
IN
PG
PG
7
IN
14
13
OUT
OUT
V
O
5
0.1 µF
EN
†
C
o
+
10 µF
GND
3
†
See application information section for capacitor selection details.
Figure 1. Typical Application Configuration (For Fixed Output Options)
functional block diagram—adjustable version
IN
EN
PG
_
+
OUT
+
_
R1
R2
V
ref
= 1.1834 V
FB/NC
GND
External to the device
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
functional block diagram—fixed-voltage version
IN
EN
PG
_
+
OUT
+
_
R1
V
ref
= 1.1834 V
R2
GND
Terminal Functions
PWP Package
TERMINAL
NAME
I/O
DESCRIPTION
NO.
1
GND/HSINK
GND/HSINK
GND
Ground/heatsink
2
Ground/heatsink
LDO ground
3
NC
4
No connect
EN
5
I
I
I
Enable input
IN
6
Input
IN
7
Input
NC
8
No connect
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
OUT
9
Ground/heatsink
Ground/heatsink
Ground/heatsink
Ground/heatsink
Regulated output voltage
Regulated output voltage
10
11
12
13
14
15
16
17
18
19
20
O
O
I
OUT
FB/NC
Feedback input voltage for adjustable device (no connect for fixed options)
PG
O
PG output
NC
No connect
NC
No connect
GND/HSINK
GND/HSINK
Ground/heatsink
Ground/heatsink
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
Ĕ
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Input voltage range , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 13.5 V
I
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V + 0.3 V
I
Maximum PG voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table
Output voltage, V (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
O
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE − FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
0
2.9 W
23.5 mW/°C
34.6 mW/°C
23.8 mW/°C
57.9 mW/°C
1.9 W
2.8 W
1.9 W
4.6 W
1.5 W
2.2 W
1.5 W
3.8 W
§
PWP
PWP
300
0
4.3 W
3 W
¶
300
7.2 W
§
¶
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in ).
2
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
2
2
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in ) and layers 3 and 6 at 100% coverage (6 in ). For more information, refer
to TI technical brief SLMA002.
recommended operating conditions
MIN
2.7
1.2
0
MAX
10
UNIT
V
#
Input voltage, V
I
Output voltage range, V
5.5
V
O
Output current, I (see Note 1)
1.0
A
O
Operating virtual junction temperature, T (see Note 1)
−40
125
°C
J
#
To calculate the minimum input voltage for your maximum output current, use the following equation: V
I(min)
= V
+ V .
DO(max load)
O(max)
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
electrical characteristics over recommended operating free-air temperature range,
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted)
I
O(typ)
O
o
PARAMETER
TEST CONDITIONS
5.5 V ≥ V ≥ 1.5 V, T = 25°C
MIN
TYP
MAX
UNIT
V
O
O
J
TPS76801
TPS76815
TPS76818
TPS76825
TPS76827
TPS76828
TPS76830
TPS76833
TPS76850
5.5 V ≥ V ≥ 1.5 V,
T = −40°C to 125°C
0.98V
1.02V
O
J
O
O
T = 25°C,
J
2.7 V < V < 10 V
IN
1.5
1.8
2.5
2.7
2.8
3.0
3.3
5.0
85
T = −40°C to 125°C, 2.7 V < V < 10 V
J IN
1.470
1.530
T = 25°C,
J
2.8 V < V < 10 V
IN
T = −40°C to 125°C, 2.8 V < V < 10 V
J IN
1.764
2.450
2.646
2.744
2.940
3.234
4.900
1.836
2.550
2.754
2.856
3.060
3.366
5.100
125
T = 25°C,
J
3.5 V < V < 10 V
IN
T = −40°C to 125°C, 3.5 V < V < 10 V
J IN
Output voltage
(10 µA to 1 A load)
(see Note 2)
T = 25°C,
J
3.7 V < V < 10 V
IN
V
T = −40°C to 125°C, 3.7 V < V < 10 V
J IN
T = 25°C,
J
3.8 V < V < 10 V
IN
T = −40°C to 125°C, 3.8 V < V < 10 V
J IN
T = 25°C,
J
4 V < V < 10 V
IN
T = −40°C to 125°C, 4 V < V < 10 V
J IN
T = 25°C,
J
4.3 V < V < 10 V
IN
T = −40°C to 125°C, 4.3 V < V < 10 V
J IN
T = 25°C,
J
6 V < V < 10 V
IN
T = −40°C to 125°C, 6 V < V < 10 V
J IN
10 µA < I < 1 A,
T = 25°C
J
Quiescent current (GND current)
EN = 0V, (see Note 2)
O
µA
I
O
= 1 A,
T = −40°C to 125°C
J
Output voltage line regulation (∆V /V
(see Notes 2 and 3)
O
O
)
V
O
+ 1 V < V ≤ 10 V, T = 25°C
0.01
3
%/V
mV
I
J
Load regulation
BW = 200 Hz to 100 kHz,
Output noise voltage (TPS76818)
Output current limit
55
µVrms
C
= 10 µF, I = 1 A, T = 25°C
C J
o
V
O
= 0 V
1.7
2
A
Thermal shutdown junction temperature
150
°C
EN = V ,
2.7 V < V < 10 V
T = 25°C,
J
I
1
µA
µA
I
Standby current
EN = V ,
T = −40°C to 125°C
J
I
10
2.7 V < V < 10 V
I
FB input current
TPS76801
FB = 1.5 V
2
nA
V
High level enable input voltage
Low level enable input voltage
1.7
0.9
V
f = 1 KHz,
T = 25°C
J
C
= 10 µF,
o
Power supply ripple rejection (see Note 2)
60
dB
NOTES: 2. Minimum IN operating voltage is 2.7 V or V
+ 1 V, whichever is greater. Maximum IN voltage 10 V.
O(typ)
= 2.7 V:
3. If V ≤ 1.8 V then V
Imax
= 10 V, V
Imin
O
OǒVImax * 2.7 VǓ
V
ǒ
Ǔ
Line Reg. (mV) + %ńV
1000
100
If V ≥ 2.5 V then V
Imax
= 10 V, V = V + 1 V:
Imin O
O
* ǒVO
100
Ǔ
OǒVImax
) 1 V Ǔ
V
ǒ
Ǔ
Line Reg. (mV) + %ńV
1000
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
electrical characteristics over recommended operating free-air temperature range,
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted) (continued)
I
O(typ)
O
o
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Minimum input voltage for valid PG
Trip threshold voltage
Hysteresis voltage
I
= 300 µA
1.1
V
O(PG)
V
decreasing
92
98
%V
%V
V
O
O
Measured at V
0.5
PG
O
O
Output low voltage
V = 2.7 V,
I
= 1 mA
0.15
0.4
1
I
O(PG)
Leakage current
V
= 5 V
µA
(PG)
EN = 0 V
EN = V
−1
−1
0
500
450
350
230
1
Input current (EN)
µA
1
I
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
= 1 A,
T = 25°C
J
TPS76828
TPS76830
TPS76833
TPS76850
T = −40°C to 125°C
825
675
575
380
J
T = 25°C
J
T = −40°C to 125°C
Dropout voltage
(see Note 4)
J
mV
T = 25°C
J
T = −40°C to 125°C
J
T = 25°C
J
T = −40°C to 125°C
J
NOTE 4: IN voltage equals V (typ) − 100 mV; TPS76801 output voltage set to 3.3 V nominal with external resistor divider. TPS76815, TPS76818,
O
TPS76825, and TPS76827 dropout voltage limited by input voltage range limitations (i.e., TPS76830 input voltage needs to drop to
2.9 V for purpose of this test).
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Output current
vs Free-air temperature
vs Free-air temperature
vs Frequency
2, 3, 4
5, 6, 7
8, 9
V
Output voltage
O
Ground current
Power supply ripple rejection
Output spectral noise density
Input voltage (min)
10
vs Frequency
11
vs Output voltage
vs Frequency
12
Z
o
Output impedance
13
V
DO
Dropout voltage
vs Free-air temperature
14
Line transient response
Load transient response
Output voltage
15, 17
16, 18
19
V
O
vs Time
Dropout voltage
vs Input voltage
vs Output current
20
Equivalent series resistance (ESR)
22 − 25
7
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ꢈ
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ꢉ
ꢁ
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ꢄ
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ꢁ
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ꢃ
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ꢅ
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ꢗ
ꢈ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TPS76815
TPS76833
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
1.4985
1.4980
1.4975
1.4970
1.4965
1.4960
3.2835
3.2830
V = 2.7 V
I
V = 4.3 V
I
T
A
= 25°C
T
A
= 25°C
3.2825
3.2820
3.2815
3.2810
3.2805
3.2800
1.4955
1.4950
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
− Output Current − A
1
I
O
I
O
− Output Current − A
Figure 2
Figure 3
TPS76825
TPS76833
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
2.4960
2.4955
2.4950
2.4945
3.32
3.31
V = 3.5 V
I
V = 4.3 V
I
T
A
= 25°C
3.30
3.29
3.28
3.27
3.26
3.25
I
O
= 1 A
2.4940
2.4935
2.4930
I
O
= 1 mA
2.4925
2.4920
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
−60 −40 −20
0
20 40 60 80 100 120 140
I
O
− Output Current − A
T
A
− Free-Air Temperature − °C
Figure 4
Figure 5
8
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ꢀ
ꢃ
ꢈ
ꢓ
ꢈ
ꢉ
ꢉ
ꢐ
ꢁ
ꢁ
ꢂ
ꢀ
ꢁ
ꢐ
ꢂ
ꢏ
ꢃ
ꢑ
ꢄ
ꢂ
ꢅ
ꢒ
ꢋ
ꢉ
ꢅ
ꢑ
ꢈ
ꢉ
ꢀꢈ
ꢁ
ꢊ
ꢀ
ꢁ
ꢀ
ꢁ
ꢀ
ꢁ
ꢎꢏ
ꢂ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TPS76815
TPS76825
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1.515
2.515
2.510
2.505
2.500
2.495
2.490
V = 3.5 V
I
V = 2.7 V
I
1.510
1.505
1.500
1.495
1.490
1.485
I
O
= 1 A
I
O
= 1 A
I
= 1 mA
O
I
O
= 1 mA
2.485
2.480
−60 −40 −20
0
20 40 60 80 100 120 140
−60 −40 −20
0
20
40
60
80 100 120
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 6
Figure 7
TPS76833
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
92
90
V = 4.3 V
I
88
86
84
82
80
78
76
I
O
= 1 mA
I
O
= 1 A
I
O
= 500 mA
74
72
−60 −40 −20
0
20 40 60 80 100 120 140
T
A
− Free-Air Temperature − °C
Figure 8
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢆ
ꢗ
ꢈ
ꢉ
ꢔ
ꢁ
ꢏ
ꢎ
ꢏ
ꢀ
ꢈ
ꢀ
ꢉ
ꢑ
ꢉ
ꢈ
ꢏ
ꢈ
ꢖ
ꢓ
ꢏ
ꢙ
ꢀ
ꢓ
ꢐ
ꢂ
SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TPS76815
TPS76833
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
90
80
70
100
95
90
85
80
75
V = 4.3 V
I
V = 2.7 V
I
C
= 10 µF
= 1 A
= 25°C
o
I
T
O
A
60
50
40
30
20
I
= 1 A
O
I
O
= 1 mA
I
= 500 mA
O
10
0
−10
10
100
1k
−60 −40 −20
0
20 40 60 80 100 120 140
10k
100k
1M
T
A
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 9
Figure 10
TPS76833
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
−5
10
10
V = 4.3 V
I
o
A
C
T
= 10 µF
= 25°C
I
O
= 7 mA
−6
I
O
= 1 A
−7
−8
10
10
2
10
3
10
4
10
5
10
f − Frequency − Hz
Figure 11
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢏ
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ꢅ
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ꢅ
ꢑ
ꢈ
ꢉ
ꢀꢈ
ꢁ
ꢊ
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ꢁ
ꢀ
ꢁ
ꢀ
ꢁ
ꢎꢏ
ꢂ
ꢀꢈ
ꢀ
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ꢈ
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ꢔ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
INPUT VOLTAGE (MIN)
vs
OUTPUT VOLTAGE
4
I
O
= 1 A
T
A
= 25°C
T
A
= 125°C
3
T
A
= −40°C
2.7
2
1.5 1.75
2
2.25 2.5 2.75
3
3.25 3.5
V
O
− Output Voltage − V
Figure 12
TPS76833
TPS76833
DROPOUT VOLTAGE
vs
OUTPUT IMPEDANCE
vs
FREQUENCY
FREE-AIR TEMPERATURE
3
2
1
0
0
−1
−2
10
10
10
10
V = 4.3 V
I
C
T
A
= 10 µF
= 25°C
o
I
= 1 A
O
I
O
= 1 mA
10
I
O
= 10 mA
I
= 1 A
−1
O
10
10
I
= 0
O
C
= 10 µF
o
−2
10
1
2
10
3
10
4
5
10
6
10
−60 −40 −20
0
20 40 60 80 100 120 140
10
10
f − Frequency − kHz
T
A
− Free-Air Temperature − °C
Figure 13
Figure 14
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢀ
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ꢂ
ꢁ
ꢂ
ꢃ
ꢓ
ꢃ
ꢄ
ꢗ
ꢄ
ꢅ
ꢅ
ꢇ
ꢀ
ꢋ
ꢍ
ꢘ
ꢃ
ꢈ
ꢓ
ꢈ
ꢉ
ꢉ
ꢁ
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ꢁ
ꢊ
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ꢀ
ꢁ
ꢃ
ꢄ
ꢀ
ꢁ
ꢀ
ꢁ
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ꢂ
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ꢃ
ꢐ
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ꢅ
ꢍ
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ꢆ
ꢗ
ꢈ
ꢉ
ꢔ
ꢁ
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ꢏ
ꢀ
ꢈ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TPS76815
TPS76815
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
100
C
T
= 10 µF
= 25°C
o
A
3.7
2.7
50
0
−50
−100
10
1
0
0.5
0
−10
C
T
A
= 10 µF
= 25°C
o
0
20 40 60 80 100 120 140 160 180 200
0
100 200 300 400 500 600 700 800 900 1000
t − Time − µs
t − Time − µs
Figure 15
Figure 16
TPS76833
TPS76833
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
100
C
T
= 10 µF
= 25°C
C
T
= 10 µF
= 25°C
o
A
o
A
50
0
5.3
−50
−100
1
4.3
10
0.5
0
0
−10
0
100 200 300 400 500 600 700 800 900 1000
0
20 40 60 80 100 120 140 160 180 200
t − Time − µs
t − Time − µs
Figure 17
Figure 18
12
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ꢄ
ꢂ
ꢅ
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ꢋ
ꢉ
ꢅ
ꢑ
ꢈ
ꢉ
ꢀꢈ
ꢁ
ꢊ
ꢀ
ꢁ
ꢀ
ꢁ
ꢀ
ꢁ
ꢎꢏ
ꢂ
ꢀꢈ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TPS76833
TPS76801
DROPOUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
INPUT VOLTAGE
4
900
800
700
600
500
400
300
200
I
O
= 1 A
C
= 10 µF
= 1 A
= 25°C
o
3
2
1
I
T
O
A
T
A
= 125°C
0
T
A
= 25°C
T
A
= −40°C
100
0
2.5
3
3.5
4
4.5
5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
t − Time − ms
1
V − Input Voltage − V
I
Figure 19
Figure 20
To Load
IN
V
I
OUT
+
C
o
R
EN
L
GND
ESR
Figure 21. Test Circuit for Typical Regions of Stability (Figures 22 through 25) (Fixed Output Options)
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
†
†
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
V
= 3.3 V
O
C
= 4.7 µF
o
V = 4.3 V
I
J
T
= 125°C
1
1
Region of Stability
Region of Stability
V
C
= 3.3 V
= 4.7 µF
O
o
V = 4.3 V
I
A
T
= 25°C
0.1
0.1
0
200
400
600
800
1000
0
200
400
600
800
1000
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 22
Figure 23
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
†
†
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
V
= 3.3 V
O
C = 22 µF
o
V = 4.3 V
I
J
T
= 125°C
1
1
Region of Stability
Region of Stability
V
C
= 3.3 V
= 22 µF
O
o
V = 4.3 V
I
A
T
= 25°C
0.1
0.1
0
200
400
600
800
1000
0
200
400
600
800
1000
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 24
Figure 25
†
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to C .
o
14
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ꢈ
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ꢀꢈ
ꢁ
ꢊ
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ꢁ
ꢀ
ꢁ
ꢀ
ꢁ
ꢎꢏ
ꢂ
ꢀꢈ
ꢀ
ꢐ
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ꢈ
ꢏ
ꢔ
ꢈ
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ꢗ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
APPLICATION INFORMATION
The TPS768xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,
3.3 V, and 5.0 V), and offers an adjustable device, the TPS76801 (adjustable from 1.2 V to 5.5 V).
device operation
The TPS768xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (I = I /β). The TPS768xx uses a PMOS transistor to pass current; because
B
C
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in I to maintain the load. During power up, this translates
B
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS768xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS768xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown
feature is not used, EN should be tied to ground.
minimum load requirements
The TPS768xx family is stable even at zero load; no minimum load is required for operation.
FB - pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output
voltage is sensed through a resistor divider network to close the loop as shown in Figure 27. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS768xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS768xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR
(equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are
acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and
multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of
the commercially available 10 µF surface-mount ceramic capacitors, including devices from Sprague and
Kemet, meet the ESR requirements stated above.
15
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ꢇ
ꢈ
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ꢁ
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ꢊ
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ꢂ
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ꢃ
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ꢄ
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ꢄ
ꢅ
ꢅ
ꢇ
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ꢍ
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ꢃ
ꢈ
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ꢈ
ꢉ
ꢉ
ꢁ
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ꢁ
ꢊ
ꢀ
ꢀ
ꢁ
ꢃ
ꢄ
ꢀ
ꢁ
ꢀ
ꢁ
ꢀ
ꢁ
ꢂ
ꢉ
ꢃ
ꢐ
ꢄ
ꢉ
ꢅ
ꢍ
ꢙ
ꢆ
ꢗ
ꢈ
ꢉ
ꢔ
ꢁ
ꢏ
ꢎ
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ꢀ
ꢈ
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ꢉ
ꢑ
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ꢈ
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ꢈ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
APPLICATION INFORMATION
external capacitor requirements (continued)
TPS768xx
6
7
16
V
I
IN
PG
PG
250 kΩ
IN
14
13
V
OUT
OUT
O
C1
0.1 µF
5
EN
C
+
o
10 µF
GND
3
Figure 26. Typical Application Circuit (Fixed Versions)
programming the TPS76801 adjustable LDO regulator
The output voltage of the TPS76801 adjustable regulator is programmed using an external resistor divider as
shown in Figure 27. The output voltage is calculated using:
R1
R2
ǒ1 )
Ǔ
(1)
V
+ V
O
ref
Where:
V
= 1.1834 V typ (the internal reference voltage)
ref
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:
V
O
R1 +
ǒ
* 1
Ǔ
R2
(2)
V
ref
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS76801
OUTPUT
VOLTAGE
R1
R2
UNIT
V
I
IN
PG
OUT
PG
0.1 µF
2.5 V
3.3 V
33.2
53.6
61.9
90.8
30.1
30.1
30.1
30.1
kΩ
kΩ
kΩ
kΩ
250 kΩ
≥ 1.7 V
EN
V
O
3.6 V
≤ 0.9 V
R1
R2
4.75 V
FB / NC
GND
Figure 27. TPS76801 Adjustable LDO Regulator Programming
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
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ꢁ
ꢃ
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ꢑ
ꢅ
ꢅ
ꢂ
ꢆ
ꢌ
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ꢍ
ꢉ
ꢈ
ꢈ
ꢉ
ꢉ
ꢆ
ꢁ
ꢁ
ꢊ
ꢀ
ꢁ
ꢂ
ꢓ
ꢂ
ꢃ
ꢕ
ꢃ
ꢄ
ꢄ
ꢅ
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ꢆ
ꢌ
ꢅ
ꢈ
ꢓ
ꢈ
ꢉ
ꢉ
ꢁ
ꢁ
ꢁ
ꢊ
ꢓ
ꢊ
ꢀ
ꢁ
ꢂ
ꢂ
ꢃ
ꢘ
ꢃ
ꢄ
ꢓ
ꢄ
ꢅ
ꢔ
ꢅ
ꢇ
ꢀ
ꢋ
ꢍ
ꢏ
ꢇ
ꢈ
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ꢈ
ꢉ
ꢉ
ꢁ
ꢉ
ꢁ
ꢊ
ꢐ
ꢊ
ꢀ
ꢁ
ꢂ
ꢙ
ꢂ
ꢃ
ꢗ
ꢃ
ꢄ
ꢔ
ꢄ
ꢅ
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ꢋ
ꢆ
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ꢃ
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ꢉ
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ꢃ
ꢑ
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ꢀꢈ
ꢁ
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ꢎꢏ
ꢂ
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SGLS011B − MARCH 2003 − REVISED DECEMBER 2008
APPLICATION INFORMATION
power-good indicator
The TPS768xx features a power-good (PG) output that can be used to monitor the status of the regulator. The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator. PG does not assert itself when the regulated output voltage falls out of the specified 2%
tolerance, but instead reports an output voltage low, relative to its nominal regulated value.
regulator protection
The TPS768xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS768xx also features internal current limiting and thermal protection. During normal operation, the
TPS768xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than
D(max)
D
or equal to P
.
D(max)
The maximum-power-dissipation limit is determined using the following equation:
T max * T
J
A
P
+
D(max)
R
qJA
Where:
T max is the maximum allowable junction temperature.
J
R
is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
θJA
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
T is the ambient temperature.
A
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
D
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Dec-2008
PACKAGING INFORMATION
Orderable Device
TPS76801MPWPREP
TPS76801QPWPREP
TPS76815QPWPREP
TPS76818QPWPREP
TPS76825QPWPREP
TPS76833QPWPREP
TPS76850MPWPREP
TPS76850QPWPREP
V62/03632-01XE
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
HTSSOP
PWP
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-02XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-03XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-04XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-08XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-09XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-10XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
V62/03632-11XE
2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-Dec-2008
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS76801-EP, TPS76815-EP, TPS76818-EP, TPS76825-EP, TPS76833-EP, TPS76850-EP :
Catalog: TPS76801, TPS76815, TPS76818, TPS76825, TPS76833, TPS76850
Automotive: TPS76801-Q1, TPS76815-Q1, TPS76818-Q1, TPS76825-Q1, TPS76833-Q1, TPS76850-Q1
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TPS76801MPWPREP HTSSOP PWP
TPS76801QPWPREP HTSSOP PWP
TPS76815QPWPREP HTSSOP PWP
TPS76818QPWPREP HTSSOP PWP
TPS76825QPWPREP HTSSOP PWP
TPS76833QPWPREP HTSSOP PWP
TPS76850QPWPREP HTSSOP PWP
20
20
20
20
20
20
20
2000
2000
2000
2000
2000
2000
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
16.4
16.4
16.4
6.95
6.95
6.95
6.95
6.95
6.95
6.95
7.1
7.1
7.1
7.1
7.1
7.1
7.1
1.6
1.6
1.6
1.6
1.6
1.6
1.6
8.0
8.0
8.0
8.0
8.0
8.0
8.0
16.0
16.0
16.0
16.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Dec-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS76801MPWPREP
TPS76801QPWPREP
TPS76815QPWPREP
TPS76818QPWPREP
TPS76825QPWPREP
TPS76833QPWPREP
TPS76850QPWPREP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
PWP
PWP
PWP
PWP
20
20
20
20
20
20
20
2000
2000
2000
2000
2000
2000
2000
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
33.0
33.0
33.0
33.0
33.0
33.0
33.0
Pack Materials-Page 2
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Copyright © 2008, Texas Instruments Incorporated
TPS76828-EP 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
TPS76828-Q1 | TI | FAST TRANSIENT RESPONSE, 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828Q | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QD | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QDG4 | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QDR | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QDRG4 | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QPWP | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QPWPG4 | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QPWPR | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 | |
TPS76828QPWPREP | TI | FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS | 获取价格 |
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