TPS77818PWPR [TI]
FAST-TRANSIENT-RESPONSE 750mA LOW-DROPOUT LINEAR REGULATORS; 快速瞬态响应750毫安低压差线性稳压器
| 型号： | TPS77818PWPR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FAST-TRANSIENT-RESPONSE 750mA LOW-DROPOUT LINEAR REGULATORS |
| 文件： | 总26页 (文件大小：830K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
PWP PACKAGE
(TOP VIEW)
D
Open Drain Power-On Reset With 200 ms
Delay (TPS777xx)
D
D
D
D
D
D
D
Open Drain Power Good (TPS778xx)
750-mA Low-Dropout Voltage Regulator
GND/HSINK
GND/HSINK
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
NC
NC
RESET/PG
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed
Output and Adjustable Versions
Dropout Voltage to 260 mV (Typ) at 750 mA
(TPS77x33)
NC
GND/HSINK
GND/HSINK
Ultralow 85 mA Typical Quiescent Current
Fast Transient Response
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
NC − No internal connection
D
D
8-Pin SOIC and 20-Pin TSSOP PowerPAD
(PWP) Package
D PACKAGE
(TOP VIEW)
Thermal Shutdown Protection
GND
EN
IN
RESET/PG
1
2
3
4
8
7
6
5
description
FB/NC
OUT
TPS777xx and TPS778xx are designed to have a
IN
OUT
fast transient response and be stable with a 10 µF
low ESR capacitor. This combination provides
high performance at a reasonable cost.
TPS77x33
DROPOUT VOLTAGE
vs
TPS77x33
FREE-AIR TEMPERATURE
LOAD TRANSIENT RESPONSE
3
2
1
0
10
10
10
10
C
= 2x47 µF
o
ESR = 1/2x100 mΩ
= 3.3 V
50
0
V
O
I
= 750 mA
O
V = 4.3 V
I
−50
1000
500
0
I
O
= 10 mA
−1
10
10
I
= 0
O
C
= 10 µF
o
−2
−60 −40 −20
T
0
20 40 60 80 100 120 140
0
20 40 60 80 100 120 140 160 180 200
− Free-Air Temperature − °C
t − Time − µs
A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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ꢤ ꢠꢞ ꢟꢠ ꢡ ꢙ ꢍ ꢠ ꢣ ꢧꢦ ꢤ ꢌ ꢟꢌ ꢤ ꢢ ꢍ ꢌꢠ ꢞꢣ ꢧ ꢦꢡ ꢍꢎ ꢦ ꢍꢦ ꢡ ꢙꢣ ꢠꢟ ꢀꢦꢬ ꢢ ꢣ ꢘꢞꢣ ꢍꢡ ꢥꢙ ꢦꢞꢍ ꢣ ꢣꢍ ꢢꢞ ꢪꢢꢡ ꢪ ꢋ ꢢꢡ ꢡ ꢢ ꢞꢍꢭꢫ
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Copyright 1999 − 2004, Texas Instruments Incorporated
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 260 mV at an output
current of 750 mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass
element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over
the full range of output current, 0 mA to 750 mA). These two key specifications yield a significant improvement in operating
life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable)
shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.
The RESET output of the TPS777xx initiates a reset in microcomputer and microprocessor systems in the event of an
undervoltage condition. An internal comparator in the TPS777xx monitors the output voltage of the regulator to detect an
undervoltage condition on the regulated output voltage.
Power good (PG) of the TPS778xx is an active high output, which can be used to implement a power-on reset or a
low-battery indicator.
The TPS777xx and TPS778xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable
version (programmable over the range of 1.5 V to 5.5 V for the TPS77701 option and 1.2 V to 5.5 V for the TPS77801 option).
Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS777xx and
TPS778xx families are available in 8-pin SOIC and 20-pin PWP packages.
AVAILABLE OPTIONS
OUTPUT
VOLTAGE
(V)
PACKAGED DEVICES
T
J
TSSOP
(PWP)
SOIC
(D)
TYP
3.3
2.5
1.8
1.5
TPS77733PWP TPS77833PWP
TPS77725PWP TPS77825PWP
TPS77718PWP TPS77818PWP
TPS77715PWP TPS77815PWP
TPS77733D
TPS77833D
TPS77825D
TPS77818D
TPS77815D
TPS77725D
TPS77718D
TPS77715D
−40°C to 125°C
Adjustable
1.5 V to 5.5 V
TPS77701PWP
—
—
TPS77701D
—
—
Adjustable
1.2 V to 5.5 V
TPS77801PWP
TPS77801D
The TPS77x01 is programmable using an external resistor divider (see application information). The D and PWP
packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS77701DR).
6
7
16
RESET/
PG
V
I
IN
IN
RESET/PG
14
13
OUT
OUT
V
O
5
0.1 µF
EN
(1)
C
o
+
10 µF
GND
3
(1)
See application information section for capacitor selection details.
Figure 1. Typical Application Configuration for Fixed Output Options
2
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
functional block diagram—adjustable version
IN
EN
PG or RESET
OUT
_
+
+
_
200 ms Delay
(for RESET Option)
R1
V
ref
= 1.1834 V
FB/NC
R2
GND
External to the device
functional block diagram—fixed-voltage version
IN
EN
PG or RESET
_
+
OUT
+
_
200 ms Delay
(for RESET Option)
R1
V
ref
= 1.1834 V
R2
GND
3
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
Terminal Functions
SOIC Package (TPS777xx)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
2
EN
I
I
Enable input
FB/NC
GND
IN
7
Feedback input voltage for adjustable device (no connect for fixed options)
1
Regulator ground
Input voltage
3, 4
5, 6
8
I
OUT
O
O
Regulated output voltage
RESET output
RESET
TSSOP Package (TPS777xx)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
5
EN
I
I
Enable input
FB/NC
15
3
Feedback input voltage for adjustable device (no connect for fixed options)
GND
Regulator ground
Ground/heatsink
GND/HSINK
1, 2, 9, 10, 11,
12, 19, 20
IN
6, 7
4, 8, 17, 18
13, 14
I
Input
NC
No connect
OUT
RESET
O
O
Regulated output voltage
RESET output
16
SOIC Package (TPS778xx)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
2
EN
I
I
Enable input
FB/NC
GND
IN
7
Feedback input voltage for adjustable device (no connect for fixed options)
1
Regulator ground
Input voltage
3, 4
5, 6
8
I
OUT
PG
O
O
Regulated output voltage
PG output
TSSOP Package (TPS778xx)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
5
EN
I
I
Enable input
FB/NC
15
3
Feedback input voltage for adjustable device (no connect for fixed options)
GND
Regulator ground
Ground/heatsink
GND/HSINK
1, 2, 9, 10, 11,
12, 19, 20
IN
6, 7
4, 8, 17, 18
13, 14
I
Input
NC
OUT
PG
No connect
O
O
Regulated output voltage
PG output
16
4
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TPS777xx RESET timing diagram
V
I
(1)
V
res
V
res
t
V
O
(2)
V
IT+
(2)
V
IT+
Threshold
Voltage
Less than 5% of the
output voltage
(2)
(2)
V
IT−
V
IT−
t
RESET
Output
200 ms
Delay
200 ms
Delay
Output
Undefined
Output
Undefined
t
(1)
V
is the minimum input voltage for a valid RESET. The symbol V is not currently listed within EIA or JEDEC standards for semiconductor
res
res
symbology.
(2)
V
IT
−Trip voltage is typically 5% lower than the output voltage (95%V ) V
IT−
to V is the hysteresis voltage.
IT+
O
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
(1)
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range(2), V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 13.5 V
I
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 16.5 V
Maximum RESET voltage (TPS777xx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Maximum PG voltage (TPS778xx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Output voltage, V (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating tables
Operating junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 − FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
0
568 mW
5.68 mW/°C
9.04 mW/°C
312 mW
497 mW
227 mW
361 mW
D
250
904 mW
DISSIPATION RATING TABLE 2 − FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
0
2.9 W
23.5 mW/°C
34.6 mW/°C
23.8 mW/°C
57.9 mW/°C
1.9 W
2.8 W
1.9 W
4.6 W
1.5 W
2.2 W
1.5 W
3.8 W
§
PWP
PWP
300
0
4.3 W
3 W
¶
300
7.2 W
(1)
(2)
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5 in × 5 in PCB, 1 oz.
copper, 2 in × 2 in coverage (4 in ).
2
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5 in × 2 in PCB, 1 oz.
2
2
copper with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in ) and layers 3 and 6 at 100% coverage (6 in ). For more
information, refer to TI technical brief SLMA002.
recommended operating conditions
MIN
2.7
MAX
10
UNIT
(1)
Input voltage, V
V
I
TPS77701
TPS77801
1.5
5.5
Output voltage range, V
V
O
1.2
5.5
Operating junction temperature, T
−40
125
°C
J
(1)
Minimum V = V
IN OUT
+ V
DO
or 2.7V, whichever is greater.
6
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
electrical characteristics over recommended operating temperature range (TJ = −40°C to 125°C),
V = V
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted)
I
O(typ)
O
o
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.5 V ≤ V ≤ 5.5 V, T = 25°C
V
O
J
O
TPS77701
TPS77801
TPS77x15
TPS77x18
TPS77x25
TPS77x33
1.5 V ≤ V ≤ 5.5 V,
0.98V
1.02V
O
O
O
1.2 V ≤ V ≤ 5.5 V,
T = 25°C
J
V
O
O
1.2 V ≤ V ≤ 5.5 V,
0.98V
1.02V
O
O
O
T = 25°C,
J
2.7 V < V < 10 V
IN
1.5
1.8
2.5
3.3
85
T = −40°C to 125°C, 2.7 V < V < 10 V
J IN
1.470
1.764
2.450
3.234
1.530
1.836
2.550
3.366
125
Output voltage (10 µA to 750 mA load)
V
T = 25°C,
J
2.8 V < V < 10 V
IN
T = −40°C to 125°C, 2.8 V < V < 10 V
J IN
T = 25°C,
J
3.5 V < V < 10 V
IN
T = −40°C to 125°C, 3.5 V < V < 10 V
J IN
T = 25°C,
J
4.3 V < V < 10 V
IN
T = −40°C to 125°C, 4.3 V < V < 10 V
J IN
10 µA < I < 750 mA, T = 25°C
O
J
Quiescent current (GND current)
µA
I
O
= 750 mA
Output voltage line regulation (∆V /V
V
O
+ 1 V < V ≤ 10 V, T = 25°C
0.01
3
%/V
mV
O
O
I
J
)
Load regulation
BW = 200 Hz to 100 kHz, C = 10 µF,
o
Output noise voltage (TPS77x18)
54
µVrms
T = 25°C, I = 750 µA
J
C
Output current limit
V
O
= 0 V
1.2
1.7
2
A
Thermal shutdown junction temperature
Standby current
150
°C
EN = V
EN = V
T = 25°C,
J
I,
1
µA
µA
2.7 V < V < 10 V
I
I,
10
2.7 V < V < 10 V
I
FB input current
TPS77x01
FB = 1.5 V
2
nA
V
High level enable input voltage
Low level enable input voltage
1.7
92
0.9
V
f = 1 KHz,
T = 25°C
J
C
= 10 µF,
o
Power supply ripple rejection
60
dB
V
Minimum input voltage for valid RESET
Trip threshold voltage
Hysteresis voltage
I
= 300 µA
1.1
O(RESET)
V
O
decreasing
98
%V
%V
V
O
Measured at V
0.5
Reset
O
O
(TPS777xx)
Output low voltage
V = 2.7 V,
I
I
= 1 mA
0.15
0.4
1
O(RESET)
Leakage current
V
= 5 V
µA
(RESET)
RESET time-out delay
200
ms
7
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
electrical characteristics over recommended operating temperature range (TJ = −40°C to 125°C),
V = V
I
+ 1 V, I = 1 mA, EN = 0 V, C = 10 µF (unless otherwise noted) (continued)
O(typ)
O
o
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Minimum input voltage for valid PG
Trip threshold voltage
Hysteresis voltage
I
= 300 µA
1.1
V
O(PG)
decreasing
V
92
98
%V
%V
V
O
O
PG
(TPS778xx)
Measured at V
0.5
O
O
Output low voltage
V = 2.7 V,
I
= 1 mA
0.15
0.4
1
I
O(PG)
Leakage current
V
= 5 V
µA
(PG)
EN = 0 V
EN = V
−1
−1
0
260
260
1
Input current (EN)
Dropout voltage (1)
µA
1
I
I
O
I
O
I
O
I
O
= 750 mA,
= 750 mA,
= 750 mA,
= 750 mA,
T = 25°C
J
TPS77733
TPS77833
427
427
mV
T = 25°C
J
(1)
IN voltage equals V (typ) − 100 mV; TPS77x01 output voltage set to 3.3 V nominal with external resistor divider. TPS77x15, TPS77x18, and
TPS77x25 dropout voltage limited by input voltage range limitations (i.e., TPS77x33 input voltage needs to drop to 3.2 V for purpose of this
test).
O
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Output current
vs Free-air temperature
vs Free-air temperature
vs Frequency
2, 3, 4
5, 6, 7
8
V
Output voltage
O
Ground current
Power supply ripple rejection
Output spectral noise density
Output impedance
9
vs Frequency
10
Z
o
vs Frequency
11
vs Input voltage
12
V
DO
Dropout voltage
vs Free-air temperature
vs Output voltage
13
Input voltage (min)
14
Line transient response
Load transient response
Output voltage
15, 17
16, 18
19
V
O
vs Time
Equivalent series resistance (ESR)
vs Output current
21 − 24
8
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
TPS77x33
TPS77x15
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
1.4985
3.2835
V = 2.7 V
T = 25°C
A
V = 4.3 V
I
I
T
= 25°C
A
1.4980
1.4975
1.4970
1.4965
1.4960
3.2830
3.2825
3.2820
3.2815
3.2810
1.4955
1.4950
3.2805
3.2800
0
0.125
0.25 0.375
0.5
0.675
0.75
0
0.125
0.25 0.375
O
0.5
0.675
0.75
I
− Output Current − A
I
− Output Current − A
O
Figure 2
Figure 3
TPS77x25
TPS77x33
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
2.4960
2.4955
2.4950
2.4945
3.32
3.31
V = 4.3 V
V = 3.5 V
I
I
T
A
= 25°C
3.30
3.29
3.28
3.27
3.26
3.25
I
O
= 750 mA
2.4940
2.4935
2.4930
I
O
= 1 mA
2.4925
2.4920
0
0.125
0.25 0.375
0.5
0.675
0.75
−60 −40 −20
0
20 40 60 80 100 120 140
I
O
− Output Current − A
T
A
− Free-Air Temperature − °C
Figure 5
Figure 4
9
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
TPS77x15
OUTPUT VOLTAGE
vs
TPS77x25
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1.515
2.515
2.510
2.505
2.500
2.495
2.490
V = 3.5 V
I
V = 2.7 V
I
1.510
1.505
1.500
1.495
1.490
1.485
I
O
= 750 mA
I
O
= 750 mA
I
= 1 mA
O
I
O
= 1 mA
2.485
2.480
−60 −40 −20
0
20 40 60 80 100 120 140
−60 −40 −20
0
20
40
60
80 100 120
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 6
Figure 7
TPS77xxx
GROUND CURRENT
vs
TPS77x33
POWER SUPPLY RIPPLE REJECTION
vs
FREE-AIR TEMPERATURE
FREQUENCY
100
95
90
85
80
75
90
80
70
V = 4.3 V
I
C
T
A
= 10 µF
= 25°C
o
60
50
40
30
20
I
= 500 mA
= 750 mA
O
I
= 1 mA
O
I
O
10
0
−10
−60 −40 −20
0
20 40 60 80 100 120 140
10
100
1k
10k
100k
1M
T
A
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 9
Figure 8
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
TPS77x33
TPS77x33
OUTPUT IMPEDANCE
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
FREQUENCY
−5
−6
10
0
−1
−2
V = 4.3 V
I
V = 4.3 V
I
C
T
A
= 10 µF
= 25°C
o
C
T
A
= 10 µF
= 25°C
o
I
O
= 1 mA
I
O
= 7 mA
10
10
I
O
= 750 mA
−7
−8
10
I
O
= 750 mA
10
10
2
3
10
4
10
5
10
10
1
2
10
3
10
4
10
5
10
6
10
10
f − Frequency − Hz
f − Frequency − kHz
Figure 10
Figure 11
TPS77x33
DROPOUT VOLTAGE
vs
TPS77x01
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
FREE-AIR TEMPERATURE
3
2
1
0
10
10
10
10
600
500
400
300
200
100
0
I
= 750 mA
O
I
= 750 mA
O
T
= 125°C
A
T
= 25°C
A
I
O
= 10 mA
T
A
= −40°C
−1
10
10
I
= 0
O
C
= 10 µF
o
−2
−60 −40 −20
0
20 40 60 80 100 120 140
2.5
3
3.5
4
4.5
5
V − Input Voltage − V
I
T
A
− Free-Air Temperature − °C
Figure 13
Figure 12
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
INPUT VOLTAGE (MIN)
TPS77x15
vs
OUTPUT VOLTAGE
LINE TRANSIENT RESPONSE
4
I
O
= 0.75 A
3.7
2.7
T
= 25°C
A
T
A
= 125°C
3
T
A
= −40°C
10
2.7
0
−10
C
T
A
= 10 µF
= 25°C
o
2
1.5 1.75
2
2.25 2.5 2.75
3
3.25 3.5
0
20 40 60 80 100 120 140 160 180 200
V
O
− Output Voltage − V
t − Time − µs
Figure 14
Figure 15
TPS77x15
TPS77x33
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
C
= 2x47 µF
o
C
T
A
= 10 µF
= 25°C
o
ESR = 1/2x100 mΩ
= 1.5 V
50
0
V
O
V = 2.7 V
I
5.3
−50
1000
500
4.3
10
0
0
−10
0
20 40 60 80 100 120 140 160 180 200
0
20 40 60 80 100 120 140 160 180 200
t − Time − µs
t − Time − µs
Figure 17
Figure 16
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
TPS77x33
OUTPUT VOLTAGE
vs
TPS77x33
LOAD TRANSIENT RESPONSE
TIME (AT STARTUP)
4
C
= 2x47 µF
o
ESR = 1/2x100 mΩ
= 3.3 V
C
I
T
A
= 10 µF
= 750 mA
= 25°C
o
O
50
0
V
O
3
2
1
V = 4.3 V
I
−50
1000
500
0
0
0
0
20 40 60 80 100 120 140 160 180 200
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
t − Time − ms
1
t − Time − µs
Figure 18
Figure 19
To Load
IN
V
I
OUT
+
R
L
C
o
R
EN
GND
ESR
Figure 20. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)
13
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
(1)
EQUIVALENT SERIES RESISTANCE
(1)
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
1
1
V
C
= 3.3 V
= 4.7 µF
O
o
V
= 3.3 V
O
C
= 4.7 µF
o
Region of Stability
Region of Stability
V = 4.3 V
V = 4.3 V
I
A
I
J
T
= 25°C
T
= 125°C
0.1
0.01
0.1
0.01
Region of Instability
Region of Instability
0
125
250
375
500
625
750
0
125
250
375
500
625
750
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 21
Figure 22
TYPICAL REGION OF STABILITY
TYPICAL REGION OF STABILITY
(1)
EQUIVALENT SERIES RESISTANCE
(1)
EQUIVALENT SERIES RESISTANCE
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
10
10
Region of Instability
Region of Instability
1
1
V
C
= 3.3 V
= 22 µF
O
o
V
= 3.3 V
O
Region of Stability
C
= 22 µF
o
V = 4.3 V
Region of Stability
I
A
V = 4.3 V
I
J
T
= 25°C
T
= 125°C
0.1
0.01
0.1
0.01
Region of Instability
Region of Instability
0
125
I
250
375
500
625
750
0
125
250
375
500
625
750
− Output Current − mA
O
I
O
− Output Current − mA
Figure 23
Figure 24
(1)
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to C .
o
14
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
APPLICATION INFORMATION
The TPS777xx and TPS778xx families include four fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, and 3.3 V), and an
adjustable regulator, the TPS77x01 (adjustable from 1.5 V to 5.5 V for TPS77701 option and 1.2 V to 5.5 V for TPS77801
option).
device operation
The TPS777xx and TPS778xx feature very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current
through the regulator (IB = IC/β). The TPS777xx and TPS778xx use a PMOS transistor to pass current; because the gate
of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The
resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to large start-up currents.
Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when
the voltage decays below the minimum required for regulation. The TPS777xx and TPS778xx quiescent currents remain
low even when the regulator drops out, eliminating both problems.
The TPS777xx and TPS778xx families also feature a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown feature is not
used, EN should be tied to ground.
minimum load requirements
The TPS777xx and TPS778xx families are stable even at zero load; no minimum load is required for operation.
FB—pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output voltage is
sensed through a resistor divider network to close the loop as it is shown in Figure 26. Normally, this connection should
be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point.
Internally, FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator
output. Routing the FB connection to minimize/avoid noise pickup is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves load transient
response and noise rejection if the TPS777xx or TPS778xx are located more than a few inches from the power supply. A
higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise
times are anticipated.
Like all low dropout regulators, the TPS777xx and TPS778xx require an output capacitor connected between OUT and
GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent
series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable, provided the ESR
is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable,
provided they meet the requirements described previously.
15
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ꢀ
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ꢄ
ꢖ
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ꢜ
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ꢐ
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ꢏ
ꢓ
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
APPLICATION INFORMATION
external capacitor requirements (continued)
6
7
16
RESET/PG
RESET/
PG
V
I
IN
IN
250 kΩ
14
13
V
OUT
OUT
O
C1
0.1 µF
5
EN
C
+
o
10 µF
GND
3
Figure 25. Typical Application Circuit (Fixed Versions)
programming the TPS77x01 adjustable LDO regulator
The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as shown in
Figure 26. The output voltage is calculated using:
R1
R2
ǒ1 )
ref
Ǔ
(1)
V
+ V
O
Where:
ref = 1.1834 V typ (the internal reference voltage)
V
Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can be used but offer
no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the
output voltage error. The recommended design procedure is to choose R2 = 110 kΩ to set the divider current at
approximately 10 µA and then calculate R1 using:
V
O
R1 +
ǒ
* 1
Ǔ
R2
(2)
V
ref
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS77x01
OUTPUT
VOLTAGE
R1
121
R2
110
UNIT
RESET/
Reset or PG Output
250 kΩ
V
I
IN
PG
0.1 µF
2.5 V
3.3 V
kΩ
kΩ
kΩ
kΩ
≥ 1.7 V
196
226
332
110
110
110
EN
OUT
V
O
3.6 V
≤ 0.9 V
R1
C
4.75 V
o
FB / NC
GND
R2
Figure 26. TPS77x01 Adjustable LDO Regulator Programming
16
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
APPLICATION INFORMATION
reset indicator
The TPS777xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator
monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET
output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left
floating. RESET can be used to drive power-on reset circuitry or as a low-battery indicator. RESET does not assert itself
when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative
to its nominal regulated value (refer to timing diagram for start-up sequence).
power-good indicator
The TPS778xx features a power-good (PG) output that can be used to monitor the status of the regulator. The internal
comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value,
the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can
be left floating. PG can be used to drive power-on reset circuitry or used as a low-battery indicator.
regulator protection
The TPS777xx and TPS778xx PMOS-pass transistors have a built-in back diode that conducts reverse currents when the
input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input
and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate.
The TPS777xx and TPS778xx also feature internal current limiting and thermal protection. During normal operation, the
TPS777xx and TPS778xx limit output current to approximately 1.7 A. When current limiting engages, the output voltage
scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds
150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation
resumes.
17
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SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004
APPLICATION INFORMATION
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be
restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle
in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable
dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max)
The maximum-power-dissipation limit is determined using the following equation:
T max * T
.
J
A
P
+
D(max)
R
qJA
Where:
T max is the maximum allowable junction temperature.
J
R
is the thermal resistance junction-to-ambient for the package, and is calculated as
θJA
1
from the dissipation rating tables.
derating factor
T is the ambient temperature.
A
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
D
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal
protection circuit.
18
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
TPS77701D
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
SOIC
SOIC
D
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
77701
TPS77701DG4
TPS77701DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
75
2500
2500
70
Green (RoHS
& no Sb/Br)
77701
SOIC
8
Green (RoHS
& no Sb/Br)
77701
TPS77701DRG4
TPS77701PWP
TPS77701PWPG4
TPS77701PWPR
TPS77701PWPRG4
TPS77715D
SOIC
D
8
Green (RoHS
& no Sb/Br)
77701
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
20
20
20
20
8
Green (RoHS
& no Sb/Br)
PT77701
PT77701
PT77701
PT77701
77715
70
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS77715DG4
TPS77715DR
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77715
SOIC
D
8
2500
2500
70
Green (RoHS
& no Sb/Br)
77715
TPS77715DRG4
TPS77715PWP
TPS77715PWPG4
TPS77718D
SOIC
D
8
Green (RoHS
& no Sb/Br)
77715
HTSSOP
HTSSOP
SOIC
PWP
PWP
D
20
20
8
Green (RoHS
& no Sb/Br)
PT77715
PT77715
77718
70
Green (RoHS
& no Sb/Br)
75
Green (RoHS
& no Sb/Br)
TPS77718DG4
TPS77718DR
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77718
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
77718
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TPS77718DRG4
TPS77718PWP
TPS77718PWPG4
TPS77718PWPR
TPS77718PWPRG4
TPS77725D
ACTIVE
SOIC
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
D
8
20
20
20
20
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
77718
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PWP
PWP
PWP
PWP
D
70
70
Green (RoHS
& no Sb/Br)
PT77718
PT77718
PT77718
PT77718
77725
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS77725DG4
TPS77725PWP
TPS77725PWPG4
TPS77725PWPR
TPS77725PWPRG4
TPS77733D
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77725
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
20
20
20
20
8
70
Green (RoHS
& no Sb/Br)
PT77725
PT77725
PT77725
PT77725
77733
70
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS77733DG4
TPS77733DR
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77733
SOIC
D
8
2500
2500
70
Green (RoHS
& no Sb/Br)
77733
TPS77733DRG4
TPS77733PWP
TPS77733PWPG4
TPS77733PWPR
SOIC
D
8
Green (RoHS
& no Sb/Br)
77733
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
20
20
20
Green (RoHS
& no Sb/Br)
PT77733
PT77733
PT77733
70
Green (RoHS
& no Sb/Br)
2000
Green (RoHS
& no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TPS77733PWPRG4
TPS77801D
ACTIVE
HTSSOP
SOIC
PWP
20
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
PT77733
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
75
75
Green (RoHS
& no Sb/Br)
77801
TPS77801DG4
TPS77801DR
SOIC
8
Green (RoHS
& no Sb/Br)
77801
SOIC
D
8
2500
2500
70
Green (RoHS
& no Sb/Br)
77801
TPS77801DRG4
TPS77801PWP
TPS77801PWPG4
TPS77801PWPR
TPS77801PWPRG4
TPS77815D
SOIC
D
8
Green (RoHS
& no Sb/Br)
77801
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
20
20
20
20
8
Green (RoHS
& no Sb/Br)
PT77801
PT77801
PT77801
PT77801
77815
70
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS77815DG4
TPS77815DR
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77815
SOIC
D
8
2500
2500
70
Green (RoHS
& no Sb/Br)
77815
TPS77815DRG4
TPS77815PWP
TPS77815PWPG4
TPS77815PWPR
TPS77815PWPRG4
TPS77818D
SOIC
D
8
Green (RoHS
& no Sb/Br)
77815
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
20
20
20
20
8
Green (RoHS
& no Sb/Br)
PT77815
PT77815
PT77815
PT77815
77818
70
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TPS77818DG4
TPS77818PWP
TPS77818PWPG4
TPS77818PWPR
TPS77818PWPRG4
TPS77825D
ACTIVE
SOIC
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
D
8
20
20
20
20
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
77818
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PWP
PWP
PWP
PWP
D
70
70
Green (RoHS
& no Sb/Br)
PT77818
PT77818
PT77818
PT77818
77825
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS77825DG4
TPS77825DR
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77825
SOIC
D
8
2500
2500
70
Green (RoHS
& no Sb/Br)
77825
TPS77825DRG4
TPS77825PWP
TPS77825PWPG4
TPS77825PWPR
TPS77825PWPRG4
TPS77833D
SOIC
D
8
Green (RoHS
& no Sb/Br)
77825
HTSSOP
HTSSOP
HTSSOP
HTSSOP
SOIC
PWP
PWP
PWP
PWP
D
20
20
20
20
8
Green (RoHS
& no Sb/Br)
PT77825
PT77825
PT77825
PT77825
77833
70
Green (RoHS
& no Sb/Br)
2000
2000
75
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS77833DG4
TPS77833DR
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
77833
SOIC
D
8
2500
2500
70
Green (RoHS
& no Sb/Br)
77833
TPS77833DRG4
TPS77833PWP
SOIC
D
8
Green (RoHS
& no Sb/Br)
77833
HTSSOP
PWP
20
Green (RoHS
& no Sb/Br)
PT77833
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
TPS77833PWPG4
TPS77833PWPR
TPS77833PWPRG4
ACTIVE
HTSSOP
HTSSOP
HTSSOP
PWP
20
20
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
PT77833
ACTIVE
ACTIVE
PWP
PWP
2000
2000
Green (RoHS
& no Sb/Br)
-40 to 125
PT77833
PT77833
Green (RoHS
& no Sb/Br)
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS77701DR
TPS77715DR
SOIC
SOIC
SOIC
D
D
D
8
8
2500
2500
2500
2000
2000
2500
2000
2500
2000
2500
2000
2000
2500
2000
2500
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
16.4
16.4
12.4
16.4
12.4
16.4
12.4
16.4
16.4
12.4
16.4
12.4
16.4
6.4
6.4
5.2
5.2
5.2
7.1
7.1
5.2
7.1
5.2
7.1
5.2
7.1
7.1
5.2
7.1
5.2
7.1
2.1
2.1
2.1
1.6
1.6
2.1
1.6
2.1
1.6
2.1
1.6
1.6
2.1
1.6
2.1
1.6
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
16.0
16.0
12.0
16.0
12.0
16.0
12.0
16.0
16.0
12.0
16.0
12.0
16.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
TPS77718DR
8
6.4
TPS77718PWPR
TPS77725PWPR
TPS77733DR
HTSSOP PWP
HTSSOP PWP
20
20
8
6.95
6.95
6.4
SOIC
HTSSOP PWP
SOIC
HTSSOP PWP
SOIC
D
TPS77733PWPR
TPS77801DR
20
8
6.95
6.4
D
TPS77801PWPR
TPS77815DR
20
8
6.95
6.4
D
TPS77815PWPR
TPS77818PWPR
TPS77825DR
HTSSOP PWP
HTSSOP PWP
20
20
8
6.95
6.95
6.4
SOIC
HTSSOP PWP
SOIC
HTSSOP PWP
D
TPS77825PWPR
TPS77833DR
20
8
6.95
6.4
D
TPS77833PWPR
20
6.95
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS77701DR
TPS77715DR
SOIC
SOIC
D
D
8
8
2500
2500
2500
2000
2000
2500
2000
2500
2000
2500
2000
2000
2500
2000
2500
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
38.0
38.0
35.0
38.0
35.0
38.0
35.0
38.0
38.0
35.0
38.0
35.0
38.0
TPS77718DR
SOIC
D
8
TPS77718PWPR
TPS77725PWPR
TPS77733DR
HTSSOP
HTSSOP
SOIC
PWP
PWP
D
20
20
8
TPS77733PWPR
TPS77801DR
HTSSOP
SOIC
PWP
D
20
8
TPS77801PWPR
TPS77815DR
HTSSOP
SOIC
PWP
D
20
8
TPS77815PWPR
TPS77818PWPR
TPS77825DR
HTSSOP
HTSSOP
SOIC
PWP
PWP
D
20
20
8
TPS77825PWPR
TPS77833DR
HTSSOP
SOIC
PWP
D
20
8
TPS77833PWPR
HTSSOP
PWP
20
Pack Materials-Page 2
IMPORTANT NOTICE
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