TPS780330220DDCR_技术文档

TPS780 Series

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150mA, Low-Dropout Regulator, Ultralow-Power, I_Q500nA

with Pin-Selectable, Dual-Level Output Voltage

The V_SETpin allows the end user to switch between

1

FEATURES

two

voltage

levels

on-the-fly

through

a

2

•

Low I_Q: 500nA

microprocessor-compatible input. This LDO is

designed specifically for battery-powered applications

where dual-level voltages are needed. With ultralow

I_Q(500nA), microprocessors, memory cards, and

smoke detectors are ideal applications for this device.

•

150mA, Low-Dropout Regulator with

Pin-Selectable Dual Voltage Level Output

•

Low Dropout: 200mV at 150mA

3% Accuracy Over Load/Line/Temperature

The ultralow-power and selectable dual-level output

voltages allow designers to customize power

consumption for specific applications. Designers can

now shift to a lower voltage level in a battery-powered

design when the microprocessor is in sleep mode,

further reducing overall system power consumption.

The two voltage levels are preset at the factory

through a unique architecture using an EPROM. The

EPROM technique allows for numerous output

voltage options between V_SETlow (1.5V to 4.2V) and

V_SEThigh (2.0V to 3.0V) in the fixed output version

only. Consult with your local factory representative for

exact voltage options and ordering information;

minimum order quantities may apply.

Available in Dual-Level, Fixed Output Voltages

from 1.5V to 4.2V Using Innovative Factory

EPROM Programming

•

Available in an Adjustable Version from 1.22V

to 5.25V or a Dual-Level Output Version

V_SETPin Toggles Output Voltage Between Two

Factory-Programmed Voltage Levels

•

Stable with a 1.0µF Ceramic Capacitor

Thermal Shutdown and Overcurrent Protection

CMOS Logic Level-Compatible Enable Pin

Available in DDC (TSOT23-5) or DRV (2mm ×

2mm SON-6) Package Options

The TPS780 series are designed to be compatible

with the TI MSP430 and other similar products. The

enable pin is compatible with standard CMOS logic.

This LDO is stable with any output capacitor greater

than 1.0µF. Therefore, implementations of this device

require minimal board space because of miniaturized

packaging and a potentially small output capacitor.

The TPS780 series I_Q(500nA) also come with

thermal shutdown and current limit to protect the

device during fault conditions. All packages have an

operating temperature range of T_J= –40°C to

+125°C. For more cost-sensitive applications

requiring a dual-level voltage option and only on par

I_Q, consider the TPS781 series, with an I_Qof 1.0µA

and dynamic voltage scaling.

APPLICATIONS

•

TI MSP430 Attach Applications

Power Rails with Programming Mode

Dual Voltage Levels for Power-Saving Mode

Wireless Handsets, Smartphones, PDAs, MP3

Players, and Other Battery-Operated Handheld

Products

DESCRIPTION

The TPS780 family of low-dropout (LDO) regulators

offer the benefits of ultralow power (I_Q= 500nA),

miniaturized packaging (2×2 SON-6), and selectable

dual-level output voltage levels. An adjustable version

is also available, but does not have the capability to

shift voltage levels.

TPS780DDC

TSOT23-5

TPS780DRV

2mm x 2mm SON-6

(TOP VIEW)

IN

GND

EN

1

2

3

5

4

OUT

N/C

1

2

3

6

5

4

IN

Thermal

Pad

GND

EN

V_SET/FB

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS780 Series

SBVS083C–JANUARY 2007–REVISED MAY 2008 ....................................................................................................................................................... www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION⁽¹⁾⁽²⁾

PRODUCT

V_OUT

TPS780vvvxxxyyyz

VVV is the nominal output voltage for V_OUT(HIGH)and corresponds to V_SETpin low.

XXX is the nominal output voltage for V_OUT(LOW)and corresponds to V_SETpin high.

YYY is the package designator.

Z is the tape and reel quantity (R = 3000, T = 250).

Adjustable version⁽³⁾⁽⁴⁾

(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Additional output voltage combinations are available on a quick-turn basis using innovative, factory EPROM programming.

Minimum-order quantities apply; contact your sales representative for details and availability.

(3) To order the adjustable version, use TPS78001YYYZ.

(4) The device is either fixed voltage, dual-level V_OUT, or adjustable voltage only. Device design does not permit a fixed and adjustable

output simultaneously.

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

At T_J= –40°C to +125°C, unless otherwise noted. All voltages are with respect to GND.

PARAMETER

TPS780 Series

–0.3 to +6.0

–0.3 to V_IN+ 0.3⁽²⁾

UNIT

Input voltage range, V_IN

V

Enable and V_SETvoltage range, V_ENand V_VSET

Output voltage range, V_OUT

–0.3 to V_IN+ 0.3V

Maximum output current, I_OUT

Output short-circuit duration

Total continuous power dissipation, P_DISS

Internally limited

Indefinite

See the Dissipation Ratings table

Human body model (HBM)

ESD rating

2

kV

V

Charged device model (CDM)

500

Operating junction temperature range, T_J

Storage temperature range, T_STG

–40 to +125

–55 to +150

°C

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond

those specified is not implied.

(2) V_ENand V_VSETabsolute maximum rating are V_IN+ 0.3V or +6.0V, whichever is less.

DISSIPATION RATINGS

DERATING FACTOR

BOARD

High-K⁽¹⁾

PACKAGE

DRV

R_θJC

R_θJA

ABOVE T_A= +25°C

T_A< +25°C

1540mW

500mW

T_A= +70°C

845mW

T_A= +85°C

615mW

20°C/W

90°C/W

65°C/W

200°C/W

15.4mW/°C

DDC

5.0mW/°C

275mW

200mW

(1) The JEDEC high-K (2s2p) board used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power and ground

planes and 2-ounce copper traces on top and bottom of the board.

2

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ELECTRICAL CHARACTERISTICS

Over operating temperature range (T_J= –40°C to +125°C), V_IN= V_OUT(NOM)+ 0.5V or 2.2V, whichever is greater; I_OUT

100µA, V_VSET= V_EN= V_IN, C_OUT= 1.0µF, fixed or adjustable, unless otherwise noted. Typical values at T_J= +25°C.

=

TPS780 Series

PARAMETER

TEST CONDITIONS

MIN

2.2

–2

TYP

MAX

5.5

UNIT

V

V_IN

Input voltage range

Nominal

T_J= +25°C, V_SET= high/low

±1

+2

%

(1)

V_OUT

DC output accuracy

Internal reference⁽²⁾

(adjustable version only)

Output voltage range⁽³⁾⁽⁴⁾

(adjustable version only)

Over V_IN, I_OUT

temperature

,

V_OUT+ 0.5V ≤ V_IN≤ 5.5V,

0mA ≤ I_OUT≤ 150mA, V_SET= high/low

–3.0

±2.0

+3.0

%

V

V_FB

T_J= +25°C, V_IN= 4.0V, I_OUT= 75mA

V_IN= 5.5V, I_OUT= 100µA⁽²⁾

1.216

5.25

V_{OUT_RANGE}

V_FB

V

ΔV_OUT/ΔV_INLine regulation

V_OUT(NOM)+ 0.5V ≤ V_IN≤ 5.5V, I_OUT= 5mA

0mA ≤ I_OUT≤ 150mA

–1

–2

+1

+2

%

ΔV_OUT/ΔI_OUTLoad regulation

V_DO

V_N

Dropout voltage⁽⁵⁾

V_IN= 95% V_OUT(NOM), I_OUT= 150mA

250

mV

BW = 100Hz to 100kHz, V_IN= 2.2V,

V_OUT= 1.2V, I_OUT= 1mA

Output noise voltage

86

µV_RMS

V_SEThigh (output V_OUT(LOW)

selected), or EN high (enabled)

V_HI

1.2

V_IN

0.4

V

V_SETlow (output V_OUT(HIGH)

selected), or EN low (disabled)

V_LO

I_CL

0

Output current limit

V_OUT= 0.90 × V_OUT(NOM)

I_OUT= 0mA⁽⁶⁾

150

230

420

5

400

800

mA

nA

µA

I_GND

Ground pin current

I_OUT= 150mA

V

_EN≤ 0.4V, 2.2V ≤ V_IN< 5.5V,

I_SHDN

Shutdown current (I_GND

)

18

130

nA

T_J= –40°C to +100°C

V_EN= V_VSET= 5.5V

I_VSET

I_EN

V_SETpin current

EN pin current

FB pin current⁽⁷⁾

70

40

nA

I_FB

V_IN= 5.5V, V_OUT= 1.2V, I_OUT= 100µA

10

nA

(adjustable version only)

f = 10Hz

40

20

15

dB

V_IN= 4.3V,

V_OUT= 3.3V,

I_OUT= 150mA

PSRR

Power-supply rejection ratio

f = 100Hz

f = 1kHz

V_OUTtransition time (high-to-low)

V_OUT= 97% × V_OUT(HIGH)

V_{OUT_LOW}= 2.2V, V_OUT(HIGH)= 3.3V,

I_OUT= 10mA

t_TR(H→L)

t_TR(L→H)

t_STR

800

500

µs

V_OUTtransition time (low-to-high)

V_OUT= 97% × V_OUT(LOW)

V_{OUT_HIGH}= 3.3V, V_OUT(LOW)= 2.2V,

I_OUT= 10mA

C_OUT= 1.0µF, V_OUT= 10% V_OUT(NOM)to

V_OUT= 90% V_OUT(NOM)

Startup time⁽⁸⁾

I_OUT= 150mA, C_OUT= 1.0µF, V_OUT= 2.8V,

V_OUT= 90% V_OUT(NOM)to V_OUT= 10%

V_OUT(NOM)

t_SHDN

Shutdown time⁽⁹⁾

500⁽¹⁰⁾

µs

Shutdown, temperature increasing

Reset, temperature decreasing

+160

+140

°C

T_SD

T_J

Thermal shutdown temperature

Operating junction temperature

–40

+125

(1) The output voltage for V_SET= low/high is programmed at the factory.

(2) Adjustable version only.

(3) No V_SETpin on the adjustable version.

(4) No dynamic voltage scaling on the adjustable version.

(5) V_DOis not measured for devices with V_OUT(NOM)< 2.3V because minimum V_IN= 2.2V.

(6) I_GND= 800nA (max) up to +100°C.

(7) The TPS78001 FB pin is tied to V_OUT. Adjustable version only.

(8) Time from V_EN= 1.2V to V_OUT= 90% (V_OUT(NOM)).

(9) Time from V_EN= 0.4V to V_OUT= 10% (V_OUT(NOM)).

(10) See Shutdown in the Application Information section for more details.

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FUNCTIONAL BLOCK DIAGRAM

IN

OUT

Current

Limit

Thermal

Shutdown

EPROM

Bandgap

EN

Active

Pull-

Down

10kW

(1)

_SET/FB

V

LOGIC

GND

(1) Feedback pin (FB) for adjustable versions; V_SETfor fixed voltage versions.

PIN CONFIGURATIONS

TPS780DDC

TSOT23-5

TPS780DRV

2mm x 2mm SON-6

(TOP VIEW)

IN

GND

EN

1

2

3

5

4

OUT

N/C

1

2

3

6

5

4

IN

Thermal

GND

EN

(1)

Pad

V_SET/FB

(1) It is recommended that the SON package thermal pad be connected to ground.

Table 1. TERMINAL FUNCTIONS

TERMINAL

DRV

NAME

OUT

DDC

5

DESCRIPTION

Regulated output voltage pin. A small (1µF) ceramic capacitor is needed from this pin to

ground to assure stability. See the Input and Output Capacitor Requirements in the

Application Information section for more details.

1

2

3

N/C

—

4

Not connected.

Feedback pin (FB) for adjustable versions; V_SETfor fixed voltage versions. Driving the select

pin (V_SET) below 0.4V selects preset output voltage high. Driving the V_SETpin over 1.2V

selects preset output voltage low.

V_SET/FB

Driving the enable pin (EN) over 1.2V turns on the regulator. Driving this pin below 0.4V puts

the regulator into shutdown mode, reducing operating current to 18nA typical.

EN

4

5

3

2

GND

Ground pin.

Input pin. A small capacitor is needed from this pin to ground to assure stability. Typical input

capacitor = 1.0µF. Both input and output capacitor grounds should be tied back to the IC

ground with no significant impedance between them.

IN

6

1

Thermal pad Thermal pad

—

It is recommended that the SON package thermal pad be connected to ground.

4

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TYPICAL CHARACTERISTICS

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

LINE REGULATION

I_OUT= 5mA, V_OUT= 1.22V (typ)

TPS78001

LINE REGULATION

I_OUT= 5mA, V_VSET= 1.2V, V_OUT= 2.2V (typ)

TPS780330220

0.3

0.2

1.0

0.8

0.6

T_J= +25°C

T_J= -40°C

T_J= +85°C

0.4

0.1

T_J= +25°C

0.2

T_J= +125°C

0

-0.2

-0.4

-0.6

-0.8

-1.0

T_J= +125°C

-0.1

-0.2

-0.3

T_J= +85°C

T_J= -40°C

2.2

2.7

3.8

2.7

3.2

3.7

V_IN(V)

Figure 1.

4.2

4.7

5.2

5.7

5.6

2.7

3.8

0

3.2

3.7

4.2

4.7

5.2

5.7

V_IN(V)

Figure 2.

LINE REGULATION

I_OUT= 150mA, V_VSET= 1.2V, V_OUT= 2.2V (typ)

TPS780330220

I_OUT= 5mA, V_VSET= 0.4V, V_OUT= 3.3V (typ)

TPS780330220

3

2

1.0

0.8

T_J= -40°C

0.6

T_J= +25°C

0.4

1

0.2

T_J= +25°C

T_J= -40°C

0

-0.2

-0.4

-0.6

-0.8

-1.0

T_J= +85°C

-1

-2

-3

T_J= +85°C

3.2

3.7

4.2

4.7

5.2

4.0

4.2

4.4

4.6

4.8

5.0

5.2 5.4

5.6

V_IN(V)

Figure 3.

Figure 4.

LINE REGULATION

LOAD REGULATION

V_OUT= 3.3V

I_OUT= 150mA, V_VSET= 0.4V, V_OUT= 3.3V (typ)

TPS780330220

TPS78001

3

2

1.5

1.0

0.5

0

T_J= +125°C

1

T_J= -40°C

T_J= +25°C

0

-1

-2

-3

-0.5

-1.0

T_J= +85°C

T_J= +25°C

T_J= +85°C

T_J= -40°C

4.0

4.2

4.4

4.6

4.8

5.0

5.2 5.4

25

50

75

100

125

150

V_IN(V)

I_OUT(mA)

Figure 5.

Figure 6.

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TPS780 Series

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

LOAD REGULATION

V_VSET= 1.2V, V_IN= 2.7V, V_OUT= 2.2V

TPS780330220

LOAD REGULATION

V_VSET= 0.4V, V_IN= 3.8V, V_OUT= 3.3V

TPS780330220

3.0

2.5

3

2

2.0

T_J= -40°C

1.5

1

1.0

0.5

0

T_J= -40°C

0

-1

-2

-3

-0.5

-1.0

-1.5

-2.0

T_J= +25°C

T_J= +85°C

T_J= +25°C

T_J= +85°C

0

25

50

75

100

125

150

0

25

50

75

100

125

150

I_OUT(mA)

Figure 7.

Figure 8.

DROPOUT VOLTAGE vs OUTPUT CURRENT

V_OUT= 3.3V (typ), V_IN= 0.95 × V_OUT(typ)

TPS78001

DROPOUT VOLTAGE vs OUTPUT CURRENT

V_VSET= 0.4V, V_OUT= 3.3V (typ), V_IN= 0.95 × V_OUT(typ)

TPS780330220

200

180

160

140

120

100

80

250

T_J= +125°C

T_J= +85°C

200

150

100

50

T_J= +85°C

T_J= +125°C

60

40

T_J= -40°C

T_J= +25°C

T_J= -40°C

T_J= +25°C

20

0

25

50

75

100

125

150

0

25

50

75

100

125

150

I_OUT(mA)

Figure 9.

Figure 10.

DROPOUT VOLTAGE vs TEMPERATURE

V_OUT= 3.3V (typ), V_IN= 0.95 × V_OUT(typ)

TPS78001

DROPOUT VOLTAGE vs TEMPERATURE

V_VSET= 0.4V, V_OUT= 3.3V (typ), V_IN= 0.95 × V_OUT(typ)

TPS780330220

250

200

150

100

50

250

200

150

100

50

150mA

100mA

150mA

100mA

50mA

10mA

50mA

10mA

0

-40 -25 -10

5

20 35 50 65 80 95 110 125

-40 -25 -10

5

20 35 50 65 80 95 110 125

Temperature (°C)

Figure 11.

Figure 12.

6

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 50mA, V_OUT= 1.22V

TPS78001

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 150mA, V_OUT= 1.22V

TPS78001

6

5

4

3

2

1

0

8

7

6

5

4

3

2

1

0

T_J= +125°C

T_J= +85°C

T_J= +125°C

T_J= +85°C

T_J= +25°C

T_J= -40°C

T_J= +25°C

T_J= -40°C

2.2

2.7

3.2

3.7

V_IN(V)

Figure 13.

4.2

4.7

5.2

5.7

2.2

2.7

3.2

3.7

4.2

4.7

5.2

5.7

V_IN(V)

Figure 14.

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 0mA, V_VSET= 1.2V, V_OUT= 2.2V

TPS780330220

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 1mA, V_VSET= 1.2V, V_OUT= 2.2V

TPS780330220

1000

900

800

700

600

500

400

300

200

100

0

1000

900

800

700

600

500

400

300

200

100

0

T_J= +125°C

T_J= +85°C

T_J= +25°C

T_J= -40°C

T_J= +25°C

T_J= -40°C

2.7

3.2

3.7

4.2

4.7

5.2

5.7

2.7

3.2

3.7

4.2

4.7

5.2

5.7

V_IN(V)

Figure 15.

Figure 16.

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 50mA, V_VSET= 1.2V, V_OUT= 2.2V

TPS780330220

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 150mA, V_VSET= 1.2V, V_OUT= 2.2V

TPS780330220

6

5

4

3

2

1

0

12

11

10

9

T_J= +125°C

T_J= +85°C

T_J= +125°C

8

T_J= +85°C

7

6

5

4

T_J= +25°C

3

T_J= -40°C

T_J= +25°C

2

T_J= -40°C

1

0

2.7

3.2

3.7

4.2

4.7

5.2

5.7

2.7

3.2

3.7

4.2

4.7

5.2

5.7

V_IN(V)

Figure 17.

Figure 18.

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 0mA, V_VSET= 0.4V, V_OUT= 3.3V

TPS780330220

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 1mA, V_VSET= 0.4V, V_OUT= 3.3V

TPS780330220

1000

900

800

700

600

500

400

300

200

100

0

1000

900

800

700

600

500

400

300

200

100

0

T_J= +125°C

T_J= +85°C

T_J= +25°C

T_J= +85°C

T_J= +25°C

T_J= -40°C

3.8

4.0

4.2

4.4

4.6

V_IN(V)

Figure 19.

4.8

5.0

5.2 5.4

5.6

3.8

4.0

4.2

4.4

4.6

V_IN(V)

Figure 20.

4.8

5.0

5.2 5.4

5.6

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 50mA, V_VSET= 0.4V, V_OUT= 3.3V

TPS780330220

GROUND PIN CURRENT vs INPUT VOLTAGE

I_OUT= 150mA, V_VSET= 0.4V, V_OUT= 3.3V

TPS780330220

6

5

4

3

2

1

0

9

8

7

6

5

4

3

2

1

0

T_J= +125°C

T_J= +85°C

T_J= +125°C

T_J= +85°C

T_J= +25°C

T_J= -40°C

T_J= +25°C

T_J= -40°C

3.8

4.0

4.2

4.4

4.6

4.8

5.0

5.2 5.4

5.6

3.8

4.0

4.2

4.4

4.6

V_IN(V)

Figure 22.

4.8

5.0

5.2 5.4

5.6

V_IN(V)

Figure 21.

GROUND PIN CURRENT vs OUTPUT CURRENT

V_VSET= 1.2V, V_IN= 5.5V, V_OUT= 2.2V

TPS780330220

GROUND PIN CURRENT vs OUTPUT CURRENT

V_VSET= 0.4V, V_IN= 5.5V, V_OUT= 3.3V

TPS780330220

10

8

10

8

T_J= +125°C

T_J= +85°C

T_J= +125°C

T_J= +85°C

6

4

2

T_J= +25°C

T_J= -40°C

T_J= +25°C

0

25

50

75

100

125

150

0

25

50

75

100

125

150

I_OUT(mA)

Figure 23.

Figure 24.

8

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

SHUTDOWN CURRENT vs INPUT VOLTAGE

I_OUT= 0mA, V_VSET= 0.4V

TPS78001

CURRENT LIMIT vs INPUT VOLTAGE

V_OUT= 90% V_OUT(typ), V_OUT= 1.22V (typ)

TPS78001

60

50

40

30

20

10

0

280

270

260

250

240

230

220

210

200

T_J= -40°C

T_J= +25°C

T_J= +85°C

T_J= +25°C

T_J= -40°C

T_J= +85°C

2.2

2.7

3.2

3.7

V_IN(V)

Figure 25.

4.2

4.7

5.2

5.7

2.2

2.7

3.2

3.7

V_IN(V)

Figure 26.

4.2

4.7

5.2

5.7

CURRENT LIMIT vs INPUT VOLTAGE

V_VSET= 1.2V, V_OUT= 95% V_OUT(typ), V_OUT= 2.2V (typ)

TPS780330220

CURRENT LIMIT vs INPUT VOLTAGE

V_VSET= 0.4V, V_OUT= 95% V_OUT(typ), V_OUT= 3.3V (typ)

TPS780330220

300

290

280

270

260

250

240

230

220

210

200

290

280

270

260

250

240

230

220

210

200

T_J= -40°C

T_J= +25°C

T_J= +85°C

T_J= +125°C

T_J= +25°C

T_J= +85°C

T_J= +125°C

2.7

3.2

3.7

4.2

4.7

5.2

5.7

3.8

4.0

4.2

4.4

4.6

V_IN(V)

Figure 28.

4.8

5.0

5.2 5.4

5.6

V_IN(V)

Figure 27.

FEEDBACK PIN CURRENT vs TEMPERATURE

I_OUT= 0mA, V_OUT= 1.22V

TPS78001

V_SETPIN CURRENT vs INPUT VOLTAGE

I_OUT= 100µA, V_VSET= 1.2V, V_OUT= 2.2V

TPS780330220

1.0

0.8

0.6

0.4

0.2

0

5

4

3

2

1

0

T_J= +25°C

T_J= -40°C

T_J= +85°C

V_INmax

V_INmin

2.7

3.2

3.7

4.2

4.7

5.2

5.7

-40 -25 -10

5

20 35 50 65 80 95 110 125

V_IN(V)

Temperature (°C)

Figure 29.

Figure 30.

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

V_SETPIN CURRENT vs INPUT VOLTAGE

I_OUT= 100µA, V_VSET= 0.4V, V_OUT= 3.3V

TPS780330220

ENABLE PIN CURRENT vs INPUT VOLTAGE

I_OUT= 1mA, V_OUT= 1.22V

TPS78001

2.5

2.0

1.5

1.0

0.5

0

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

T_J= +125°C

T_J= -40°C

T_J= +85°C

T_J= +25°C

T_J= -40°C

T_J= +85°C

T_J= +25°C

-0.5

3.8

4.0

4.2

4.4

4.6

V_IN(V)

Figure 31.

4.8

5.0

5.2 5.4

5.6

2.2

2.7

3.2

3.7

4.2

4.7

5.2

5.7

V_IN(V)

Figure 32.

ENABLE PIN CURRENT vs INPUT VOLTAGE

I_OUT= 100µA, V_VSET= 1.2V, V_OUT= 2.2V

TPS780330220

ENABLE PIN CURRENT vs INPUT VOLTAGE

I_OUT= 100µA, V_VSET= 0.4V, V_OUT= 3.3V

TPS780330220

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

T_J= +85°C

T_J= -40°C

T_J= +25°C

T_J= -40°C

T_J= +85°C

T_J= +25°C

2.7

3.2

3.7

4.2

4.7

5.2

5.7

3.8

4.0

4.2 4.4

4.6

4.8

5.0

5.2

5.4

5.6

V_IN(V)

Figure 33.

Figure 34.

ENABLE PIN HYSTERESIS vs TEMPERATURE

I_OUT= 1mA, TPS78001

ENABLE PIN HYSTERESIS vs TEMPERATURE

I_OUT= 1mA, TPS780330220

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

V_ENOn

V_ENOff

-40 -25 -10

5

20 35 50 65 80 95 110 125

-40 -25 -10

5

20 35 50 65 80 95 110 125

Temperature (°C)

Figure 35.

Figure 36.

10

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

%ΔV_OUTvs TEMPERATURE

I_OUT= 1mA, V_IN= 3.8V, V_OUT= 3.3V

TPS78001

%ΔV_OUTvs TEMPERATURE

V_VSET= 1.2V, V_IN= 2.7V, V_OUT= 2.2V (typ)

TPS780330220

0.4

0.3

1

0

0.1mA

0.2

0.1

5mA

0

-0.1

-0.2

-0.3

-0.4

-1

-2

150mA

-40 -25 -10

5

20 35 50 65 80 95 110 125

-40 -25 -10

5

20 35 50 65 80 95 110 125

Temperature (°C)

Figure 37.

Figure 38.

%ΔV_OUTvs TEMPERATURE

V_VSET= 0.4V, V_IN= 3.8V, V_OUT= 3.3V (typ)

TPS780330220

OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY

C_IN= 1µF, C_OUT= 2.2µF, V_VSET= 1.2V, V_IN= 2.7V

TPS780330220

3

2

100

10

1

150mA

1

109mV_RMS

0.1mA

5mA

0

0.1

-1

-2

-3

50mA

150mA

109mV_RMS

0.01

0.001

1mA

108mV_RMS

-40 -25 -10

5

20 35 50 65 80 95 110 125

10

100

1k

10k

100k

Temperature (°C)

Frequency (Hz)

Figure 39.

Figure 40.

RIPPLE REJECTION vs FREQUENCY

V_IN= 2.7V, V_OUT= 1.2V, C_OUT= 2.2µF

TPS78001

INPUT VOLTAGE RAMP vs OUTPUT VOLTAGE

TPS780330220

80

70

60

50

40

30

20

10

0

V_IN= 0.0V to 5.0V

V_OUT= 3.3V

V_IN

1mA

V_OUT

I_OUT= 150mA

C_OUT= 10mF

Enable

50mA

Load Current

0V

150mA

Time (20ms/div)

10

100

1k

10k

100k

1M

10M

Frequency (Hz)

Figure 41.

Figure 42.

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

OUTPUT VOLTAGE vs ENABLE (SLOW RAMP)

TPS780330220

INPUT VOLTAGE vs DELAY TO OUTPUT

TPS780330220

V_IN

V_SET

Enable

V_OUT

Load Current

V_IN

Load Current

V_IN= 5.5V

V_OUT= 3.3V

I_OUT= 150mA

C_OUT= 10mF

V_IN= 0.0V to 5.5V

V_OUT= 2.2V

V_OUT

0A

0V

I_OUT= 100mA

0V

C_OUT= 10mF

Time (20ms/div)

Time (1ms/div)

Figure 43.

Figure 44.

LINE TRANSIENT RESPONSE

TPS780330220

LINE TRANSIENT RESPONSE

TPS780330220

V_IN

1V/div

V_OUT

V_IN= 4.0V to 4.5V

V_OUT= 2.2V

V_OUT= 3.3V

I_OUT= 150mA

Slew Rate = 1V/ms

I_OUT= 150mA

Slew Rate = 1V/ms

Time (200ms/div)

Figure 45.

Figure 46.

LOAD TRANSIENT RESPONSE

TPS780330220

LOAD TRANSIENT RESPONSE

TPS780330220

Enable

V_IN

V_OUT

V_IN

V_OUT

V_IN= 5.5V

V_OUT= 3.3V

I_OUT= 0mA to 10mA

Load

C_OUT= 10mF

Current

V_IN= 5.5V

Current

V_OUT= 3.3V

I_OUT= 0mA to 60mA

C_OUT= 10mF

0A

Time (5ms/div)

Time (2ms/div)

Figure 47.

Figure 48.

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TYPICAL CHARACTERISTICS (continued)

Over the operating temperature range of T_J= –40°C to +125°C, V_IN= V_OUT(TYP)+ 0.5V or 2.2V, whichever is greater;

I_OUT= 100µA, V_EN= V_VSET= V_IN, C_OUT= 1µF, and C_IN= 1µF, unless otherwise noted.

ENABLE PIN vs OUTPUT VOLTAGE RESPONSE

AND OUTPUT CURRENT

TPS780330220

ENABLE PIN vs OUTPUT VOLTAGE DELAY

TPS780330220

Enable

V_IN= 5.5V

V_OUT= 3.3V

Enable

V_IN

V_OUT

I_OUT= 150mA

V_OUT

V_IN

C_OUT= 10mF

Load Current

Load

Current

V_IN= 5.50V

V_OUT= 3.3V

I_OUT= 150mA

C_OUT= 10mF

0V

Time (1ms/div)

Figure 49.

Figure 50.

V_SETPIN TOGGLE

TPS780330220

V_SETPIN TOGGLE

TPS780330220

V_OUT

1V/div

V_SET

1V/div

V_IN= 5.0V

Enable = V_IN

V_IN= 5.0V

I_OUT= 150mA

V_OUTTransitioning from 2.2V to 3.3V

V_OUTTransitioning from 3.3V to 2.2V

Time (500ms/div)

Figure 51.

Figure 52.

V_SETPIN TOGGLE (SLOW RAMP)

TPS780330220

V_IN

V_SET

V_OUT

100mA

V_IN= 5.5V

V_OUT= 3.3V

I_OUT= 150mA

50mA

0A

Load Current

to 100mA

C_OUT= 10mF

Time (50ms/div)

Figure 53.

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APPLICATION INFORMATION

Programming the TPS78001 Adjustable LDO

APPLICATION EXAMPLES

Regulator

The TPS780 series of LDOs typically take less than

The output voltage of the TPS78001 adjustable

800µs to transition from a lower voltage of 2.2V to a

regulator is programmed using an external resistor

higher voltage of 3.3V under an output load of

divider as shown in Figure 55. The output voltage

150mA; see Figure 51. Additionally, the TPS780

operating range is 1.2V to 5.1V, and is calculated

series contain active pull-down circuitry that

using Equation 1:

automatically pulls charge out of the voltage capacitor

R₁

to transition the output voltage from the higher

V_OUT= V_FB´ 1 +

(

)

R₂

voltage to the lower voltage, even with no load

(1)

connected.

Output

voltage

overshoots

and

Where:

undershoots are minimal under this load condition.

The TPS780 series typically take less than 800µs to

transition from V_SETlow (3.3V to 2.2V), or V_SEThigh

(2.2V to 3.3V); see Figure 51 and Figure 52. Both

output states of the TPS780 series are

factory-programmable between 1.5V to 4.2V. Note

that during startup or steady-state conditions, it is

important that the EN pin and V_SETpin voltages never

exceed V_IN+ 0.3V.

V_FB= 1.216V typ (the internal reference voltage)

Resistors R₁and R₂should be chosen for

approximately 1.2µA divider current. Lower value

resistors can be used for improved noise

performance, but the solution consumes more power.

Higher resistor values should be avoided because

leakage current into/out of FB across R₁/R₂creates

an offset voltage that artificially increases/decreases

the feedback voltage and thus erroneously

4.2V to 5.5V

2.2V to 3.3V

decreases/increases V_OUT

common output voltages and resistor values. The

recommended design procedure is to choose R₂

. Table 2 lists several

V_IN

V_OUT

IN

OUT

1mF

=

TPS780

1MΩ to set the divider current at 1.2µA, and then

calculate R₁using Equation 2:

On

Off

EN

V_OUT

R₁=

- 1 ´ R₂

)

(

V_FB

V_SETHigh = V_OUT(LOW)

V_SETLow = V_OUT(HIGH)

(2)

V_SET

GND

V_IN

V_OUT

1mF

IN

OUT

1mF

Figure 54. Typical Application Circuit

R₁

TPS78001

FB

EN

The TPS780 is also used effectively in dynamic

voltage scaling (DVS) applications. DVS applications

are required to dynamically switch between a high

operational voltage to a low standby voltage in order

to reduce power consumption. Modern multimillion

gate microprocessors fabricated with the latest

sub-micron processes save power by transitioning to

a lower voltage to reduce leakage currents while

maintaining content. This architecture enables the

microprocessor to transition quickly into an

operational state (wake up) without requiring a reload

of the states from external memory, or a reboot.

R₂

GND

R₁

R₂

V_OUT= V_FB´ (1 +

)

Figure 55. TPS78001 Adjustable LDO Regulator

Programming

Table 2. Output Voltage Programming Guide

OUTPUT VOLTAGE

R₁

R₂

1.8V

2.8V

5.0V

0.499MΩ

1.33MΩ

3.16MΩ

1MΩ

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Powering the MSP430 Microcontroller

3.0V

V_IN

V_OUT

V_CC

Several versions of the TPS780 are ideal for

powering the MSP430 microcontroller. Table 3 shows

potential applications of some voltage versions.

1mF

LDO

GND

MSP430

I/O

V_SS

Table 3. Typical MSP430 Applications

V_OUT(HIGH)

(TYP)

V_OUT(LOW)

(TYP)

DEVICE

APPLICATION

V_{OUT, MIN}> 1.800V

required by many

MSP430s. Allows

lowest power

V_CC= 3.0V

5mA

TPS780360200

3.6V

2.0V

consumption

operation.

Active

Mode

V_{OUT, MIN}> 2.200V

required by some

MSP430s FLASH

operation.

1.6mA I_Q

TPS780360220

TPS780360300

3.6V

2.2V

3.0V

LPM3/Sleep Mode

V_{OUT, MIN}> 2.700V

required by some

MSP430s FLASH

operation.

Figure 56. Typical LDO without DVS

V_{OUT, MIN}< 3.600V

required by some

MSP430s. Allows

highest speed

TPS780360220

3.6V

2.2V

2.2V to 3.6V

V_IN

V_OUT

V_CC

operation.

1mF

TPS780

V_SET

MSP430

The TPS780 family offers many output voltage

versions to allow designers to optimize the supply

voltage for the processing speed required of the

MSP430. This flexible architecture minimizes the

supply current consumed by the particular MSP430

application. The MSP430 total system power can be

reduced by substituting the 500nA I_QTPS780 series

LDO in place of an existing ultra-low I_QLDO (typical

best case = 1µA). Additionally, DVS allows for

increasing the clock speed in active mode (MSP430

V_CC= 3.6V). The 3.6V V_CCreduces the MSP430 time

in active mode. In low-power mode, MSP430 system

power can be further reduced by lowering the

MSP430 V_CCto 2.2V in sleep mode.

I/O

GND

V_SS

V_CC= 3.6V

5mA

V_CC= 2.2V

Active

Mode

700nA I_Q

Current

LPM3/Sleep Mode

Key features of the TPS780 series are an ultralow

quiescent current (500nA), DVS, and miniaturized

packaging. The TPS780 family are available in

SON-6 and TSOT-23 packages. Figure 56 shows a

typical MSP430 circuit powered by an LDO without

DVS. Figure 57 is an MSP430 circuit using a TPS780

LDO that incorporates an integrated DVS, thus

simplifying the circuit design. In a circuit without DVS,

as Figure 56 illustrates, V_CCis always at 3.0V. When

the MSP430 goes into sleep mode, V_CCremains at

3.0V; if DVS is applied, V_CCcould be reduced in

sleep mode. In Figure 57, the TPS780 LDO with

integrated DVS maintains 3.6V V_CCuntil a logic high

signal from the MSP430 forces V_OUTto level shift

V_OUTfrom 3.6V down to 2.2V, thus reducing power in

sleep mode.

Figure 57. TPS780 with Integrated DVS

The other benefit of DVS is that it allows a higher V_CC

voltage on the MSP430, increasing the clock speed

and reducing the active mode dwell time.

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The total system power savings is outlined in Table 4,

Table 5, and Table 6. In Table 4, the MSP430 power

savings are calculated for various MSP430 devices

using a TPS780 series with integrated DVS versus a

standard ultralow I_QLDO without DVS. In Table 5, the

TPS780 series quiescent power is calculated for a V_IN

of 4.2V, with the same V_INused for the ultralow I_Q

LDO. Quiescent power dissipation in an LDO is the

V_INvoltage times the ground current, because zero

load is applied. After the dissipation power is

calculated for the individual LDOs in Table 5, simple

subtraction outputs the LDO power savings using the

TPS780 series. Table 6 calculates the total system

power savings using a TPS780 series LDO in place

of an ultralow I_Q1.2µA LDO in an MSP430F1121

application. There are many different versions of the

MSP430. Actual power savings will vary depending

on the selected device.

capacitor may be necessary if large, fast rise-time

load transients are anticipated, or if the device is not

located near the power source. If source impedance

is not sufficiently low, a 0.1µF input capacitor may be

necessary to ensure stability.

The TPS780 is designed to be stable with standard

ceramic capacitors with values of 1.0µF or larger at

the output. X5R- and X7R-type capacitors are best

because they have minimal variation in value and

ESR over temperature. Maximum ESR should be less

than 1.0Ω. With tolerance and dc bias effects, the

minimum capacitance required to ensure stability is

1µF.

BOARD LAYOUT RECOMMENDATIONS TO

IMPROVE PSRR AND NOISE PERFORMANCE

To improve ac performance (such as PSRR, output

noise, and transient response), it is recommended

that the printed circuit board (PCB) be designed with

separate ground planes for V_INand V_OUT, with each

ground plane connected only at the GND pin of the

device. In addition, the ground connection for the

output capacitor should connect directly to the GND

pin of the device. High ESR capacitors may degrade

PSRR.

INPUT AND OUTPUT CAPACITOR

REQUIREMENTS

Although an input capacitor is not required for

stability, it is good analog design practice to connect

a 0.1µF to 1.0µF low equivalent series resistance

(ESR) capacitor across the input supply near the

regulator. This capacitor counteracts reactive input

sources and improves transient response, noise

rejection, and ripple rejection.

A

higher-value

Table 4. DVS MSP430 Power Savings with the TPS780 Series on selected MSP430 Devices

LPM3 AT V_CC= 3V, LPM3 AT V_CC= 3.0V

LPM3 AT V_CC

2.2V, I_Q

=

LPM3 AT V_CC= 2.2V

I_Q

× I_Q

µW SAVINGS

DEVICE

(µA)

(µW)

(µA)

(µW)

USING ONLY DVS

MSP430F1121

MSP430F149

MSP430F2131

MSP430F249

MSP430F413

MSP430F449

1.6

0.9

1.0

0.9

1.6

4.8

2.7

3.0

2.7

4.8

0.7

0.9

0.7

0.9

0.7

1.1

1.5

2.0

1.5

2.0

1.5

2.4

3.3

2.8

1.2

1.0

1.2

2.4

Table 5. Typical Ultralow I_QLDO Quiescent Power Dissipation Versus the TPS780 Series

MSP430 SYSTEM

TYPICAL ULTRALOW I_Q

TYPICAL ULTRALOW I_QLDO AT +25°C AMBIENT

TPS780 SERIES

TYPICAL I_QAT +25°C

AMBIENT

TPS780 SERIES AT

+25C AMBIENT, POWER

DISSIPATION

POWER SAVINGS

USING THE TPS780

SERIES

LDO AT +25°C AMBIENT

POWER DISSIPATION

QUIESCENT POWER

DISSIPATION SAVINGS

(µW)

I_Q

(µA)

I

_Q× V_IN= 4.2V

TPS780 I_Q

I

_Q× V_IN= 4.2V

(µW)

(µA)

(µW)

1.20

5.04

0.42

1.76

3.28

Table 6. Total System Power Dissipation

TOTAL SYSTEM POWER IN

SLEEP MODE 3

LDO DISSIPATION

5.04µW

MSP430 DISSIPATION

4.8µW⁽¹⁾

Typical 1.2µA LDO, no DVS

9.84µW

3.26µW

TPS780 Series with DVS

1.76µW

1.5µW⁽¹⁾

(1) Value taken from Table 4 and relative to the MSP430F1121.

16 Submit Documentation Feedback

TPS780 Series

www.ti.com ....................................................................................................................................................... SBVS083C–JANUARY 2007–REVISED MAY 2008

INTERNAL CURRENT LIMIT

4.2V to 5.5V

2.2V

V_IN

V_OUT

The TPS780 series are internally current-limited to

protect the regulator during fault conditions. During

current limit, the output sources a fixed amount of

current that is largely independent of output voltage.

For reliable operation, the device should not be

operated in a current limit state for extended periods

of time.

IN

OUT

1mF

TPS780

EN

The PMOS pass element in the TPS780 series has a

built-in body diode that conducts current when the

voltage at OUT exceeds the voltage at IN. This

current is not limited, so if extended reverse voltage

operation is anticipated, external limiting to 5% of

rated output current may be appropriate.

V_SET

GND

Figure 59. Circuit to Tie Both EN and V_SETHigh

DROPOUT VOLTAGE

SHUTDOWN

The TPS780 series use a PMOS pass transistor to

achieve low dropout. When (V_IN– V_OUT) is less than

the dropout voltage (V_DO), the PMOS pass device is

the linear region of operation and the input-to-output

resistance is the R_DS(ON)of the PMOS pass element.

V_DOapproximately scales with output current

because the PMOS device behaves like a resistor in

dropout. As with any linear regulator, PSRR and

The enable pin (EN) is active high and is compatible

with standard and low-voltage CMOS levels. When

shutdown capability is not required, EN should be

connected to the IN pin, as shown in Figure 58.

Figure 59 shows both EN and V_SETconnected to IN.

The TPS780 series, with internal active output

pull-down circuitry, discharges the output to within 5%

V_OUTwith a time (t) shown in Equation 3:

transient response are degraded as (V_IN– V_OUT

)

approaches dropout. This effect is shown in the

Typical Characteristics section. Refer to application

report SLVA207, Understanding LDO Dropout,

available for download from www.ti.com.

10kW ´ R_L

´ C_OUT

t = 3

10kW + R_L

(3)

Where:

R_L= output load resistance

C_OUT= output capacitance

TRANSIENT RESPONSE

As with any regulator, increasing the size of the

output capacitor reduces over/undershoot magnitude

but increases duration of the transient response. For

more information, see Figure 48.

4.2V to 5.5V

2.2V to 3.3V

V_IN

V_OUT

IN

OUT

1mF

TPS780

ACTIVE V_OUTPULL-DOWN

EN

In the TPS780 series, the active pull-down discharges

V_OUTwhen the device is off. However, the input

voltage must be greater than 2.2V for the active

pull-down to work.

V_SETHigh = V_OUT(LOW)

V_SETLow = V_OUT(HIGH)

V_SET

GND

MINIMUM LOAD

The TPS780 series are stable with no output load.

Traditional PMOS LDO regulators suffer from lower

loop gain at very light output loads. The TPS780

series employ an innovative, low-current circuit under

very light or no-load conditions, resulting in improved

output voltage regulation performance down to zero

output current. See Figure 47 for the load transient

response.

Figure 58. Circuit Showing EN Tied High when

Shutdown Capability is Not Required

Submit Documentation Feedback

17

TPS780 Series

SBVS083C–JANUARY 2007–REVISED MAY 2008 ....................................................................................................................................................... www.ti.com

THERMAL INFORMATION

THERMAL PROTECTION

POWER DISSIPATION

Thermal protection disables the output when the

junction temperature rises to approximately +160°C,

allowing the device to cool. Once the junction

temperature cools to approximately +140°C, the

output circuitry is enabled. Depending on power

dissipation, thermal resistance, and ambient

temperature, the thermal protection circuit may cycle

on and off again. This cycling limits the dissipation of

the regulator, protecting it from damage as a result of

overheating.

The ability to remove heat from the die is different for

each

package

type,

presenting

different

considerations in the PCB layout. The PCB area

around the device that is free of other components

moves the heat from the device to the ambient air.

Performance data for JEDEC low- and high-K boards

are given in the Dissipation Ratings table. Using

heavier copper increases the effectiveness in

removing heat from the device. The addition of plated

through-holes to heat-dissipating layers also

improves the heatsink effectiveness. Power

dissipation depends on input voltage and load

conditions. Power dissipation (P_D) is equal to the

product of the output current times the voltage drop

across the output pass element (V_INto V_OUT), as

shown in Equation 4:

Any tendency to activate the thermal protection circuit

indicates excessive power dissipation or an

inadequate heatsink. For reliable operation, junction

temperature should be limited to +125°C maximum.

To estimate the margin of safety in a complete design

(including

heatsink),

increase

the

ambient

P_D= (V_IN- V_OUT) ´ I_OUT

temperature until the thermal protection is triggered;

use worst-case loads and signal conditions. For good

reliability, thermal protection should trigger at least

+35°C above the maximum expected ambient

condition of your particular application. This

(4)

PACKAGE MOUNTING

Solder pad footprint recommendations for the

TPS780 series are available from the Texas

Instruments web site at www.ti.com through the

TPS780 series product folders.

configuration produces

a

worst-case junction

temperature of +125°C at the highest expected

ambient temperature and worst-case load.

The internal protection circuitry of the TPS780 series

has been designed to protect against overload

conditions. However, it is not intended to replace

proper heatsinking. Continuously running the TPS780

series into thermal shutdown degrades device

reliability.

18

Submit Documentation Feedback

PACKAGE OPTION ADDENDUM

www.ti.com

5-Aug-2008

PACKAGING INFORMATION

Orderable Device

TPS78001DDCR

TPS78001DDCRG4

TPS78001DDCT

TPS78001DDCTG4

TPS78001DRVR

TPS78001DRVRG4

TPS78001DRVT

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOT

DDC

5

6

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

SOT

SON

DDC

DRV

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS78001DRVTG4

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS780270200DDCR

TPS780270200DDCT

TPS780330220DDCR

PREVIEW

ACTIVE

SOT

DDC

5

3000

250

TBD

Call TI

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

TPS780330220DDCRG4

TPS780330220DDCT

TPS780330220DDCTG4

TPS780330220DRVR

TPS780330220DRVRG4

TPS780330220DRVT

TPS780330220DRVTG4

ACTIVE

SOT

SON

DDC

DRV

5

6

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

5-Aug-2008

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

29-Jul-2008

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) W1 (mm)

(mm) (mm) Quadrant

TPS78001DDCR

TPS78001DDCT

SOT

SON

SOT

SON

DDC

DRV

DDC

DRV

5

6

5

6

3000

250

179.0

8.4

3.2

2.2

3.2

2.2

3.2

2.2

3.2

2.2

1.4

1.2

1.4

1.2

4.0

8.0

Q3

Q2

Q3

Q2

TPS78001DRVR

3000

250

TPS78001DRVT

TPS780330220DDCR

TPS780330220DDCT

TPS780330220DRVR

TPS780330220DRVT

3000

250

3000

250

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

29-Jul-2008

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS78001DDCR

TPS78001DDCT

SOT

SON

SOT

SON

DDC

DRV

DDC

DRV

5

6

5

6

3000

250

195.0

200.0

45.0

TPS78001DRVR

3000

250

TPS78001DRVT

TPS780330220DDCR

TPS780330220DDCT

TPS780330220DRVR

TPS780330220DRVT

3000

250

3000

250

Pack Materials-Page 2

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TPS780330220DDCR
厂家：	TEXAS INSTRUMENTS
描述：	150mA, Low-Dropout Regulator, Ultralow-Power, IQ 500nA with Pin-Selectable, Dual-Level Output Voltage 150mA，低压降稳压器，超低功耗， IQ 500nA的与引脚可选，双电平输出电压稳压器
文件：	总27页 (文件大小：873K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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