TPS788 [TI]
具有使能功能的 150mA、10V、低 IQ、低压降稳压器;
| 型号： | TPS788 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有使能功能的 150mA、10V、低 IQ、低压降稳压器 电源电路 线性稳压器IC |
| 文件： | 总9页 (文件大小：174K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
150-mA LOW-NOISE LDO WITH IN-RUSH
CURRENT CONTROL FOR USB APPLICATION
FEATURES
DESCRIPTION
D
D
D
D
D
D
D
150-mA Low-Dropout Regulator
The TPS78825 and TPS78833 are very small (SOT-23)
Available in 2.5 V, 3.3 V
package, low-noise LDOs that regulate the output
voltage to 2.5 V and 3.3 V with input voltage ranging
from 2.7 V to an absolute maximum of 13.5 V. These
devices output 150 mA with a peak current of 350 mA
(typ). The TPS788xx family uses the SR pin to program
the output voltage slew rate to control the in-rush
current. This is specifically used in the USB application
where large load capacitance is present at start-up. The
TPS788xx devices use only 17 µA of quiescent current
Programmable Slew Rate Control
Output Noise Typically 56 µV
RMS
Only 17 µA Quiescent Current at 150 mA
1 µA Quiescent Current in Standby Mode
Dropout Voltage Typically 150 mV at 150 mA
(TPS78833)
D
Over Current Limitation
and exhibit only 56 µV
a 10 µF output capacitor.
of output voltage noise using
RMS
D
–40°C to 125°C Operating Junction
Temperature Range
The usual PNP pass transistor has been replaced by a
PMOSpasselement. BecausethePMOSpasselement
behaves as a low-value resistor, the dropout voltage is
verylow, typically150mVat150mAofloadcurrent, and
is directly proportional to the load current.
D
5-Pin SOT-23 (DBV) Package
DBV PACKAGE
(TOP VIEW)
1
2
3
5
OUT
SR
IN
The TPS788xx also features a logic-enabled sleep
mode to shut down the regulator, reducing quiescent
GND
current to 1 µA typical at T = 25°C.
J
4
EN
QUIESCENT CURRENT
vs
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
FREE-AIR TEMPERATURE
TIME (START-UP)
25
V
= 4.3 V
CC
I
O
= 150 mA
5
0
20
I
O
= 1 mA
15
10
5
C
= 0.01 µF
(SR)
3
2
1
0
C
= 0.1 µF
(SR)
V = 4.3 V
I
V
= 3.3 V
O
I
C
T
= 150 mA
= 10 µF
= 25°C
O
o
J
0
0
10 20 30 40 50 60 70 80 90 100
–40 –25 –10 5 20 35 50 65 80 95 110 125
– Free-Air Temperature – °C
T
A
t – Time – ms
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
1
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
AVAILABLE OPTIONS
PACKAGE
T
VOLTAGE
2.5 V
PART NUMBER
SYMBOL
PGZI
J
†
‡
TPS78825DBVR
TPS78825DBVT
SOT-23
(DBV)
–40°C to 125°C
3.3 V
TPS78833DBVT
TPS78833DBVR
PGTI
†
‡
The DBVT indicates tape and reel of 250 parts.
The DBVR indicates tape and reel of 3000 parts.
functional block diagram
OUT
IN
EN
150 k
Current Limit
/ Thermal
Protection
V
ref
GND
SR
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
3
EN
I
Active low enable
GND
IN
2
Regulator ground
1
I
O
I
The IN terminal is the input to the device.
OUT
SR
5
The OUT terminal is the regulated output of the device.
The SR terminal is used to control the in-rush current.
4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)§
Input voltage range ꢀ ꢁ ꢂꢂ ꢃ ꢄꢅꢂ ꢆ ꢇ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 13.5 V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V + 0.3 V
I
Voltage on OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 150°C
J
Operating ambient temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
§
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING FACTOR
T
A
≤ 25°C
T
A
= 70°C
T = 85°C
A
BOARD
PACKAGE
R
R
θJA
θJC
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
A
¶
Low K
DBV
DBV
65.8°C/W
65.8°C/W
259°C/W
180°C/W
3.9 mW/°C
5.6 mW/°C
386 mW
555 mW
212 mW
305 mW
154 mW
222 mW
#
High K
¶
#
The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board.
The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
2
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
electrical characteristics over recommended operating free-air temperature range EN = 0
,
T = –40 to 125 °C, V = V
+ 1 V, I = 1 mA, C = 4.7 µF, C
= 0.01 µF (unless otherwise noted)
J
I
O(typ)
O
o
(SR)
PARAMETER
TEST CONDITIONS
MIN
2.7
0
TYP
MAX
10
UNIT
V
V
I
Input voltage (see Note 2)
I
O
Continuous output current (see Note 3)
Operating junction temperature
150
125
mA
°C
T
J
–40
T
= 25°C
2.5
3.3
17
J
TPS78825
TPS78833
10 µA< I < 150 mA, 3.5 V < V < 10 V
2.425
3.201
2.575
3.399
28
O
= 25°C
I
Output voltage
V
T
J
10 µA< I < 150 mA, 3.8 V < V < 10 V
O
I
10 µA< I < 450 mA, T = 25°C
O
J
Quiescent current (GND current)
Load regulation
µA
mV
%/V
10 µA< I < 150 mA
O
10 µA< I < 200 mA, T = 25°C
12
O
J
V
O
V
O
+ 1 V < V ≤ 10 V, T = 25°C
0.04
Output voltage line regulation (∆V /V
(see Note 5)
)
I
J
O
O
+ 1 V < V ≤ 10 V
0.1
I
BW = 200 Hz to 100 kHz,
I
T
C
C
= 150 mA,
= 25°C,
= 10 µF,
O
J
o
Output noise voltage (TPS78833)
56
µV
RMS
= 0.47 µF
(SR)
C
C
C
= 0.01 µF
= 0.1 µF
= 0.47 µF
10
50
(byp)
(byp)
(byp)
R
C
= 22 Ω,
L
10 µF,
= 25°C
Time, start-up (TPS78833)
Output current limit
ms
o =
T
J
300
V
O =
0 V (see Note 4)
350
1
750
2
mA
Standby current
EN = 0 V, 2.7 V < V < 10 V
µA
V
I
High level enable input voltage
Low level enable input voltage
Input current (EN)
2.7 V < V < 10 V
1.7
I
2.7 V < V < 10 V
I
0.9
1
V
EN = 0
–1
µA
f = 1 kHz,
C
= 0.01 µF,
= 150 mA,
(SL)
Power supply ripple rejection
Dropout voltage (see Note 6)
TPS78833
TPS78833
T
J
= 25°C,
= 10 µF
I
O
70
dB
C
o
I
I
= 150 mA, T = 25°C
150
O
J
mV
= 150 mA
300
O
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
V (min) = V (max) + V (max load)
I
O
DO
3. Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended
that the device operate under conditions beyond those specified in this table for extended periods of time.
4. The minimum IN operating voltage is 2.7 V or V
output current is 200 mA.
+ 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximum
O(typ)
5. If V ≤ 2.5 V then V
= 2.7 V, V
= 5.5 V:
O
Imin
Imax
OǒVImax * 2.7 VǓ
V
ǒ
Ǔ
Line regulation (mV) + %ńV
1000
100
If V > 2.5 V then V
Imin
= V + 1 V, V
6. IN voltage equals V (typ) – 100 mV
= 5.5 V.
Imax
O
O
O
3
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
OUTPUT VOLTAGE
QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
vs
LOAD CURRENT
3.315
3.2
25
20
V
= 4.3 V
V
= 4.3 V
CC
CC
V
= 4.3 V
CC
= 25°C
3.315
3.31
I
O
= 150 mA
T
J
3.31
3.305
3.3
I
O
= 1 mA
3.305
3.3
I
O
= 1 mA
15
10
5
3.295
3.29
I
O
= 150 mA
3.295
3.285
3.28
3.29
3.275
3.27
3.285
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
0
15 30 45 60 75 90 105 120 135 150
– Load Current – mA
–40 –25 –10
5 20 35 50 65 80 95 110 125
– Free-Air Temperature – °C
T
A
T
– Free-Air Temperature – °C
I
L
A
Figure 1
Figure 2
Figure 3
OUTPUT SPECTRAL NOISE DENSITY
vs
OUTPUT IMPEDANCE
vs
ROOT MEAN SQUARED OUTPUT NOISE
vs
SLEW RATE CAPACITANCE
100
FREQUENCY
FREQUENCY
400
2
1.8
1.6
V = 4.3 V
= 4.7 µF
V = 4.3 V
I
o
I
O
C
V
= 3.3 V
I
O
= 150 mA
I
O
= 150 mA
300
200
C
= 10 µF
80
o
1.4
1.2
1
BW = 200Hz to 100 kHz
I
O
= 1 mA
60
40
0.8
0.6
0.4
0.2
0
100
0
V = 4.3 V
I
= 1 mA
I
O
C
C
= 4.7 µF
o
= 0.47 µF
(SR)
I
O
= 150 mA
1 k
20
100
1 k
10 k
100 k
10
100
10 k
100 k
1 M
0.001
0.01
0.1
1
f – Frequency – Hz
f – Frequency – Hz
C
– Slew Rate Capacitance – µF
(sr)
Figure 4
Figure 5
Figure 6
DROPOUT VOLTAGE
vs
RIPPLE REJECTION
vs
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
FREE-AIR TEMPERATURE
FREQUENCY
TIME (START-UP)
200
120
V = 4.3 V
V
= 3.2 V
I
CC
110
100
90
V
C
C
= 3.3 V
= 10 µF
O
o
5
0
I
O
= 150 mA
= 0.47 µF
150
100
(SR)
80
I
= 1 mA
O
70
60
50
3
V = 4.3 V
I
O
O
2
1
0
V
I
= 3.3 V
= 150 mA
I
O
= 150 mA
50
0
40
30
20
C
C
T
= 0.47 µF
= 10 µF
= 25°C
(SR)
o
J
I
= 1 mA
O
–40 –25 –10 5 20 35 50 65 80 95 110 125
0
100 200 300 400 500 600 700 800 900 1000
10
100
1 k
10 k
100 k
1 M
T
A
– Free-Air Temperature – °C
f – Frequency – Hz
t – Time – ms
Figure 7
Figure 8
Figure 9
4
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE, ENABLE VOLTAGE
vs
TIME (START-UP)
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
dI
dt
0.075 A
µs
V
C
= 3.3 V
= 10 µF
dv
dt
0.2 V
µs
O
o
5
0
=
=
200
100
0
20
0
C
= 0.01 µF
(SR)
3
2
1
0
–20
5.3
50
0
C
= 0.1 µF
(SR)
V = 4.3 V
I
V
= 3.3 V
O
–50
–100
V = 4.3 V
I
I
C
T
= 150 mA
= 10 µF
= 25°C
O
o
J
V
= 3.3 V
O
4.3
C
= 10 µF
o
0
10 20 30 40 50 60 70 80 90 100
0
20 40 60 80 100 120 140 160 180 200
0
20 40 60 80 100 120 140 160 180 200
t – Time – ms
t – Time – µs
t – Time – µs
Figure 10
Figure 11
Figure 12
TYPICAL REGIONS OF STABILITY
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
100
V = 4.3 V
I
V = 4.3 V
I
V
= 3.3 V
V
= 3.3 V
O
O
C
= 10 µF
C
= 4.7 µF
o
o
Region of Instability
Region of Instability
10
1
10
1
Region of Stability
Region of Stability
0.1
0.1
0
60
90
120
150
0
60
90
120
150
I
O
– Output Current – mA
I
O
– Output Current – mA
Figure 14
Figure 13
5
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
APPLICATION INFORMATION
The TPS788xx family of low-dropout (LDO) regulators has been optimized for use in battery-operated
equipment. It features extremely low dropout voltages, low output noise, low quiescent current (17 µA typically),
and enable inputs to reduce supply currents to 1 µA when the regulator is turned off. A typical application circuit
is shown in Figure 15.
1
V
I
IN
4
5
SR
OUT
V
O
3
1 µF
0.01 µF
EN
+
4.7 µF
GND
2
ESR = 0.2 Ω
Figure 15. Typical Application Circuit
external capacitor requirements
Although not required, a 0.047-µF or larger ceramic input bypass capacitor, connected between IN and GND
and located close to the TPS788xx, is recommended to improve transient response and noise rejection. A
higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated
and the device is located several inches from the power source.
Like all low dropout regulators, the TPS788xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 4.7 µF. The ESR (equivalent
series resistance) of the capacitor should be between 0.2Ω and 10 Ω. toensurestability. Capacitorvalueslarger
than 4.7 µF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 µF are not
recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic,
aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements
described above. Most of the commercially available 4.7 µF surface-mount solid tantalum capacitors, including
devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic
capacitors may have very small equivalent series resistances and may thus require the addition of a low value
series resistor to ensure stability.
CAPACITOR SELECTION
†
†
PART NO.
T494B475K016AS
195D106x0016x2T
695D106x003562T
TPSC475K035R0600
MFR.
Kemet
Sprague
Sprague
AVX
VALUE
4.7 µF
10 µF
MAX ESR
SIZE (H × L × W)
1.9 × 3.5 × 2.8
1.3 × 7.0 × 2.7
2.5 × 7.6 × 2.5
2.6 × 6.0 × 3.2
1.5 Ω
1.5 Ω
1.3 Ω
0.6 Ω
10 µF
4.7 µF
†
Size is in mm. The ESR maximum resistance is in Ohms at 100 kHz and T = 25°C. Contact the
manufacturer for the minimum ESR values.
A
6
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
APPLICATION INFORMATION
external capacitor requirements (continued)
The external bypass capacitor, used in conjunction with an internal resistor to form a low-pass filter, should be
a low ESR ceramic capacitor. For example, the TPS78833 exhibits only 56 µV of output voltage noise using
RMS
a 0.01 µF ceramic bypass capacitor and a 10-µF ceramic output capacitor. Note that the output will start up
slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created by
the internal 150-kΩ resistor and external capacitor.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than
D(max)
D
or equal to P
.
D(max)
The maximum-power-dissipation limit is determined using the following equation:
T max * T
J
A
P
+
D(max)
R
θJA
Where:
T max is the maximum allowable junction temperature.
J
R
is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
θJA
T is the ambient temperature.
A
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
D
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
regulator protection
The TPS788xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might
be appropriate.
TheTPS788xxfeaturesinternalcurrentlimitingandthermalprotection. Duringnormaloperation, theTPS78833
limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package. If the temperature of thedevice
exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to
below approximately 140°C, regulator operation resumes.
7
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TPS78825, TPS78833
SLVS382A – JUNE 2001 – REVISED JULY 2001
DBV (R-PDSO-G5)
MECHANICAL DATA
PLASTIC SMALL-OUTLINE
0,50
0,30
M
0,20
0,95
5
4
0,15 NOM
1,70
1,50
3,00
2,60
1
3
Gage Plane
3,00
2,80
0,25
0°–8°
0,55
0,35
Seating Plane
0,10
1,45
0,95
0,05 MIN
4073253-4/F 10/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-178
8
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Copyright 2001, Texas Instruments Incorporated
相关型号：
TPS78825DBVRG4
2.5V FIXED POSITIVE LDO REGULATOR, 0.3V DROPOUT, PDSO5, GREEN, PLASTIC, SOT-23, 5 PIN
TI
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