TPS793333DBVREP [TI]
3.3V FIXED POSITIVE LDO REGULATOR, 0.18V DROPOUT, PDSO5, PLASTIC, SOT-23, 5 PIN;
| 型号： | TPS793333DBVREP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3.3V FIXED POSITIVE LDO REGULATOR, 0.18V DROPOUT, PDSO5, PLASTIC, SOT-23, 5 PIN 信息通信管理 光电二极管 输出元件 调节器 |
| 文件： | 总15页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
Actual Size
(3,00 mm x 3,00 mm)
Actual Size
(3,00 mm x 3,00 mm)
SGLS163 – APRIL 2003
ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA
LOW-DROPOUT LINEAR REGULATORS
FEATURES
DESCRIPTION
D
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
The TPS793xx family of low-dropout (LDO) low-power
linear voltage regulators features high power supply
rejection ratio (PSRR), ultralow noise, fast start-up, and
excellent line and load transient responses in a small
outline, SOT23, package. Each device in the family is
stable, with a small 2.2-µF ceramic capacitor on the
output. The TPS793xx family uses an advanced,
proprietary BiCMOS fabrication process to yield
extremely low dropout voltages (e.g., 112 mV at 200
mA, TPS79330). Each device achieves fast start-up
times (approximately 50 µs with a 0.001-µF bypass
capacitor) while consuming very low quiescent current
(170 µA typical). Moreover, when the device is placed
in standby mode, the supply current is reduced to less
than 1 µA. The TPS79328 exhibits approximately 32
D
Enhanced Diminishing Manufacturing
Sources (DMS) Support
D
D
D
D
D
D
D
D
D
D
Enhanced Product-Change Notification
†
Qualification Pedigree
200-mA Low-Dropout Regulator With EN
Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V,
3.3-V, 4.75-V, and Adjustable
High PSRR (70 dB at 10 kHz)
Ultralow Noise (32 µV)
Fast Start-Up Time (50 µs)
µV
of output voltage noise with a 0.1-µF bypass
RMS
Stable With a 2.2-µF Ceramic Capacitor
Excellent Load/Line Transient
capacitor. Applications with analog components that
are noise sensitive, such as portable RF electronics,
benefit from the high PSRR and low-noise features as
well as the fast response time.
Very Low Dropout Voltage
(112 mV at Full Load, TPS79330)
D
5-Pin SOT23 (DBV) Package
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over specified temperature
range. This includes, but is not limited to, Highly Accelerated Stress
Test (HAST) or biased 85/85, temperature cycle, autoclave or
unbiased HAST, electromigration, bond intermetallic life, and mold
compound life. Such qualification testing should not be viewed as
justifying use of this component beyond specified performance and
environmental limits.
DBV PACKAGE
(TOP VIEW)
IN
GND
EN
1
2
5
OUT
3
4
BYPASS
Fixed Option
APPLICATIONS
DBV PACKAGE
(TOP VIEW)
D
D
D
VCOs
RF
IN
GND
EN
1
2
6
5
OUT
Bluetooth , Wireless LAN
FB
3
4
BYPASS
Adjustable Option
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Bluetooth is a trademark owned by Bluetooth SIG, Inc.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
1
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
TPS79328
RIPPLE REJECTION
vs
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
FREQUENCY
0.3
100
V = 3.8 V
I
90
80
70
I
O
= 200 mA
C
C
= 2.2 µF
o
0.25
0.2
= 0.1 µF
(byp)
60
0.15
50
40
30
I
= 1 mA
O
I
= 10 mA
O
0.1
I
O
= 200 mA
20
10
0
V = 3.8 V
0.05
I
C
C
= 10 µF
o
= 0.01 µF
(byp)
0
10
100
1 k
10 k 100 k 1 M 10 M
100
1 k
10 k
100 k
f – Frequency – Hz
f – Frequency – Hz
AVAILABLE OPTIONS
PACKAGE
T
VOLTAGE
PART NUMBER
SYMBOL
PGVE
PHHE
PGWE
PGXE
PHIE
J
†
†
†
1.2 to 5.5 V
1.8 V
TPS79301DBVREP
TPS79318DBVREP
TPS79325DBVREP
2.5 V
†‡
†‡
2.8 V
TPS79328DBVREP
SOT23
(DBV)
–40°C to 125°C
2.85 V
3 V
TPS793285DBVREP
†‡
TPS79330DBVREP
PGYE
PHUE
PHJE
†
3.3 V
TPS793333DBVREP
†‡
TPS793475DBVREP
4.75 V
†
‡
The DBVR indicates tape and reel of 3000 parts.
Product preview
2
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range ꢀ ꢁ ꢂꢂ ꢃ ꢄꢅꢂ ꢆ ꢇ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V + 0.3 V
I
Voltage on OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
ESD rating, CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 150°C
J
Operating ambient temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
stg
†
NOTE 1: All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
DERATING FACTOR
T
A
≤ 25°C
T
= 70°C
T = 85°C
A
A
BOARD
PACKAGE
R
R
θJC
63.75 °C/W
63.75 °C/W 178.3 °C/W
θJA
ABOVE T = 25°C
POWER RATING POWER RATING POWER RATING
A
‡
Low K
DBV
DBV
256 °C/W
3.906 mW/°C
5.609 mW/°C
391 mW
561 mW
215 mW
308 mW
156 mW
224 mW
§
High K
‡
§
The JEDEC low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board.
The JEDEC high K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground
planes and 2 ounce copper traces on top and bottom of the board.
3
www.ti.com
TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
electrical characteristics over recommended operating free-air temperature range EN = V
I,
T = –40 to 125 °C, V = V
+ 1 V, I = 1 mA, C = 10 µF, C
= 0.01 µF (unless otherwise noted)
J
I
PARAMETER
O(typ)
O
o
(byp)
TEST CONDITIONS
MIN
2.7
0
TYP
MAX
5.5
UNIT
V
V
I
Input voltage (see Note 2)
I
O
Continuous output current (see Note 3)
Operating junction temperature
200
125
mA
°C
T
J
–40
0 µA< I < 200 mA,
(see Note 4 )
1.22 V ≤ V ≤ 5.2 V,
O
O
TPS79301
TPS79318
TPS79325
TPS79328
0.98 V
1.02 V
V
V
V
V
V
V
V
V
O
O
T
J
= 25°C
1.8
2.5
2.8
2.85
3
0 µA< I < 200 mA,
2.8 V < V < 5.5 V
1.764
2.45
1.836
2.55
O
I
T
J
= 25°C
0 µA< I < 200 mA,
3.5 V < V < 5.5 V
I
O
T
J
= 25°C
0 µA< I < 200 mA,
3.8 V < V < 5.5 V
2.744
2.793
2.94
2.856
2.907
3.06
O
I
Output voltage
T
J
= 25°C
TPS793285
TPS79330
TPS79333
TPS793475
0 µA< I < 200 mA,
3.85 V < V < 5.5 V
I
O
T
J
= 25°C
0 µA< I < 200 mA,
4 V < V < 5.5 V
I
O
T
J
= 25°C
3.3
4.75
170
0 µA ≤ I < 200 mA,
4.3 V < V < 5.5 V
3.234
4.655
3.366
4.845
220
O
I
T
J
= 25°C
0 µA< I < 200 mA,
5.25 V < V < 5.5 V
I
O
0 µA< I < 200 mA,
T
J
= 25°C
µA
µA
O
Quiescent current (GND current)
Load regulation
0 µA< I < 200 mA
O
0 µA< I < 200 mA,
T
J
T
J
= 25°C
= 25°C
5
mV
O
V
O
V
O
+ 1 V < V ≤ 5.5 V,
0.05
Output voltage line regulation (∆V /V
(see Note 5)
)
I
O
O
%/V
+ 1 V < V ≤ 5.5 V
0.12
I
C
C
C
C
C
C
C
= 0.001 µF
55
36
(byp)
(byp)
(byp)
(byp)
(byp)
(byp)
(byp)
= 0.0047 µF
= 0.01 µF
= 0.1 µF
BW = 200 Hz to 100 kHz,
Output noise voltage (TPS79328)
µV
RMS
I
O
= 200 mA, T = 25°C
J
33
32
= 0.001 µF
= 0.0047 µF
= 0.01 µF
50
R
C
= 14 Ω,
= 1 µF,
L
o
70
Time, start-up (TPS79328)
µs
T
= 25°C
J
100
Output current limit
V
0 V,
See Note 4
2.7 V < V < 5.5 V
285
2
600
1
mA
µA
V
O =
Standby current
EN = 0 V,
2.7 V < V < 5.5 V
0.07
I
High level enable input voltage
Low level enable input voltage
Input current (EN)
I
2.7 V < V < 5.5 V
I
0.7
1
V
EN = 0
–1
µA
µA
Input current (FB) (TPS79301)
FB = 1.8 V
1
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
V (min) = V (max) + V (max load)
I
O
DO
3. Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended
that the device operate under conditions beyond those specified in this table for extended periods of time.
4. The minimum IN operating voltage is 2.7 V or V
output current is 200 mA.
+ 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximum
O(typ)
5. If V ≤ 2.5 V then V
Imin
= 2.7 V, V
= 5.5 V:
Imax
O
OǒVImax * 2.7 VǓ
V
ǒ
Ǔ
Line Reg. (mV) + %ńV
1000
100
If V ≥ 2.5 V then V
= V + 1 V, V = 5.5 V.
O
Imin
O
Imax
4
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
electrical characteristics over recommended operating free-air temperature range EN = V ,
I
T = –40 to 125 °C, V = V
(continued)
+ 1 V, I = 1 mA, C = 10 µF, C
= 0.01 µF (unless otherwise noted)
J
I
O(typ)
O
o
(byp)
PARAMETER
TEST CONDITIONS
MIN
TYP
70
MAX
UNIT
f = 100 Hz,
f = 100 Hz,
f = 10 kHz,
T
T
= 25°C,
= 25°C,
= 25°C,
I
I
I
I
= 10 mA
J
J
J
O
O
O
O
= 200 mA
= 200 mA
= 200 mA
= 25°C
68
Power supply ripple rejection
TPS79328
dB
T
70
f = 100 kHz, T = 25°C,
43
J
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
I
O
= 200 mA,
= 200 mA
= 200 mA,
= 200 mA
= 200 mA,
= 200 mA
= 200 mA,
= 200 mA
= 200 mA,
= 200 mA
T
T
T
T
T
120
J
J
J
J
J
TPS79328
TPS793285
TPS79330
TPS79333
TPS793475
200
200
200
180
= 25°C
= 25°C
= 25°C
= 25°C
120
112
102
77
mV
Dropout voltage (see Note 6)
mV
mV
125
UVLO threshold
UVLO hysteresis
V
rising
2.25
2.65
V
CC
= 25°C
T
J
V
CC
rising
100
mV
NOTE 6: IN voltage equals V (typ) – 100 mV; The TPS79325 dropout voltage is limited by the input voltage range limitations.
O
5
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
functional block diagram—adjustable version
V
IN
V
OUT
Current
Sense
UVLO
SHUTDOWN
ILIM
R1
_
GND
EN
+
FB
R2
UVLO
Thermal
External to
the Device
Shutdown
250 kΩ
V
ref
Bandgap
Reference
Bypass
V
IN
functional block diagram—fixed version
V
IN
V
OUT
UVLO
Current
Sense
GND
EN
SHUTDOWN
ILIM
R1
R2
_
+
UVLO
Thermal
Shutdown
250 kΩ
V
ref
Bandgap
Reference
V
IN
Bypass
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
ADJ FIXED
BYPASS
4
4
An external bypass capacitor, connected to this terminal, in conjunction with an internal resistor, creates
a low-pass filter to further reduce regulator noise.
EN
3
3
I
I
The EN terminal is an input which enables or shuts down the device. When EN goes to a logic high, the
device will be enabled. When the device goes to a logic low, the device is in shutdown mode.
FB
5
2
1
6
N/A
2
This terminal is the feedback input voltage for the adjustable device.
Regulator ground
GND
IN
1
I
The IN terminal is the input to the device.
OUT
5
O
The OUT terminal is the regulated output of the device.
6
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
TYPICAL CHARACTERISTICS
TPS79328
OUTPUT VOLTAGE
vs
TPS79328
OUTPUT VOLTAGE
vs
TPS79328
GROUND CURRENT
vs
OUTPUT CURRENT
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
2.805
2.8
2.805
2.804
2.803
2.802
2.801
2.8
250
200
V = 3.8 V
I
V = 3.8 V
I
C
T
= 10 µF
= 25° C
o
C
= 10 µF
I
O
= 1 mA
o
J
I
O
= 1 mA
2.795
2.79
I
O
= 200 mA
150
2.799
100
50
0
I
= 200 mA
O
2.785
2.798
2.797
2.78
V = 3.8 V
= 10 µF
I
2.796
2.795
C
o
2.775
–40 –25 –10 5 20 35 50 65 80 95 110 125
0
50
100
150
200
–40 –25–10 5 20 35 50 65 80 95 110 125
T
– Junction Temperature – °C
I
O
– Output Current – mA
T
– Junction Temperature – °C
J
J
Figure 1
Figure 2
TPS79328
Figure 3
TPS79328
TPS79328
OUTPUT SPECTRAL NOISE DENSITY
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
FREQUENCY
FREQUENCY
0.3
0.3
1.6
V = 3.8 V
I
V = 3.8 V
I
V = 3.8 V
I
1.4
1.2
1
I
O
= 200 mA
C
= 2.2 µF
C
= 10 µF
o
o
0.25
0.2
0.25
0.2
0.15
0.1
0.05
0
C
= 10 µF
C
= 0.1 µF
C
= 0.1 µF
(byp)
o
(byp)
C
= 0.001 µF
(byp)
C
= 0.0047 µF
(byp)
C
= 0.01 µF
I
= 1 mA
(byp)
0.15
O
0.8
0.6
0.4
0.2
0
I
O
= 1 mA
C
= 0.1 µF
(byp)
0.1
I
O
= 200 mA
I
= 200 mA
O
0.05
0
100
1 k
10 k
100 k
100
1 k
10 k
100 k
100
1 k
10 k
100 k
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 5
Figure 6
Figure 4
TPS79328
DROPOUT VOLTAGE
vs
ROOT MEAN SQUARED OUTPUT NOISE
vs
OUTPUT IMPEDANCE
vs
BYPASS CAPACITANCE
JUNCTION TEMPERATURE
FREQUENCY
180
160
140
120
100
80
60
2.5
V = 2.7 V
I
V = 3.8 V
V
= 2.8 V
I
O
C
= 10 µF
C
= 10 µF
= 25° C
o
I
O
= 200 mA
o
J
50
40
30
20
10
T
C
= 10 µF
o
2
I
O
= 200 mA
1.5
I
O
= 1 mA
1
60
I
O
= 100 mA
40
0.5
I
O
= 10 mA
20
BW = 100 Hz to 100 kHz
0.01
0
0
10
0
–40 –25–10
5
20 35 50 65 80 95 110 125
100
1 k
10 k 100 k 1 M
10 M
0.001
0.1
T
– Junction Temperature – °C
f – Frequency – Hz
C
– Bypass Capacitance – µF
J
(byp)
Figure 7
Figure 8
Figure 9
7
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
TYPICAL CHARACTERISTICS
TPS79328
RIPPLE REJECTION
vs
TPS79328
RIPPLE REJECTION
vs
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
FREQUENCY
FREQUENCY
100
90
80
70
60
50
40
30
100
90
80
70
60
50
40
30
20
100
90
V = 3.8 V
V = 3.8 V
I
I
I
O
= 200 mA
C
C
= 2.2 µF
C = 2.2 µF
o
o
= 0.01 µF
C
= 0.1 µF
(byp)
(byp)
I
O
= 200 mA
80
I
O
= 200 mA
70
60
50
40
30
I
O
= 10 mA
I
O
= 10 mA
I
= 10 mA
O
20
10
0
20
10
0
V = 3.8 V
= 10 µF
I
C
C
o
10
0
= 0.01 µF
(byp)
10
100
1 k
10 k 100 k 1 M 10 M
10
100
1 k
10 k 100 k 1 M 10 M
10
100
1 k
10 k 100 k 1 M 10 M
f – Frequency – Hz
f – Frequency – Hz
f – Frequency – Hz
Figure 10
Figure 11
Figure 12
TPS79328
OUTPUT VOLTAGE, ENABLE VOLTAGE
TPS79328
TPS79328
vs
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
TIME (START-UP)
V = 3.8 V
I
4.8
3.8
4
20
C
= 10 µF
o
2
0
V = 3.8 V
I
0
V
= 2.8 V
O
–20
I
C
T
= 200 mA
= 2.2 µF
= 25°C
O
o
J
I
O
= 200 mA
–40
300
200
100
C
C
= 2.2 µF
o
C
= 0.001 µF
(byp)
= 0.01 µF
dv
dt
0µ.4sV
(byp)
+
di
dt
0.02A
µs
20
0
3
2
1
0
+
C
= 0.0047 µF
= 0.01 µF
(byp)
1mA
-20
C
(byp)
0
0
50 100 150200 250 300 350 400 450 500
0
10 20 30 40 50 60 70 80 90 100
0
20 40 60 80 100 120 140 160 180 200
t – Time – µs
t – Time – µs
t – Time – µs
Figure 15
Figure 13
Figure 14
TPS79301
DROPOUT VOLTAGE
vs
DC DROPOUT VOLTAGE
vs
OUTPUT CURRENT
POWER UP / POWER DOWN
INPUT VOLTAGE
200
250
200
150
100
V
= 3 V
O
R
= 15 Ω
L
T
= 125°C
= 25°C
J
J
150
100
T
= 125°C
J
T
T
= 25°C
J
V
I
V
O
50
0
T
= –40°C
T
J
= –55°C
J
50
0
I
O
= 200 mA
3
1s/div
2.5
3.5
4
4.5
5
0
20 40 60 80 100 120 140 160 180 200
V – Input Voltage – V
I
I
O
– Output Current – mA
Figure 16
Figure 17
Figure 18
8
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
TYPICAL CHARACTERISTICS
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR) EQUIVALENT SERIES RESISTANCE (ESR)
TYPICAL REGIONS OF STABILITY
MINIMUM REQUIRED INPUT VOLTAGE
vs
vs
vs
OUTPUT VOLTAGE
OUTPUT CURRENT
OUTPUT CURRENT
4
100
10
100
10
I
O
= 200 mA
C
= 2.2 µF
o
C
= 10 µF
V = 5.5 V
T = –40°C to 125°C
J
o
T
= 125°C
V = 5.5 V, V ≥ 1.5 V
J
I
J
O
I
T
= –40°C to 125°C
T
= 25°C
J
Region of Instability
Region of Instability
T
= –40°C
J
3
1
1
2.8
0.1
0.1
Region of Stability
Region of Stability
2
0.01
0.01
1.5 1.75
2
2.25 2.5 2.75
3
3.25 3.5
0
0.02
0.04
0.06
0.08
0.2
0
0.02
0.04
0.06
0.08
0.2
V
– Output Voltage – V
I
O
– Output Current – A
O
I
O
– Output Current – A
Figure 19
Figure 20
Figure 21
9
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
APPLICATION INFORMATION
The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170 µA typically), and enable-input to reduce supply currents to less than 1 µA
when the regulator is turned off.
A typical application circuit is shown in Figure 22.
TPS793xx
1
V
I
IN
4
5
BYPASS
OUT
V
O
3
0.1 µF
0.01 µF
EN
+
2.2 µF
GND
2
Figure 22. Typical Application Circuit
external capacitor requirements
A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS793xx, is required for stability and will improve transient response, noise rejection, and ripple rejection. A
higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated
and the device is located several inches from the power source.
Like all low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2 µF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has a BYPASS pin
which is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor,
in conjunction with an external bypass capacitor connected to the BYPASS pin, creates a low pass filter to
reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator
to operate properly, the current flow out of the BYPASS pin must be at a minimum, because any leakage current
will create an IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor
must have minimal leakage current.
For example, the TPS79328 exhibits only 32 µV
of output voltage noise using a 0.1-µF ceramic bypass
RMS
capacitoranda2.2-µFceramicoutputcapacitor. Notethattheoutputstartsupslowerasthebypasscapacitance
increases due to the RC time constant at the BYPASS pin that is created by the internal 250-kΩ resistor and
external capacitor.
10
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
APPLICATION INFORMATION
board layout recommendation to improve PSRR and noise performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the
board be designed with separate ground planes for V and V
, with each ground plane connected only at
IN
OUT
the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly
to the GND pin of the device.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
, and the actual dissipation, P , which must be less than
D(max)
D
or equal to P
.
D(max)
The maximum-power-dissipation limit is determined using the following equation:
T max * T
J
A
P
+
(1)
D(max)
R
θJA
Where:
T max is the maximum allowable junction temperature.
J
R
is the thermal resistance junction-to-ambient for the package, see the dissipation rating table.
θJA
T is the ambient temperature.
A
The regulator dissipation is calculated using:
+ ǒVI * V
Ǔ
P
I
(2)
D
O
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the
thermal protection circuit.
programming the TPS79301 adjustable LDO regulator
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 23. The output voltage is calculated using:
R1
R2
ǒ1 )
Ǔ
(3)
V
+ V
O
ref
Where:
V
= 1.2246 V typ (the internal reference voltage)
ref
11
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TPS79301-EP, ’79318-EP, ’79325-EP
’79328-EP, ’793285-EP, ’79330-EP
TPS79333-EP, ’793475-EP
SGLS163 – APRIL 2003
APPLICATION INFORMATION
programming the TPS79301 adjustable LDO regulator (continued)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should
be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases V . The recommended
O
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and then
calculate R1 using:
V
O
R1 +
ǒ
* 1
Ǔ
R2
(4)
V
ref
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor
be placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages
>1.8 V, the approximate value of this capacitor can be calculated as:
–7
(3 x 10 ) x (R1 ) R2)
C1 +
(5)
(R1 x R2)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum
recommended output capacitor is 4.7 µF instead of 2.2 µF.
TPS79301
OUTPUT VOLTAGE
PROGRAMMING GUIDE
V
I
IN
1 µF
OUTPUT
R1
R2
C1
VOLTAGE
≥ 2 V
EN
OUT
V
O
C1
31.6 kΩ 30.1 kΩ 22 pF
51 kΩ 30.1 kΩ 15 pF
59 kΩ 30.1 kΩ 15 pF
2.5 V
3.3 V
3.6 V
R1
R2
≤ 0.7 V
1 µF
BYPASS FB
GND
0.01 µF
Figure 23. TPS79301 Adjustable LDO Regulator Programming
regulator protection
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might
be appropriate.
The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx
limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately 165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation
resumes.
12
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MECHANICAL DATA
MPDS018E – FEBRUARY 1996 – REVISED FEBRUARY 2002
DBV (R-PDSO-G5)
PLASTIC SMALL-OUTLINE
0,50
0,30
M
0,20
0,95
5
5X
4
0,15 NOM
1,70
1,50
3,00
2,60
1
3
Gage Plane
3,00
2,80
0,25
0°–8°
0,55
0,35
Seating Plane
0,10
1,45
0,95
0,05 MIN
4073253-4/G 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-178
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS026D – FEBRUARY 1997 – REVISED FEBRUARY 2002
DBV (R-PDSO-G6)
PLASTIC SMALL-OUTLINE
0,50
0,25
M
0,20
0,95
6
6X
4
0,15 NOM
1,70
1,50
3,00
2,60
1
3
Gage Plane
3,00
2,80
0,25
0°–8°
0,55
0,35
Seating Plane
0,10
1,45
0,95
0,05 MIN
4073253-5/G 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Leads 1, 2, 3 may be wider than leads 4, 5, 6 for package orientation.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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Copyright 2003, Texas Instruments Incorporated
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