TPS79425DGNRG4 [TI]
Ultralow-Noise, High-PSRR, Fast, 250-mA Low-Dropout Linear Regulators 8-MSOP-PowerPAD -40 to 85;
| 型号： | TPS79425DGNRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Ultralow-Noise, High-PSRR, Fast, 250-mA Low-Dropout Linear Regulators 8-MSOP-PowerPAD -40 to 85 信息通信管理 光电二极管 输出元件 调节器 |
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TPS794xx
www.ti.com
SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
ULTRALOW-NOISE, HIGH-PSRR, FAST, RF, 250-mA
LOW-DROPOUT LINEAR REGULATORS
FEATURES
DESCRIPTION
•
250-mA Low-Dropout Regulator With Enable
The TPS794xx family of low-dropout (LDO) linear
voltage regulators features high power-supply
rejection ratio (PSRR), ultralow-noise, fast start-up,
and excellent line and load transient responses in
small outline, MSOP-8 PowerPAD™ and SOT223-6
packages. Each device in the family is stable with a
small 2.2-µF ceramic capacitor on the output. The
family uses an advanced, proprietary BiCMOS
fabrication process to yield extremely low dropout
voltages (for example, 155 mV at 250 mA). Each
device achieves fast start-up times (approximately
50 µs with a 0.001-µF bypass capacitor) while
consuming low quiescent current (170 µA typical).
Moreover, when the device is placed in standby
mode, the supply current is reduced to less than
•
Available in Fixed and Adjustable (1.2 V to
5.5 V) Versions
•
•
•
•
•
•
High PSRR (60 dB at 10 kHz)
Ultralow Noise (32 µVrms, TPS79428)
Fast Start-Up Time (50 µs)
Stable With a 2.2-µF Ceramic Capacitor
Excellent Load/Line Transient Response
Very Low Dropout Voltage (155 mV at Full
Load)
•
Available in MSOP-8 and SOT223-6 Packages
APPLICATIONS
1
µA. The TPS79428 exhibits approximately
•
•
•
•
•
RF: VCOs, Receivers, ADCs
Audio
Bluetooth™, Wireless LAN
Cellular and Cordless Telephones
Handheld Organizers, PDAs
32 µVRMS of output voltage noise at 2.8 V output with
a 0.1-µF bypass capacitor. Applications with analog
components that are noise-sensitive, such as
portable RF electronics, benefit from the high PSRR
and low noise features as well as the fast response
time.
DGN PACKAGE
MSOP-8 PowerPADt
TPS79433
TPS79428
RIPPLE REJECTION
vs
OUTPUT SPECTRAL NOISE DENSITY
(TOP VIEW)
vs
1
2
3
4
OUT
NC
FB
8
7
6
5
IN
NC
EN
FREQUENCY
FREQUENCY
90
0.35
0.30
C
C
= 2.2 µF,
OUT
= 0.1 µF,
80
70
NR
GND
NR
= 3.8 V
I
= 10 mA
OUT
V
IN
NC − No internal connection
I
= 250 mA
OUT
0.25
0.20
60
50
40
30
20
10
0
I
= 250 mA
DCQ PACKAGE
SOT223-6
(TOP VIEW)
OUT
0.15
0.10
V
V
C
C
C
= 4.3 V,
1
IN
EN
IN
= 3.3 V,
= 1 µF,
= 10 µF,
OUT
2
IN
I
= 1 mA
OUT
6
0.05
0
3
4
GND
OUT
OUT
GND
= 0.01 µF
NR
100
1000
10000
100000
10
100
1 k
10 k 100 k 1 M 10 M
5
NR/FB
Frequency (Hz)
Frequency (Hz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2005, Texas Instruments Incorporated
TPS794xx
www.ti.com
SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION(1)
(2)
PRODUCT
VOUT
TPS794xxyyyz
XX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Output voltages from 1.3 V to 5.0 V in 100 mV increments are available; minimum order quantities may apply. Contact factory for details
and availability.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range unless otherwise noted(1)
VALUE
VIN range
–0.3 V to 6 V
–0.3 V to VIN + 0.3 V
–0.3 V to 6 V
VEN range
VOUT range
Peak output current
ESD rating, HBM
Internally limited
2 kV
ESD rating, CDM
500 V
Continuous total power dissipation
Junction temperature range, TJ
Storage temperature range, Tstg
See Dissipation Ratings Table
–40°C to +150°C
–65°C to +150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
AIR FLOW
(CFM)
RθJC
(°C/W)
RθJA
(°C/W)
TA≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
0
8.47
8.21
8.20
55.09
49.97
48.10
2.27 W
2.50 W
2.60 W
1.45 W
1.60 W
1.66 W
1.18 W
1.30 W
1.35 W
DGN
150
250
6
5
4
Condition 1
CONDITIONS PACKAGE
PCB AREA
θJA
3
2
1
0
2
SOT223
SOT223
4in Top Side Only
53°C/W
1
2
Condition 2
2
0.5in Top Side Only
110°C/W
0
25
50
75
100
125
150
T
A
(°C)
Figure 1. SOT223 Power Dissipation
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range (TJ = –40°C to 125°C), VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1mA,
COUT = 10µF, CNR = 0.01 µF, unless otherwise noted. Typical values are at 25°C.
PARAMETER
TEST CONDITIONS
MIN
2.7
TYP
MAX
5.5
UNIT
V
(1)
Input voltage, VIN
Continuous output current, IOUT
0
250
mA
V
Output voltage range
Output
TPS79401
1.225
5.5 – VDO
TPS79401(2)
0 µA ≤ IOUT ≤ 250 mA, VOUT + 1 V ≤ VIN ≤ 5.5 V(1) 0.97(VOUT
)
VOUT
1.03(VOUT
)
V
voltage
Accuracy
Fixed VOUT
0 µA ≤ IOUT ≤ 250 mA, VOUT + 1 V ≤ VIN ≤ 5.5 V(1)
VOUT + 1 V ≤ VIN ≤ 5.5 V
0 µA ≤ IOUT ≤ 250 mA
IOUT = 250 mA
–3.0
+3.0
0.12
%
(1)
Output voltage line regulation (∆VOUT%/∆VIN
)
0.05
10
%/V
mV
Load regulation (∆VOUT%/∆IOUT
)
TPS79428
TPS79430
TPS79433
155
155
145
925
170
0.07
210
210
200
Dropout voltage(3)
VIN = VOUT(nom)– 0.1 V
IOUT = 250 mA
mV
IOUT = 250 mA
Output current limit
Ground pin current
Shutdown current(4)
FB pin current
VOUT = 0 V
mA
µA
µA
µA
0 µA ≤ IOUT ≤ 250 mA
VEN = 0 V, 2.7 V ≤ VIN ≤ 5.5 V
VFB = 1.225 V
220
1
1
f = 100 Hz, IOUT = 250 mA
f = 10 kHz, IOUT = 250 mA
f = 100 kHz, IOUT = 250 mA
CNR = 0.001 µF
65
60
Power-supply ripple rejection
Output noise voltage
Time, start-up
TPS79428
TPS79428
TPS79428
dB
µVRMS
µs
40
55
CNR = 0.0047 µF
36
BW = 100 Hz to 100 kHz,
IOUT = 250 mA
CNR = 0.01 µF
33
CNR = 0.1 µF
32
CNR = 0.001 µF
50
RL = 14 Ω, COUT = 1 µF
CNR = 0.0047 µF
CNR = 0.01 µF
70
100
High-level enable input voltage
Low-level enable input voltage
EN pin current
2.7 V ≤ VIN ≤ 5.5 V
2.7 V ≤ VIN ≤ 5.5 V
VEN = 0
1.7
0
VIN
0.7
1
V
V
1
µA
V
UVLO threshold
VCC rising
2.25
2.65
UVLO hysteresis
100
mV
(1) Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater.
(2) Tolerance of external resistors not included in this specification.
(3) Dropout is not measured for the TPS79418 and TPS79425 since minimum VIN = 2.7 V.
(4) For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low.
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
OUT
IN
Current
Sense
UVLO
SHUTDOWN
ILIM
R
1
_
GND
EN
+
FB
UVLO
R
2
Thermal
Shutdown
Quickstart
External to
the Device
Bandgap
Reference
1.225 V
250 kΩ
V
ref
(1)
V
IN
NR
(1) Not Available on DCQ (SOT223) options.
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
OUT
IN
UVLO
Current
Sense
GND
EN
SHUTDOWN
ILIM
R
1
_
+
UVLO
Thermal
Shutdown
R
2
Quickstart
R = 40k
2
Bandgap
Reference
1.225 V
250 kΩ
V
ref
V
IN
NR
Terminal Functions
TERMINAL
DESCRIPTION
DGN
(MSOP)
DCQ
(SOT223)
NAME
NR
Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap, which
improves power-supply rejection and reduces output noise.
4
6
5
1
The EN terminal is an input that enables or shuts down the device. When EN is a logic high, the device
is enabled. When the device is a logic low, the device is in shutdown mode.
EN
FB
GND
IN
3
5, PAD
8
5
3, 6
2
Feedback input voltage for the adjustable device.
Regulator ground
Unregulated input to the device.
No internal connection.
NC
2, 7
1
OUT
4
Regulator output
4
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
TYPICAL CHARACTERISTICS
TPS79433
TPS79428
TPS79428
OUTPUT VOLTAGE
OUTPUT VOLTAGE
GROUND CURRENT
vs OUTPUT CURRENT
vs JUNCTION TEMPERATURE
vs JUNCTION TEMPERATURE
3.290
3.285
3.280
3.275
3.270
3.265
3.260
3.255
3.250
190
185
2.800
V
C
= 3.8 V,
IN
I
= 1 mA
OUT
= 10 µF
OUT
2.795
2.790
180
175
170
I
= 1 mA
OUT
V
C
= 3.8 V
IN
= 10 µF
OUT
2.785
2.780
I
= 250 mA
OUT
165
160
155
150
2.775
I
= 200 mA
OUT
2.770
2.765
−40 −25 −10 5 20 35 50 65 80 95 110 125
(°C)
−40 −25 −10
5
20 35 50 65 80 95 110 125
(°C)
0
50
100
(mA)
200
250
T
J
I
T
J
OUT
Figure 2.
Figure 3.
Figure 4.
TPS79428
TPS79428
TPS79428
OUTPUT SPECTRAL
NOISE DENSITY
vs FREQUENCY
OUTPUT SPECTRAL
NOISE DENSITY
vs FREQUENCY
OUTPUT SPECTRAL
NOISE DENSITY
vs FREQUENCY
0.35
0.30
0.25
0.20
1.8
1.6
1.4
1.2
0.35
0.30
C
I
= 10 µF,
= 250 mA
= 3.8 V
OUT
C
C
V
= 2.2 µF,
C
C
V
= 10 µF,
= 0.1 µF,
NR
= 3.8 V
OUT
= 0.1 µF,
OUT
OUT
NR
= 3.8 V
V
IN
IN
IN
C
= 0.001 µF
NR
0.25
0.20
C
= 0.0047 µF
= 0.01 µF
NR
1.0
0.8
0.6
0.4
I
= 250 mA
C
OUT
NR
I
= 1 mA
OUT
0.15
0.10
0.15
0.10
C
NR
= 0.1 µF
I
= 1 mA
I
= 250 mA
OUT
OUT
0.05
0
0.05
0
0.2
0
100
1000
10000
100000
100
1000
10000
100000
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Frequency (Hz)
Figure 5.
Figure 6.
Figure 7.
TPS79428
ROOT MEAN SQUARED
OUTPUT NOISE vs CNR
TPS79433
OUTPUT IMPEDANCE
vs FREQUENCY
TPS79428
DROPOUT VOLTAGE
vs JUNCTION TEMPERATURE
10
60
250
200
V
= 3.8 V,
V
C
= 4.3 V,
IN
IN
I
C
= 250 mA,
OUT
C
OUT
= 10 µF
= 10 µF,
OUT
= 10 µF
OUT
50
40
I
= 250 mA
OUT
I
= 1 mA
OUT
1
150
100
50
30
20
I
= 250 mA
0.100
0.020
OUT
10
0
I
= 1 mA
OUT
0
10
100
1 k
10 k 100 k 1 M 10 M
−40 −25 −10
5
20 35 50 65 80 95 110 125
(°C)
0.001
0.0047
0.01
0.1
C
(µF)
T
J
Frequency (Hz)
NR
Figure 8.
Figure 9.
Figure 10.
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
TYPICAL CHARACTERISTICS (continued)
TPS79433
RIPPLE REJECTION
vs FREQUENCY
TPS79433
RIPPLE REJECTION
vs FREQUENCY
TPS79433
RIPPLE REJECTION
vs FREQUENCY
90
90
90
I
= 10 mA
OUT
80
70
60
80
70
60
50
40
30
20
10
0
80
70
I
= 10 mA
I
I
= 10 mA
I
OUT
OUT
= 250 mA
= 250 mA
OUT
I
= 250 mA
OUT
OUT
60
50
40
30
20
10
0
50
40
30
20
10
0
V
V
C
C
C
= 4.3 V,
V
V
C
C
C
= 4.3 V,
= 3.3 V,
= 1 µF,
= 10 µF,
= 0.01 µF
IN
V
V
C
C
C
= 4.3 V,
IN
IN
= 3.3 V,
= 1 µF,
OUT
= 3.3 V,
= 1 µF,
= 2.2 µF,
OUT
OUT
IN
IN
IN
= 2.2 µF,
= 0.01 µF
OUT
OUT
OUT
NR
= 0.1 µF
NR
NR
10
100
1 k
10 k 100 k 1 M 10 M
10
100
1 k
10 k 100 k 1 M 10 M
10
100
1 k
10 k 100 k 1 M 10 M
Frequency (Hz)
Frequency (Hz)
Frequency (Hz)
Figure 11.
TPS79433
OUTPUT VOLTAGE,
ENABLE VOLTAGE
vs TIME (START-UP)
Figure 12.
Figure 13.
TPS79433
LOAD TRANSIENT
RESPONSE
TPS79433
LINE TRANSIENT
RESPONSE
6.0
5.5
I
C
= 250 mA,C
= 10 µF,
= 0.1 µF, dv/dt = 1 V/µs
V_Enable
OUT
OUT
250
0
4
2
0
NR
V
V
= 4.3 V,
IN
OUT
= 250 mA,
= 3.3 V,
5.0
4.5
10
0
I
OUT
C
= 2.2 µF
OUT
50
0
3
2
1
0
C
NR
= 0.0047 µF
−10
−20
−30
−50
di
dt
0.02A
ms
C
= 0.001 µF
NR
V
C
= 4.3 V,
IN
+
= 10 µF
OUT
0
30
60
90
120 150 180 210
0
100
200
300
400
500
0
80 160 240 320 400 480 560 640 720 800
Time (µs)
Time (µs)
Time (µs)
Figure 14.
Figure 15.
TPS79433
DROPOUT VOLTAGE
vs OUTPUT CURRENT
Figure 16.
TPS79401
DROPOUT VOLTAGE
vs INPUT VOLTAGE
TPS79425
POWER-UP/
POWER-DOWN
250
200
150
100
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
200
150
V
R
= 2.5 V,
T
= 125°C
OUT
= 10 Ω
A
T = 125°C
A
L
T
A
= 25°C
V
IN
T
A
= 25°C
V
OUT
100
50
0
T
A
= −40°C
T
A
= −40°C
C
OUT
= 10 µF,
50
0
C
NR
= 0.01 µF,
0
I
= 250 mA
OUT
−0.5
0
25 50 75 100 125 150 175 200 225 250
(mA)
2.5
3.0
3.5
4.5
0
1.4
2.8
4.2 5.6
7.0 8.4 9.8
4.0
5.0
I
V (V)
IN
t (ms)
OUT
Figure 17.
Figure 18.
Figure 19.
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
TYPICAL CHARACTERISTICS (continued)
TPS79428
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
(ESR)
TPS79428
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
(ESR)
vs OUTPUT CURRENT
vs OUTPUT CURRENT
100
100
C
T
A
= 2.2 µF
OUT
= −40 to 85°C
C
T
A
= 10 µF
OUT
= −40 to 85°C
10
Region of Instability
10
Region of Instability
1
0.1
1
0.1
Region of Stability
Region of Stability
0.01
0.01
0
25 50 75 100 125 150 175 200 225 250
(mA)
1
10 20 40 60 80 120 200 250
(mA)
I
I
OUT
OUT
Figure 20.
Figure 21.
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
APPLICATION INFORMATION
order for the regulator to operate properly, the
current flow out of the NR pin must be at a minimum,
because any leakage current creates an IR drop
across the internal resistor, thus creating an output
error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor
should be no more than 0.1-µF in order to ensure
that it is fully charged during the quickstart time
provided by the internal switch shown in the
Functional Block Diagram.
The TPS794xx family of low-dropout (LDO)
regulators has been optimized for use in
noise-sensitive equipment. The device features
extremely low dropout voltages, high PSRR, ultralow
output noise, low quiescent current (265 µA
typically), and an enable input to reduce supply
currents
to
less
than
1 µA when the regulator is turned off.
A typical application circuit is shown in Figure 22.
For example, the TPS79430 exhibits only 33 µVRMS
of output voltage noise using a 0.1-µF ceramic
VIN
VOUT
IN
OUT
TPS794xx
GND
bypass capacitor and
a 10-µF ceramic output
capacitor. Note that the output starts up slower as
the bypass capacitance increases because of the RC
time constant at the bypass pin that is created by the
internal 250-kΩ resistor and external capacitor.
µ
1 µF
2.2 F
EN
NR
µ
0.01 F
BOARD LAYOUT RECOMMENDATION TO
IMPROVE PSRR AND NOISE
PERFORMANCE
Figure 22. Typical Application Circuit
To improve ac measurements such as PSRR, output
noise, and transient response, it is recommended
that the board be designed with separate ground
planes for VIN and VOUT, with each ground plane
connected only at the ground pin of the device. In
addition, the ground connection for the bypass
capacitor should connect directly to the ground pin of
the device.
EXTERNAL CAPACITOR REQUIREMENTS
A 1-µF or larger ceramic input bypass capacitor,
connected between IN and GND and located close
to the TPS794xx, is required for stability and
improves transient response, noise rejection, and
ripple rejection. A higher-value input capacitor may
be necessary if large, fast-rise-time load transients
are anticipated and the device is located several
inches from the power source.
REGULATOR MOUNTING
The tab of the SOT223-6 package is electrically
connected to ground. For best thermal performance,
the tab of the surface-mount version should be
soldered directly to a circuit-board copper area.
Increasing the copper area improves heat
dissipation.
Like most low-dropout regulators, the TPS794xx
requires an output capacitor connected between
OUT and GND to stabilize the internal control loop.
The minimum recommended capacitance is 1 µF.
Any
1 µF or larger ceramic capacitor is suitable.
Solder pad footprint recommendations for the
devices are presented in Application Report
SBFA015, Solder Pad Recommendations for
Surface-Mount Devices, available from the TI web
site (www.ti.com).
The internal voltage reference is a key source of
noise in an LDO regulator. The TPS794xx has an
NR pin which is connected to the voltage reference
through a 250-kΩ internal resistor. The 250-kΩ
internal resistor, in conjunction with an external
bypass capacitor connected to the NR pin, creates a
low-pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. In
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
PROGRAMMING THE TPS79401
ADJUSTABLE LDO REGULATOR
In order to improve the stability of the adjustable
version, it is suggested that a small compensation
capacitor be placed between OUT and FB.
The output voltage of the TPS79401 adjustable
regulator is programmed using an external resistor
divider as shown in Figure 23. The output voltage is
calculated using Equation 1:
The approximate value of this capacitor can be
calculated as Equation 3:
(3 10*7) (R1 ) R2)
C1 +
(R1 R2)
R1
R2
(3)
ǒ Ǔ
1 )
VOUT + VREF
(1)
The suggested value of this capacitor for several
resistor ratios is shown in the table within Figure 23.
If this capacitor is not used (such as in a unity-gain
configuration), then the minimum recommended
output capacitor is 2.2 µF instead of 1 µF.
where:
•
VREF = 1.2246 V typ (the internal reference
voltage)
Resistors R1 and R2 should be chosen for
approximately 40-µA divider current. Lower value
resistors can be used for improved noise
performance, but the device wastes more power.
Higher values should be avoided, as leakage current
at FB increases the output voltage error.
REGULATOR PROTECTION
The TPS794xx PMOS-pass transistor has a built-in
back diode that conducts reverse current when the
input voltage drops below the output voltage (for
example, during power down). Current is conducted
from the output to the input and is not internally
limited. If extended reverse voltage operation is
anticipated, external limiting might be appropriate.
The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 40 µA,
C1 = 15 pF for stability, and then calculate R1 using
Equation 2:
The TPS794xx features internal current limiting and
thermal protection. During normal operation, the
TPS794xx limits output current to approximately
2.8 A. When current limiting engages, the output
voltage scales back linearly until the overcurrent
condition ends. While current limiting is designed to
prevent gross device failure, care should be taken
not to exceed the power dissipation ratings of the
package. If the temperature of the device exceeds
approximately 165°C, thermal-protection circuitry
shuts it down. Once the device has cooled down to
below approximately 140°C, regulator operation
resumes.
VOUT
ǒ Ǔ
R1 +
* 1 R2
VREF
(2)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VIN
VOUT
IN
OUT
FB
OUTPUT
TPS79401
µ
R
R
C
1
1
F
1
EN
VOLTAGE
R
1
R
2
C
1
µ
2.2
F
GND
1.8 V
14.0 kΩ
61.9 kΩ
30.1 kΩ
30.1 kΩ
22 pF
15 pF
2
3.6 V
Figure 23. TPS79401 Adjustable LDO Regulator Programming
9
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TPS794xx
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
THERMAL INFORMATION
The amount of heat that an LDO linear regulator
generates is directly proportional to the amount of
power it dissipates during operation. All integrated
T
J
A
R
θ
CIRCUIT BOARD COPPER AREA
JC
circuits have
a
maximum allowable junction
temperature (TJmax) above which normal operation
is not assured. A system designer must design the
operating environment so that the operating junction
temperature (TJ) does not exceed the maximum
junction temperature (TJmax). The two main
environmental variables that a designer can use to
improve thermal performance are air flow and
external heatsinks. The purpose of this information is
to aid the designer in determining the proper
operating environment for a linear regulator that is
operating at a specific power level.
C
T
B
C
B
A
R
R
θ
CS
C
θ
SA
SOT223 Package
T
A
In general, the maximum expected power (PDmax)
consumed by a linear regulator is computed as
shown in Equation 4:
Figure 24. Thermal Resistances
Equation 5 summarizes the computation:
ǒ
Ǔ
PD max + VIN(avg) * VOUT(avg) IOUT(avg) ) VI(avg) IQ
ǒ
θSAǓ
TJ + TA ) PD max RθJC ) RθCS ) R
(4)
(5)
where:
The RΘJC is specific to each regulator as determined
by its package, lead frame, and die size provided in
the regulator's data sheet. The RΘSA is a function of
the type and size of heatsink. For example, black
body radiator type heatsinks can have RΘCS values
ranging from 5°C/W for very large heatsinks to
50°C/W for very small heatsinks. The RΘCS is a
function of how the package is attached to the
heatsink. For example, if a thermal compound is
used to attach a heatsink to a SOT223 package,
RΘCS of 1°C/W is reasonable.
•
•
•
•
VIN(avg) is the average input voltage
VOUT(avg) is the average output voltage
IOUT(avg) is the average output current
IQ is the quiescent current
For most TI LDO regulators, the quiescent current is
insignificant compared to the average output current;
therefore, the term VIN(avg) x IQ can be neglected. The
operating junction temperature is computed by
adding the ambient temperature (TA) and the
increase in temperature due to the regulator's power
dissipation. The temperature rise is computed by
multiplying the maximum expected power dissipation
by the sum of the thermal resistances between the
junction and the case (RΘJC), the case to heatsink
(RΘCS), and the heatsink to ambient (RΘSA). Thermal
resistances are measures of how effectively an
object dissipates heat. Typically, the larger the
device, the more surface area available for power
dissipation and the lower the object's thermal
resistance.
Even if no external black body radiator type heatsink
is attached to the package, the board on which the
regulator is mounted provides some heatsinking
through the pin solder connections. Some packages,
like the DDPAK and SOT223 packages, use a
copper plane underneath the package or the circuit
board ground plane for additional heatsinking to
improve their thermal performance. Computer-aided
thermal modeling can be used to compute very
accurate approximations of an integrated circuit's
thermal
performance
in
different
operating
environments (for example, different types of circuit
boards, different types and sizes of heatsinks,
different air flows, etc.). Using these models, the
three thermal resistances can be combined into one
thermal resistance between junction and ambient
(RΘJA). This RΘJA is valid only for the specific
operating environment used in the computer model.
Figure 24 illustrates these thermal resistances for a
SOT223 package mounted in a JEDEC low-K board.
10
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TPS794xx
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SLVS349E–NOVEMBER 2001–REVISED DECEMBER 2005
Equation 5 simplifies into Equation 6:
TJ + TA ) PD max RθJA
applications. The SOT223 package dimensions are
provided in the Mechanical Data section at the end
of the data sheet. The addition of a copper plane
directly underneath the SOT223 package enhances
the thermal performance of the package.
(6)
(7)
Rearranging Equation 6 gives Equation 7:
TJ * TA
PD max
RθJA
+
To illustrate, the TPS79425 in a SOT223 package
was chosen. For this example, the average input
voltage is 3.3 V, the output voltage is 2.5 V, the
Using Equation 6 and the computer model generated
curves shown in Figure 25, a designer can quickly
average output current is
1
A, the ambient
compute
resistance/board area for
the
required
heatsink
thermal
temperature 55°C, no air flow is present, and the
operating environment is the same as documented
below. Neglecting the quiescent current, the
maximum average power is Equation 8:
a
given ambient
temperature, power dissipation, and operating
environment.
(
)
PD max + 3.3 * 2.5 V 1A + 800mW
(8)
180
Substituting TJmax for TJ into Equation 4 gives
Equation 9:
No Air Flow
160
140
120
100
80
R
θJA max + (125 * 55)°Cń800mW + 87.5°CńW
(9)
From Figure 25, RθJA vs PCB Copper Area, the
ground plane needs to be 0.55 in2 for the part to
dissipate 800 mW. The operating environment used
to construct Figure 25 consisted of a board with 1 oz.
copper planes. The package is soldered to a 1 oz.
copper pad on the top of the board. The pad is tied
through thermal vias to the 1 oz. ground plane.
60
40
20
0
0.1
From the data in Figure 25 and rearranging equation
6, the maximum power dissipation for a different
1
10
2
PCB Copper Area (in )
ground plane area and
a
specific ambient
temperature can be computed, as shown in
Figure 26.
Figure 25. SOT223 Thermal Resistance vs PCB
Copper Area
6
T
A
= 25°C
SOT223 POWER DISSIPATION
5
The SOT223 package provides an effective means
of managing power dissipation in surface-mount
4
3
2
1
0
2
4 in PCB Area
2
0.5 in PCB Area
0
25
50
75
100
125
150
T
A
− Ambient Temperature (°C)
Figure 26. SOT223 Maximum Power Dissipation
vs Ambient Temperature
11
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PACKAGE OPTION ADDENDUM
www.ti.com
12-Aug-2017
PACKAGING INFORMATION
Orderable Device
TPS79401DCQ
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOT-223
SOT-223
SOT-223
DCQ
6
6
6
8
8
8
8
6
6
8
8
8
8
6
6
6
8
78
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
PS79401
TPS79401DCQR
TPS79401DCQRG4
TPS79401DGNR
TPS79401DGNRG4
TPS79401DGNT
TPS79401DGNTG4
TPS79418DCQ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DCQ
DCQ
DGN
DGN
DGN
DGN
DCQ
DCQ
DGN
DGN
DGN
DGN
DCQ
DCQ
DCQ
DGN
2500
2500
2500
2500
250
Green (RoHS
& no Sb/Br)
PS79401
PS79401
AXL
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
AXL
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
AXL
MSOP-
PowerPAD
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
AXL
SOT-223
78
Green (RoHS
& no Sb/Br)
PS79418
PS79418
AXM
TPS79418DCQR
TPS79418DGNR
TPS79418DGNRG4
TPS79418DGNT
TPS79418DGNTG4
TPS79425DCQ
SOT-223
2500
2500
2500
250
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
AXM
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
AXM
MSOP-
PowerPAD
250
Green (RoHS
& no Sb/Br)
AXM
SOT-223
SOT-223
SOT-223
78
Green (RoHS
& no Sb/Br)
PS79425
PS79425
PS79425
AYB
TPS79425DCQG4
TPS79425DCQR
TPS79425DGNR
78
Green (RoHS
& no Sb/Br)
2500
2500
Green (RoHS
& no Sb/Br)
MSOP-
Green (RoHS
& no Sb/Br)
PowerPAD
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-Aug-2017
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
TPS79425DGNRG4
TPS79425DGNT
TPS79425DGNTG4
TPS79428DCQ
ACTIVE
MSOP-
PowerPAD
DGN
8
8
8
6
6
6
8
6
6
6
8
8
6
6
8
8
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
AYB
AYB
AYB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
MSOP-
PowerPAD
DGN
DGN
DCQ
DCQ
DCQ
DGN
DCQ
DCQ
DCQ
DGN
DGN
DCQ
DCQ
DGN
DGN
DGN
250
250
78
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
SOT-223
SOT-223
SOT-223
Green (RoHS
& no Sb/Br)
PS79428
PS79428
PS79428
AYC
TPS79428DCQG4
TPS79428DCQR
TPS79428DGNT
TPS79430DCQ
78
Green (RoHS
& no Sb/Br)
2500
250
78
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
SOT-223
SOT-223
SOT-223
Green (RoHS
& no Sb/Br)
PS79430
PS79430
PS79430
AYD
TPS79430DCQG4
TPS79430DCQR
TPS79430DGNR
TPS79430DGNT
TPS79433DCQ
78
Green (RoHS
& no Sb/Br)
2500
2500
250
78
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
AYD
SOT-223
Green (RoHS
& no Sb/Br)
PS79433
PS79433
AYE
TPS79433DCQR
TPS79433DGNR
TPS79433DGNRG4
TPS79433DGNT
SOT-223
2500
2500
2500
250
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
AYE
MSOP-
Green (RoHS
& no Sb/Br)
AYE
PowerPAD
(1) The marketing status values are defined as follows:
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
12-Aug-2017
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS79401DCQR
TPS79401DGNR
SOT-223 DCQ
6
8
2500
2500
330.0
330.0
12.4
12.4
7.1
5.3
7.45
3.4
1.88
1.4
8.0
8.0
12.0
12.0
Q3
Q1
MSOP-
Power
PAD
DGN
TPS79401DGNT
MSOP-
Power
PAD
DGN
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS79418DCQR
TPS79418DGNR
SOT-223 DCQ
6
8
2500
2500
330.0
330.0
12.4
12.4
7.1
5.3
7.45
3.4
1.88
1.4
8.0
8.0
12.0
12.0
Q3
Q1
MSOP-
Power
PAD
DGN
TPS79418DGNT
MSOP-
Power
PAD
DGN
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS79425DCQR
TPS79425DGNR
SOT-223 DCQ
6
8
2500
2500
330.0
330.0
12.4
12.4
7.1
5.3
7.45
3.4
1.88
1.4
8.0
8.0
12.0
12.0
Q3
Q1
MSOP-
Power
PAD
DGN
TPS79425DGNT
TPS79428DCQR
MSOP-
Power
PAD
DGN
8
6
250
180.0
330.0
12.4
12.4
5.3
7.1
3.4
1.4
8.0
8.0
12.0
12.0
Q1
Q3
SOT-223 DCQ
2500
7.45
1.88
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS79428DGNT
MSOP-
Power
PAD
DGN
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS79430DCQR
TPS79430DGNR
SOT-223 DCQ
6
8
2500
2500
330.0
330.0
12.4
12.4
7.1
5.3
7.45
3.4
1.88
1.4
8.0
8.0
12.0
12.0
Q3
Q1
MSOP-
Power
PAD
DGN
TPS79430DGNT
MSOP-
Power
PAD
DGN
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS79433DCQR
TPS79433DGNR
SOT-223 DCQ
6
8
2500
2500
330.0
330.0
12.4
12.4
7.1
5.3
7.45
3.4
1.88
1.4
8.0
8.0
12.0
12.0
Q3
Q1
MSOP-
Power
PAD
DGN
TPS79433DGNT
MSOP-
Power
PAD
DGN
8
250
180.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS79401DCQR
TPS79401DGNR
TPS79401DGNT
SOT-223
DCQ
DGN
DGN
6
8
8
2500
2500
250
346.0
367.0
210.0
346.0
367.0
185.0
29.0
35.0
35.0
MSOP-PowerPAD
MSOP-PowerPAD
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS79418DCQR
TPS79418DGNR
TPS79418DGNT
TPS79425DCQR
TPS79425DGNR
TPS79425DGNT
TPS79428DCQR
TPS79428DGNT
TPS79430DCQR
TPS79430DGNR
TPS79430DGNT
TPS79433DCQR
TPS79433DGNR
TPS79433DGNT
SOT-223
DCQ
DGN
DGN
DCQ
DGN
DGN
DCQ
DGN
DCQ
DGN
DGN
DCQ
DGN
DGN
6
8
8
6
8
8
6
8
6
8
8
6
8
8
2500
2500
250
346.0
367.0
210.0
346.0
367.0
210.0
358.0
210.0
346.0
367.0
210.0
346.0
367.0
210.0
346.0
367.0
185.0
346.0
367.0
185.0
335.0
185.0
346.0
367.0
185.0
346.0
367.0
185.0
41.0
35.0
35.0
41.0
35.0
35.0
35.0
35.0
29.0
35.0
35.0
29.0
35.0
35.0
MSOP-PowerPAD
MSOP-PowerPAD
SOT-223
2500
2500
250
MSOP-PowerPAD
MSOP-PowerPAD
SOT-223
2500
250
MSOP-PowerPAD
SOT-223
2500
2500
250
MSOP-PowerPAD
MSOP-PowerPAD
SOT-223
2500
2500
250
MSOP-PowerPAD
MSOP-PowerPAD
Pack Materials-Page 3
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
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