TPS7A26 [TI]

具有电源正常指示功能的 500mA、18V、超低 IQ、高精度、可调节低压降稳压器;


型号：	TPS7A26
厂家：	TEXAS INSTRUMENTS
描述：	具有电源正常指示功能的 500mA、18V、超低 IQ、高精度、可调节低压降稳压器稳压器
文件：	总33页 (文件大小：3477K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Support &

Community

Product

Folder

Order

Now

Tools &

Software

Technical

Documents

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

具有电源正常状态指示功能的 TPS7A26 500mA、18V、超低 I_Q、低压降线

性稳压器

1 特性

3 说明

•

超低 I_Q：2.0µA

TPS7A26 低压降 (LDO) 线性稳压器支持 2.4V 至 18V

输入电压范围，并具有极低的静态电流 (I_Q)。这些特

性能更好地帮助现代电器满足日益严苛的能源要求，

并有助于延长便携式电源解决方案的电池寿命。

输入电压：2.4V 至 18V

可用输出电压选项：

–

固定电压：1.25V 至 5.5V

可调节：1.24V 至 17.4V

TPS7A26 有固定电压和可调节电压两种版本可供选

用。为了获得更大的灵活性或更高的输出电压，可调节

电压版本使用反馈电阻器将输出电压从 1.24V 设置到

17.4V。两种版本都具有 1% 的输出调节精度，可对微

控制器 (MCU) 基准电压进行精密调节。

•

在温度范围内的精度为 1%

低压降：电流 500mA 时为 590mV（最大值）

开漏电源正常状态输出

主动过冲下拉保护

热关断保护和过流保护

凭借开漏电源正常状态 (PG) 输出，该器件可为 MCU

提供复位，或者与其他开漏 PG 进行线或 (wire-OR) 和

电平转换，从而提供系统范围的 PG 或复位。

工作结温范围：–40°C 至 +125°C

与 1µF 输出电容器一起工作时保持稳定

封装：6 引脚 WSON

在电流为 500mA 时，TPS7A26 LDO 拥有小于

590mV 的最大压降，因此它比标准线性稳压器的工作

效率更高。该最大压降电压使得器件可从 5.7V 输入电

压 (V_IN)

2 应用

•

家庭和楼宇自动化

多电池移动电源

智能电网和计量

便携式电动工具

电机驱动器

获得 5.0V 输出电压 (V_OUT)，实现 87.7% 的效率。

对于低功耗应用，请考虑使用 TPS7A25。

器件信息⁽¹⁾

白色家电

便携式电器

器件型号

TPS7A26

封装

WSON (6)

封装尺寸（标称值）

2.00mm × 2.00mm

(1) 如需了解所有可用封装，请参阅产品说明书末尾的封装选项附

录。

典型应用电路

V_PG

R_PG

OUT

V_IN

V_OUT

TPS7A26

R₁

C_OUT

C_IN

GND

R₂

本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确

性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SBVS290

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Pin Configuration and Functions......................... 3

Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 6

Detailed Description ............................................ 12

7.1 Overview ................................................................. 12

7.2 Functional Block Diagram ....................................... 12

7.3 Feature Description................................................. 13

7.4 Device Functional Modes........................................ 16

Application and Implementation ........................ 17

8.1 Application Information............................................ 17

8.2 Typical Application .................................................. 20

Power Supply Recommendations...................... 23

10 Layout................................................................... 23

10.1 Layout Guidelines ................................................. 23

10.2 Layout Examples................................................... 23

11 器件和文档支持 ..................................................... 24

11.1 器件支持................................................................ 24

11.2 文档支持................................................................ 24

11.3 接收文档更新通知 ................................................. 24

11.4 社区资源................................................................ 24

11.5 商标....................................................................... 24

11.6 静电放电警告......................................................... 24

11.7 Glossary................................................................ 24

12 机械、封装和可订购信息....................................... 24

4 修订历史记录

Changes from Revision A (March 2019) to Revision B

Page

•

已添加在文档中添加了固定电压版本 ..................................................................................................................................... 1

已更改将可调节电压版本输出电压从 0.24V 至 17.45V 更改为 1.24V 至 17.4V.................................................................... 1

已删除删除了固定电压版本说明，目标位置说明部分......................................................................................................... 1

已添加添加了 TPS7A25 参考，目标位置：说明部分 ........................................................................................................... 1

已添加 Active to Overshoot Pulldown Circuitry title ............................................................................................................. 15

Changes from Original (December 2019) to Revision A

Page

•

已更改将状态从“预告信息”更改为“生产数据” ......................................................................................................................... 1

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

5 Pin Configuration and Functions

TPS7A26: DRV Package (Adjustable)

6-Pin WSON

TPS7A26: DRV Package (Fixed)

6-Pin WSON

Top View

OUT

Thermal

Pad

Thermal

Pad

GND

Not to scale

Pin Functions

I/O

DESCRIPTION

DRV

(Adjustable)

DRV

(Fixed)

NAME

Enable pin. Drive EN greater than V_EN(HI)to enable the regulator. Drive EN

less than V_EN(LOW)to put the regulator into low-current shutdown. Do not float

this pin. If not used, connect EN to IN.

Input

Feedback pin. Input to the control-loop error amplifier. This pin is used to set

the output voltage of the device with the use of external resistors. For

adjustable-voltage version devices only.

—

Input

—

GND

Ground pin.

Input pin. For best transient response and to minimize input impedance, use

the recommended value or larger capacitor from IN to ground as listed in the

Recommended Operating Conditions table. Place the input capacitor as

close to the IN and GND pins of the device as possible.

Input

—

No internal connection. For fixed-voltage version devices only. Ths pin can

be floated but the device has better thermal performance with this pin tied to

GND.

—

Output pin. A capacitor is required from OUT to ground for stability. For best

transient response, use the nominal recommended value or larger capacitor

from OUT to ground. Follow the recommended capacitor value as listed in

the Recommended Operating Conditions table. Place the output capacitor as

close to the OUT and GND pins of the device as possible.

OUT

Output

Power-good pin; open-collector output. Pullup this pin externally to the OUT

pin or another voltage rail. The PG pin goes high when V_OUT> V_{IT(PG,RISING)}

as discussed in the Electrical Characteristics table. The PG pin is driven low

when V_OUT< V_{IT(PG,FALLING)}, as discussed in the Electrical Characteristics

table. Ths pin can be floated but the device has better thermal performance

with this pin tied to GND.

Output

—

Exposed pad of the package. Connect this pad to ground or leave floating.

Connect the thermal pad to a large-area ground plane for best thermal

performance.

Thermal pad

Pad

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

–0.3

MAX

UNIT

V_IN

(3)

V_OUT

–0.3

V_IN+ 0.3

5.5

Voltage⁽²⁾

V_FB

–0.3

V_EN

–0.3

V_PG

–0.3

Current

Maximum output

Operating junction, T_J

Storage, T_stg

Internally limited

–50

150

Temperature

°C

–65

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages with respect to GND.

(3) V_IN+ 0.3 V or 20 V (whichever is smaller).

6.2 ESD Ratings

VALUE

±1500

±1000

UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

Charged device model (CDM), per JEDEC specification JESD22-C101⁽²⁾

V_(ESD)

Electrostatic discharge

(1) JEDEC document JEP155 states that 2-kV HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN

2.4

1.24

1.25

NOM

MAX

UNIT

V_IN

Input voltage

18-V_DO

5.5

V_OUT

I_OUT

V_EN

Output voltage (adjustable version)

Output voltage (fixed version)

Output current

500

Enable voltage

(1)

V_PG

Power-good voltage

Input capacitor

(2)

C_IN

C_OUT

T_J

μF

°C

(2)

Output capacitor

2.2

100

125

Operating junction temperature

–40

(1) Select pullup resistor to limit PG pin sink current when PG output is driven low. See Power Good section for details.

(2) All capacitor values are assumed to derate to 50% of the nominal capacitor value.

6.4 Thermal Information

TPS7A26

THERMAL METRIC⁽¹⁾

DRV (WSON)

6 PINS

73.3

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

90.6

38.3

Ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

3.7

Ψ_JB

38.4

R_θJC(bot)

14.3

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

6.5 Electrical Characteristics

specified at T_J= –40°C to +125°C, V_IN= V_OUT(nom)+ 0.8 V or V_IN= 2.4 V (whichever is greater), FB tied to OUT, I_OUT= 1 mA,

V_EN= 2 V, and C_IN= 1 μF, C_OUT= 2.2 μF (unless otherwise noted); typical values are at T_J= 25°C

PARAMETER

TEST CONDITIONS

MIN

TYP

2.15

MAX

UNIT

V_UVLO(RISING)

V_UVLO(HYS)

V_{UVLO(FALLING)}

V_FB

UVLO threshold rising

UVLO hysteresis

V_INrising

V_INfalling

1.95

2.35

UVLO threshold falling

Feedback voltage

Output voltage accuracy

Output voltage

1.85

2.09

1.24

2.25

Adjustable version only

V_OUT

Adjustable version, V_OUT= V_FB

1.228

–1

1.252

V_OUT

accuracyaccuracy for fixed Fixed output versions

output options

ΔV_OUT(ΔVIN)

Line regulation⁽¹⁾

(V_OUT(nom)+ 0.8 V or 2.4 V) ≤ V_IN≤ 18 V

–0.1

–0.5

0.1

0.5

ΔV_OUT(ΔIOUT)

Load regulation

1 mA ≤ I_OUT≤ 500 mA

I_OUT= 100 mA

173

355

717

145

280

590

970

4.5

V_DO

Dropout voltage⁽²⁾

I_OUT= 250 mA

I_OUT= 500 mA

I_CL

Output current limit

Ground pin current

V_OUT= 0.9 × V_OUT(nom)

I_OUT= 0 mA

525

µA

I_GND

I_OUT= 1 mA

I_SHUTDOWN

Shutdown current

FB pin current

EN pin current

_EN≤ 0.4 V, V_IN= 2.4 V, I_out= 0 mA

325

600

I_FB

I_EN

V_EN= 18 V

Enable pin high-level input

voltage

V_EN(HI)

Device enabled

0.9

Enable pin low-level input

voltage

V_EN(LOW)

Device disabled

0.4

R_PULLUP= 10 kΩ, V_OUTrising,

V_IN≥ V_UVLO(RISING)

V_{IT(PG,RISING)}

V_HYS(PG)

PG pin threshold rising

PG pin hysteresis

96.5

%V_OUT

R_PULLUP= 10 kΩ, V_OUTfalling,

V_IN≥ V_UVLO(RISING)

R_PULLUP= 10 kΩ, V_OUTfalling,

V_IN≥ V_UVLO(RISING)

V_{IT(PG,FALLING)}

PG pin threshold falling

PG pin low level output

voltage

V_OL(PG)

I_LKG(PG)

V_OUT< V_{IT(PG,FALLING)}, I_PG-SINK= 500 µA

0.4

PG pin leakage current

V_OUT> V_{IT(PG,RISING)}, V_PG= 18 V

f = 10 Hz

300

PSRR

Power-supply rejection ratio f = 100 Hz

f = 1 kHz

V_n

Output noise voltage

BW = 10 Hz to 100 kHz, V_OUT= 1.2 V

300

μV_RMS

Thermal shutdown

temperature

T_SD(shutdown)

Shutdown, temperature increasing

Reset, temperature decreasing

165

145

°C

Thermal shutdown reset

temperature

T_SD(reset)

°C

(1) V_out(nom)+ 0.8 V or 2.4 V (whichever is greater).

(2) V_DOis measured with V_IN= 0.97 × V_OUT(nom)for fixed output voltage versions. V_DOis not measured for fixed output voltage versions

when V_OUT≤ 2.5 V. For the adjustable output device, V_DOis measured with V_FB= 0.97 × V_FB(nom).

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

6.6 Typical Characteristics

at operating temperature T_J= 25°C, I_OUT= 1 mA, V_EN= 0.9 V, C_IN= 2.2 µF, C_OUT= 2.2 μF, and V_IN= V_OUT(typ)+ 0.8 V or 2.4 V

(whichever is greater), unless otherwise noted; typical values are at T_J= 25°C

0.8

0.6

0.4

0.2

0.6

0.4

0.2

-50èC

-40èC

0èC

25èC

-50èC

-40èC

0èC

25èC

85èC

125èC

150èC

85èC

125èC

150èC

-0.2

-0.4

-0.6

-0.8

-1

-0.2

-0.4

-0.6

Input Voltage (V)

0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

Output Current (A)

D002

D008

I_OUT= 1 mA

V_OUT= 1.24 V

图 1. Line Regulation vs V_IN

图 2. Load Regulation vs I_OUT

250

200

150

100

400

350

300

250

200

150

100

-50èC

-40èC

0èC

-50èC

-40èC

0èC

85èC

125èC

150èC

85èC

125èC

150èC

25èC

8 10

Input Voltage (V)

D017

D016

I_OUT= 100 mA

I_OUT= 250 mA

图 3. Dropout Voltage vs V_IN

图 4. Dropout Voltage vs V_IN

800

700

600

500

400

300

200

100

600

500

400

300

200

100

-50èC

-40èC

0èC

25èC

85èC

125èC

150èC

-50èC

-40èC

0èC

85èC

125èC

150èC

25èC

8 10

Input Voltage (V)

0.1

0.2 0.3

Output Current (A)

0.4

0.5

D015

D013

I_OUT= 500 mA

图 5. Dropout Voltage vs V_IN

V_IN= 2.4 V

图 6. Dropout Voltage vs I_OUT

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

Typical Characteristics (接下页)

at operating temperature T_J= 25°C, I_OUT= 1 mA, V_EN= 0.9 V, C_IN= 2.2 µF, C_OUT= 2.2 μF, and V_IN= V_OUT(typ)+ 0.8 V or 2.4 V

(whichever is greater), unless otherwise noted; typical values are at T_J= 25°C

600

500

400

300

200

100

0.9

0.8

0.7

0.6

-50èC

-40èC

0èC

25èC

85èC

125èC

150èC

-50èC

-40èC

0èC

25èC

85èC

125èC

150èC

0.1

0.2 0.3

Output Current (A)

0.4

0.5

Input Voltage (V)

D012

V_IN= 18 V

图 7. Dropout Voltage vs I_OUT

图 8. Current Limit vs V_IN

-50èC

-40èC

0èC

-50èC

-40èC

0èC

85èC

125èC

150èC

85èC

125èC

150èC

25èC

Input Voltage (V)

D005

V_OUT= 1.24 V, I_OUT= 0 A

V_OUT= 1.24 V, I_OUT= 1 mA

图 10. I_Qvs V_IN

图 9. I_GNDvs V_IN

240

-50èC

-40èC

0èC

25èC

85èC

125èC

150èC

220

200

180

160

140

120

100

-50èC

-40èC

0èC

25èC

85èC

125èC

150èC

0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

Output Current (A)

0.5

1.5

2.5

Input Voltage (V)

3.5

D006

V_OUT= 1.24 V

V_OUT= 1.24 V, I_OUT= 0 A

图 12. I_GNDvs I_OUT

图 11. I_Qvs V_IN

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

Typical Characteristics (接下页)

at operating temperature T_J= 25°C, I_OUT= 1 mA, V_EN= 0.9 V, C_IN= 2.2 µF, C_OUT= 2.2 μF, and V_IN= V_OUT(typ)+ 0.8 V or 2.4 V

(whichever is greater), unless otherwise noted; typical values are at T_J= 25°C

2.5

0.8

0.7

0.6

0.5

0.4

-50èC

-40èC

0èC

25èC

V_EN(LOW)

V_EN(HIGH)

85èC

125èC

150èC

1.5

0.5

-0.5

8 10

Input Voltage (V)

-50

-25

100

125

150

Temperature (èC)

V_OUT= 1.24 V

V_OUT= 1.24 V, 2.4 V ≤ V _IN≤ 18 V

图 14. V_ENvs Temperature

图 13. Shutdown Current vs V_IN

100

2.3

V_{IT(PG,FALLING)}

V_{IT(PG,RISING)}

V_UVLO-(V_INFalling)

V_UVLO+(V_INRising)

2.2

2.1

1.9

-50

-25

100

125

150

-50

-25

100

125

150

Temperature (èC)

V_OUT= 1.24 V, I_OUT= 1 mA

图 15. UVLO Thresholds vs Temperature

V_OUT= 1.24 V

图 16. PG Thresholds vs Temperature

200

150

100

I_OUT

10 mA

100 mA

200 mA

300 mA

500 mA

I_LKG(PG)

125 150

-50

-25

100

10k

Frequency (Hz)

100k

10M

Temperature (èC)

V_OUT= 1.24 V

V_OUT= 1.24 V, C_IN= 0 μF, C_OUT= 1 μF

图 18. PSRR vs Frequency and I_OUT

图 17. PG Leakage Current vs Temperature

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

Typical Characteristics (接下页)

at operating temperature T_J= 25°C, I_OUT= 1 mA, V_EN= 0.9 V, C_IN= 2.2 µF, C_OUT= 2.2 μF, and V_IN= V_OUT(typ)+ 0.8 V or 2.4 V

(whichever is greater), unless otherwise noted; typical values are at T_J= 25°C

100

V_IN

3.8 V

4.0 V

4.3 V

I_OUT

10 mA

100 mA

200 mA

300 mA

500 mA

100

10k

Frequency (Hz)

100k

10M

100

10k

Frequency (Hz)

100k

10M

V_OUT= 3.3 V, V_IN= 4.3 V,

V_OUT= 3.3 V, I_OUT= 0.5 A,

C_IN= 0 μF, C_OUT= 1 μF, C_FF= 10 nF

图 19. PSRR vs Frequency and I_OUT

图 20. PSRR vs Frequency and V_IN

100

C_OUT

1 uF

10 uF

47 uF

C_FF

1 nF

10 nF

100 nF

100

10k

Frequency (Hz)

100k

10M

100

10k

Frequency (Hz)

100k

10M

V_OUT= 3.3 V, V_IN= 4.3 V, I_OUT= 0.5 A,

C_IN= 0 μF, C_FF= 10 nF

C_IN= 0 μF, C_OUT= 1 μF

图 21. PSRR vs Frequency and C_OUT

图 22. PSRR vs Frequency and C_FF

100

V_OUT

1.24 V

3.3 V

5 V

0.5

0.2

0.1

0.05

V_OUT

1.24 V, RMS Noise = 292.7 mV_RMS

3.3 V, RMS Noise = 297.7 mV_RMS

5 V, RMS Noise = 341.9 mV_RMS

0.02

0.01

0.005

100

10k

Frequency (Hz)

100k

10M

100

10k

Frequency (Hz)

100k

10M

V_IN= V_OUT+ 1 V or 2.4 V (whichever is greater), I_OUT= 0.5 A,

V_IN= V_OUT+ 1 V or 2.4 V (whichever is greater),

I_OUT= 0.5 A, C_IN= 1 μF, C_OUT= 1 μF, C_FF= 10 nF,

V_RMSBW = 10 Hz to 100 kHz

C_IN= 0 μF, C_OUT= 1 μF, C_FF= 10 nF

图 24. Output Noise (V_n) vs Frequency and V_OUT

图 23. PSRR vs Frequency and V_OUT

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

Typical Characteristics (接下页)

at operating temperature T_J= 25°C, I_OUT= 1 mA, V_EN= 0.9 V, C_IN= 2.2 µF, C_OUT= 2.2 μF, and V_IN= V_OUT(typ)+ 0.8 V or 2.4 V

(whichever is greater), unless otherwise noted; typical values are at T_J= 25°C

0.5

0.2

0.1

0.2

0.1

I_OUT

0.05

0.01A, RMS Noise = 280.2 mV_RMS

0.1A, RMS Noise = 283.2 mV_RMS

0.2 A, RMS Noise = 285.2 mV_RMS

0.3 A RMS Noise = 281.8 mV_RMS

0.5 A RMS Noise = 292.7 mV_RMS

C_OUT

0.02

0.01

0.02

0.01

1 mF, RMS Noise = 292.7 mV_RMS

10 mF, RMS Noise = 325.0 mV_RMS

100 mF, RMS Noise = 275.2 mV_RMS

0.005

100

10k

Frequency (Hz)

100k

10M

100

10k

Frequency (Hz)

100k

10M

V_OUT= 1.24 V, C_IN= 1 μF, C_OUT= 1 μF, C_FF= 10 nF,

V_OUT= 1.24 V, I_OUT= 0.5 A, C_IN= 1 μF, C_FF= 10 nF,

V_RMSBW = 10 Hz to 100 kHz

图 25. Output Noise (V_n) vs Frequency and I_OUT

图 26. Output Noise (V_n) vs Frequency and C_OUT

200

1.8

1.6

1.4

1.2

100

-100

-200

-300

-400

-500

-600

-700

-800

-900

-1000

0.5

0.8

0.6

0.4

0.2

0.1

0.05

C_FF

0 nF, RMS Noise = 411.0 mV_RMS

10 nF, RMS Noise = 290.4 mV_RMS

100 nF, RMS Noise = 244.7 mV_RMS

0.02

0.01

I_OUT

V_OUT

-0.2

-0.4

0.005

100

10k

Frequency (Hz)

100k

10M

-100

100

200 300

Time (µsec)

400

500

600

V_OUT= 3.3 V, V_IN= 4.3 V, I_OUT= 0.5 A, C_IN= 1 μF, C_OUT= 1 μF,

I_OUT= 0.001 A to 0.5 A, slew rate = 0.5 A/μs,

V_OUT= 3.3 V, V_IN= 4.3 V, C_IN= 1 μF, C_OUT= 1 μF

V_RMSBW = 10 Hz to 100 kHz

图 27. Output Noise (V_n) vs Frequency and C_FF

图 28. Load Transient

1.8

1.6

1.4

1.2

750

600

450

300

150

I_OUT

V_OUT

-10

-20

-30

-40

-50

-60

-70

-80

0.8

0.6

0.4

0.2

-150

-300

-450

-600

-750

-900

-1050

V_OUT

V_IN

-0.2

-0.4

1000

-400

-200

200 400

Time (µsec)

600

800

-100

100

200 300

Time (µsec)

400

500

600

V_IN= 5.3 V to 4.3 V, slew rate = 0.5 V/μs, V_OUT= 3.3 V,

I_OUT= 0.5 A, C_IN= 1 μF, C_OUT= 1 μF

I_OUT= 0.5 A to 0.001 A, slew rate = 0.5 A/μs,

V_OUT= 3.3 V, V_IN= 4.3 V, C_IN= 1 μF, C_OUT= 1 μF

图 30. Line Transient

图 29. Load Transient

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

Typical Characteristics (接下页)

at operating temperature T_J= 25°C, I_OUT= 1 mA, V_EN= 0.9 V, C_IN= 2.2 µF, C_OUT= 2.2 μF, and V_IN= V_OUT(typ)+ 0.8 V or 2.4 V

(whichever is greater), unless otherwise noted; typical values are at T_J= 25°C

V_IN

V_EN

V_OUT

-10

-20

-30

-40

-50

-60

-70

-80

V_OUT

V_IN

-450 -300 -150

150 300 450 600 750 900 1050

Time (µsec)

-1

-100

100 200 300 400 500 600 700 800 900

Time (msec)

V_IN= 4.3 V to 5.3 V, slew rate = 0.5 V/μs, V_OUT= 3.3 V,

I_OUT= 0.5 A, C_IN= 1 μF, C_OUT= 1 μF

V_EN= 0 V to 2 V, V_OUT= 3.3 V, I_OUT= 0.5 A,

C_IN= 1 μF, C_OUT= 1 μF

图 32. Start-Up With Enable

图 31. Line Transient

V_IN

V_OUT

-1

-2

-200

200

400

600

800

1000

1200

Time (msec)

V_IN= 0 V to 5 V, V_EN= V_IN, V_OUT= 3.3 V, I_OUT= 0.5 A,

C_IN= 1 μF, C_OUT= 1 μF

图 33. Start-Up With Enable Pin Tied to Input

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

7 Detailed Description

7.1 Overview

The TPS7A26 is an 18-V, low quiescent current, low-dropout (LDO) linear regulator. The low I_Qperformance

makes the TPS7A26 an excellent choice for battery-powered or line-power applications that are expected to

meet increasingly stringent standby-power standards.

The 1% accuracy over temperature and power-good indication make this device an excellent choice for meeting

a wide range of microcontroller power requirements.

For increased reliability, the TPS7A26 also incorporates overcurrent, overshoot pulldown, and thermal shutdown

protection. The operating junction temperature is –40°C to +125°C, and adds margin for applications concerned

with higher working ambient temperatures.

The TPS7A26 is available in a thermally enhanced WSON package.

7.2 Functional Block Diagram

TPS7A2601

(Adjustable Version)

OUT

Current

Limit

Thermal

Shutdown

UVLO

Band-Gap

Reference

GND

Logic

Reference

图 34. Adjustable Version

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

Functional Block Diagram (continued)

TPS7A26

(Fixed Version)

OUT

Current

Limit

Thermal

Shutdown

R₁

UVLO

R₂

Band-Gap

Reference

GND

Logic

Reference

图 35. Fixed Version

7.3 Feature Description

7.3.1 Output Enable

The enable pin for the device is an active-high pin. The output voltage is enabled when the voltage of the enable

pin is greater than the high-level input voltage of the EN pin and disabled with the enable pin voltage is less than

the low-level input voltage of the EN pin. If independent control of the output voltage is not needed, connect the

enable pin to the input of the device.

7.3.2 Dropout Voltage

Dropout voltage (V_DO) is defined as the input voltage minus the output voltage (V_IN– V_OUT) at the rated output

current (I_RATED), where the pass transistor is fully on. I_RATEDis the maximum I_OUTlisted in the Recommended

Operating Conditions table. The pass transistor is in the ohmic or triode region of operation, and acts as a switch.

The dropout voltage indirectly specifies a minimum input voltage greater than the nominal programmed output

voltage at which the output voltage is expected to stay in regulation. If the input voltage falls to less than the

nominal output regulation, then the output voltage falls as well.

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

Feature Description (continued)

For a CMOS regulator, the dropout voltage is determined by the drain-source on-state resistance (R_DS(ON)) of the

pass transistor. Therefore, if the linear regulator operates at less than the rated current, the dropout voltage for

that current scales accordingly. Use Equation 1 to calculate the R_DS(ON)of the device.

V_DO

R_DS(ON)

I_RATED

(1)

7.3.3 Current Limit

The device has an internal current limit circuit that protects the regulator during transient high-load current faults

or shorting events. The current limit is a brickwall scheme. In a high-load current fault, the brickwall scheme limits

the output current to the current limit (I_CL). I_CLis listed in the Electrical Characteristics table.

The output voltage is not regulated when the device is in current limit. When a current limit event occurs, the

device begins to heat up because of the increase in power dissipation. When the device is in brickwall current

limit, the pass transistor dissipates power [(V_IN– V_OUT) × I_CL]. If thermal shutdown is triggered, the device turns

off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If the output

current fault condition continues, the device cycles between current limit and thermal shutdown. For more

information on current limits, see the Know Your Limits application report.

Figure 36 shows a diagram of the current limit.

V_OUT

Brickwall

V_OUT(NOM)

0 V

I_OUT

I_RATED

0 mA

I_CL

Figure 36. Current Limit

7.3.4 Undervoltage Lockout (UVLO)

The device has an independent undervoltage lockout (UVLO) circuit that monitors the input voltage, allowing a

controlled and consistent turn on and off of the output voltage. To prevent the device from turning off if the input

drops during turn on, the UVLO has hysteresis as specified in the Electrical Characteristics table.

7.3.5 Thermal Shutdown

The device contains a thermal shutdown protection circuit to disable the device when the junction temperature

(T_J) of the pass transistor rises to T_SD(shutdown)(typical). Thermal shutdown hysteresis assures that the device

resets (turns on) when the temperature falls to T_SD(reset)(typical).

The thermal time-constant of the semiconductor die is fairly short, thus the device may cycle on and off when

thermal shutdown is reached until power dissipation is reduced. Power dissipation during startup can be high

from large V_IN– V_OUTvoltage drops across the device or from high inrush currents charging large output

capacitors. Under some conditions, the thermal shutdown protection disables the device before startup

completes.

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

Feature Description (continued)

When the thermal limit is triggered with load currents near the value of the current limit, the output may oscillate

prior to the output switching off.

For reliable operation, limit the junction temperature to the maximum listed in the Recommended Operating

Conditions table. Operation above this maximum temperature causes the device to exceed its operational

specifications. Although the internal protection circuitry of the device is designed to protect against thermal

overall conditions, this circuitry is not intended to replace proper heat sinking. Continuously running the device

into thermal shutdown or above the maximum recommended junction temperature reduces long-term reliability.

7.3.6 Power Good

The power-good (PG) pin is an open-drain output and can be connected to a regulated supply through an

external pullup resistor. The maximum pullup voltage is listed as V_PGin the Recommended Operating Conditions

table. For the PG pin to have a valid output, the voltage on the IN pin must be greater than V_UVLO(RISING), as listed

in the Electrical Characteristics table. When the V_OUTexceeds V_{IT(PG,RISING)}, the PG output is high impedance and

the PG pin voltage pulls up to the connected regulated supply. When the regulated output falls below

V_{IT(PG,FALLING)}, the open-drain output turns on and pulls the PG output low after a short deglitch time. If output

voltage monitoring is not needed, the PG pin can be left floating or connected to ground.

By connecting a pullup resistor to an external supply, any downstream device can receive power-good (PG) as a

logic signal that can be used for sequencing. Make sure that the external pullup supply voltage results in a valid

logic signal for the receiving device.

The recommended maximum PG pin sink current (I_PG-SINK) and the leakage current into the PG pin (I_LKG(PG)) are

listed in the Electrical Characteristics table.

The PG pullup voltage (V_{PG_PULLUP}), the desired minimum power-good output voltage (V_PG(MIN)), and I_LKG(PG)limit

the maximum PG pin pullup resistor value (R_{PG_PULLUP}). V_{PG_PULLUP}, the PG pin low-level output voltage (V_OL(PG)),

and I_PG-SINKlimit the minimum R_{PG_PULLUP}. Maximum and minimum values for R_{PG_PULLUP}can be calculated from

the following equations:

R_{PG_PULLUP(MAX)}= (V_{PG_PULLUP}– V_PG(MIN)) / I_{LKG(PG)_MAX}

R_{PG_PULLUP(MIN)}= (V_{PG_PULLUP}– V_OL(PG)) / I_PG-SINK

(2)

(3)

For example, if the PG pin is connected to a pullup resistor with a 3.3-V external supply, from Equation 2,

R_{PG_PULLUP(MAX)}is 11 MΩ. From Equation 3, R_{PG_PULLUP(MIN)}is 5.8 kΩ.

7.3.7 Active Overshoot Pulldown Circuitry

This device has pulldown circuitry connected to V_OUT. This circuitry is a 100-μA current sink, in series with a 5.5-

kΩ resistor, controlled by V_EN. When V_ENis below V_EN(LOW), the pulldown circuitry is disabled and the LDO output

is in high-impedance mode.

If the output voltage is more than 60 mV above nominal voltage when V_EN≥ V_EN(LOW), the pulldown circuitry turns

on and the output is pulled down until the output voltage is within 60 mV from the nominal voltage. This feature

helps reduce overshoot during the transient response.

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

7.4 Device Functional Modes

7.4.1 Device Functional Mode Comparison

The Device Functional Mode Comparison table shows the conditions that lead to the different modes of

operation. See the Electrical Characteristics table for parameter values.

Table 1. Device Functional Mode Comparison

PARAMETER

OPERATING MODE

V_IN

V_EN

I_OUT

T_J

Normal operation

Dropout operation

V_IN> V_OUT(nom)+ V_DOand V_IN> V_IN(min)

V_IN(min)< V_IN< V_OUT(nom)+ V_DO

V_EN> V_EN(HI)

I_OUT< I_OUT(max)

T_J< T_SD(shutdown)

Disabled

(any true condition

disables the device)

V_IN< V_UVLO

V_EN< V_EN(LOW)

Not applicable

T_J> T_SD(shutdown)

7.4.2 Normal Operation

The device regulates to the nominal output voltage when the following conditions are met:

•

The input voltage is greater than the nominal output voltage plus the dropout voltage (V_OUT(nom)+ V_DO

The output current is less than the current limit (I_OUT< I_CL

The device junction temperature is less than the thermal shutdown temperature (T_J< T_SD

The enable voltage has previously exceeded the enable rising threshold voltage and has not yet decreased to

less than the enable falling threshold

)

7.4.3 Dropout Operation

If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other

conditions are met for normal operation, the device operates in dropout mode. In this mode, the output voltage

tracks the input voltage. During this mode, the transient performance of the device becomes significantly

degraded because the pass transistor is in the ohmic or triode region, and acts as a switch. Line or load

transients in dropout can result in large output-voltage deviations.

When the device is in a steady dropout state (defined as when the device is in dropout, V_IN< V_OUT(NOM)+ V_DO

directly after being in a normal regulation state, but not during startup), the pass transistor is driven into the

ohmic or triode region. When the input voltage returns to a value greater than or equal to the nominal output

voltage plus the dropout voltage (V_OUT(NOM)+ V_DO), the output voltage can overshoot for a short period of time

while the device pulls the pass transistor back into the linear region.

7.4.4 Disabled

The output of the device can be shutdown by forcing the voltage of the enable pin to less than the maximum EN

pin low-level input voltage (see the Electrical Characteristics table). When disabled, the pass transistor is turned

off and internal circuits are shutdown.

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

8 Application and Implementation

注

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Adjustable Device Feedback Resistors

The adjustable-version device requires external feedback divider resistors to set the output voltage. V_OUTis set

using the feedback divider resistors, R₁and R₂, according to the following equation:

V_OUT= V_FB× (1 + R₁/ R₂)

(4)

To ignore the FB pin current error term in the V_OUTequation, set the feedback divider current to 100x the FB pin

current listed in the Electrical Characteristics table. This setting provides the maximum feedback divider series

resistance, as shown in the following equation:

R₁+ R₂≤ V_OUT/ (I_FB× 100)

(5)

8.1.2 Recommended Capacitor Types

The device is designed to be stable using low equivalent series resistance (ESR) capacitors at the input and

output. Multilayer ceramic capacitors have become the industry standard for these types of applications and are

recommended, but must be used with good judgment. Ceramic capacitors that employ X7R-, X5R-, and C0G-

rated dielectric materials provide relatively good capacitive stability across temperature, whereas the use of Y5V-

rated capacitors is discouraged because of large variations in capacitance.

Regardless of the ceramic capacitor type selected, the effective capacitance varies with operating voltage and

temperature. As a rule of thumb, expect the effective capacitance to decrease by as much as 50%. The input

and output capacitors recommended in the Recommended Operating Conditions table account for an effective

capacitance of approximately 50% of the nominal value.

8.1.3 Input and Output Capacitor Requirements

Although an input capacitor is not required for stability, good analog design practice is to connect a capacitor

from IN to GND. This capacitor counteracts reactive input sources and improves transient response, input ripple,

and PSRR. An input capacitor is recommended if the source impedance is more than 0.5 Ω. A higher value

capacitor may be necessary if large, fast load transient or line transients are anticipated or if the device is located

several inches from the input power source.

Dynamic performance of the device is improved with the use of an output capacitor. Use an output capacitor

within the range specified in the Recommended Operating Conditions table for stability.

The effective output capacitance value is recommended to not exceed 50 µF.

8.1.4 Reverse Current

Excessive reverse current can damage this device. Reverse current flows through the intrinsic body diode of the

pass transistor instead of the normal conducting channel. At high magnitudes, this current flow degrades the

long-term reliability of the device.

Conditions where reverse current can occur are outlined in this section, all of which can exceed the absolute

maximum rating of V_OUT≤ V_IN+ 0.3 V.

•

If the device has a large C_OUTand the input supply collapses with little or no load current

The output is biased when the input supply is not established

The output is biased above the input supply

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

Application Information (continued)

If reverse current flow is expected in the application, external protection is recommended to protect the device.

Reverse current is not limited in the device, so external limiting is required if extended reverse voltage operation

is anticipated.

Figure 37 shows one approach for protecting the device.

Schottky Diode

Internal Body Diode

OUT

Device

C_OUT

C_IN

GND

Figure 37. Example Circuit for Reverse Current Protection Using a Schottky Diode

图 38 shows another, more commonly used, approach in high input voltage applications.

OUT

Device

C_OUT

C_IN

GND

图 38. Reverse Current Prevention Using A Diode Before the LDO

8.1.5 Feed-Forward Capacitor (C_FF)

For the adjustable-voltage version device, a feed-forward capacitor (C_FF) can be connected from the OUT pin to

the FB pin. C_FFimproves transient, noise, and PSRR performance, but is not required for regulator stability.

Recommended C_FFvalues are listed in the Recommended Operating Conditions table. A higher capacitance C_FF

can be used; however, the startup time increases. For a detailed description of C_FFtradeoffs, see the Pros and

Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator application report.

8.1.6 Power Dissipation (P_D)

Circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed circuit

board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must have few or no

other heat-generating devices that cause added thermal stress.

To first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference

and load conditions. Equation 6 calculates power dissipation (P_D).

P_D= (V_IN– V_OUT) × I_OUT

(6)

NOTE

Power dissipation can be minimized, and therefore greater efficiency can be achieved, by

correct selection of the system voltage rails. For the lowest power dissipation use the

minimum input voltage required for correct output regulation.

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

Application Information (continued)

For devices with a thermal pad, the primary heat conduction path for the device package is through the thermal

pad to the PCB. Solder the thermal pad to a copper pad area under the device. This pad area must contain an

array of plated vias that conduct heat to additional copper planes for increased heat dissipation.

The maximum power dissipation determines the maximum allowable ambient temperature (T_A) for the device.

According to Equation 7, power dissipation and junction temperature are most often related by the junction-to-

ambient thermal resistance (R_θJA) of the combined PCB and device package and the temperature of the ambient

air (T_A).

T_J= T_A+ (R_θJA× P_D)

(7)

Thermal resistance (R_θJA) is highly dependent on the heat-spreading capability built into the particular PCB

design, and therefore varies according to the total copper area, copper weight, and location of the planes. The

junction-to-ambient thermal resistance listed in the Thermal Information table is determined by the JEDEC

standard PCB and copper-spreading area, and is used as a relative measure of package thermal performance.

8.1.7 Estimating Junction Temperature

The JEDEC standard now recommends the use of psi (Ψ) thermal metrics to estimate the junction temperatures

of the linear regulator when in-circuit on a typical PCB board application. These metrics are not thermal

resistance parameters and instead offer a practical and relative way to estimate junction temperature. These psi

metrics are determined to be significantly independent of the copper area available for heat-spreading. The

Thermal Information table lists the primary thermal metrics, which are the junction-to-top characterization

parameter (ψ_JT) and junction-to-board characterization parameter (ψ_JB). These parameters provide two methods

for calculating the junction temperature (T_J). As described in , use the junction-to-top characterization parameter

(ψ_JT) with the temperature at the center-top of device package (T_T) to calculate the junction temperature. As

described in , use the junction-to-board characterization parameter (ψ_JB) with the PCB surface temperature 1 mm

from the device package (T_B) to calculate the junction temperature.

T_J= T_T+ ψ_JT× P_D

where:

•

P_Dis the dissipated power

T_Tis the temperature at the center-top of the device package

(8)

T_J= T_B+ ψ_JB× P_D

where

•

T_Bis the PCB surface temperature measured 1 mm from the device package and centered on the package

edge

(9)

For detailed information on the thermal metrics and how to use them, see the Semiconductor and IC Package

Thermal Metrics application report.

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

Application Information (continued)

8.1.8 Special Consideration for Line Transient

During a line transient, the response of this LDO to a very large or fast input voltage change can cause a brief

shutdown lasting up to a few hundred microseconds from the voltage transition. This shutdown can be avoided

by reducing the voltage step size, increasing the transition time, or a combination of both. 图 39 provides a

boundary to follow to avoid this behavior. If necessary, reduce slew rate and the voltage step size to stay below

the curve.

1.8

1.6

1.4

1.2

0.8

0.6

0.4

0.2

V_INDelta

Input Voltage Step Size (V)

10 11 12 13 14 15

图 39. Recommended Input Voltage Step and Slew Rate in a Line transient

8.2 Typical Application

V_PG

R_PG

OUT

V_IN

V_OUT

TPS7A26

R₁

C_OUT

C_IN

GND

R₂

图 40. Generating a 5-V Rail From a Multicell Power Bank

8.2.1 Design Requirements

表 2 summarizes the design requirements for 图 40.

表 2. Design Parameters

PARAMETER

V_IN

DESIGN VALUES

7.2 V

V_OUT

5 V ±1%

I_(IN)(no load)

I_OUT(max)

T_A

< 5 µA

330 mA

70°C (max)

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

8.2.2 Detailed Design Procedure

Select a 5-V output, fixed or adjustable device to generate the 5-V rail. The fixed-version LDO has internal

feedback divider resistors, and thus has lower quiescent current. The adjustable-version LDO requires external

feedback divider resistors, and is described in the Selecting Feedback Divider Resistors section.

8.2.2.1 Transient Response

As with any regulator, increasing the output capacitor value reduces over- and undershoot magnitude, but

increases transient response duration.

8.2.2.2 Selecting Feedback Divider Resistors

For this design example, V_OUTis set to 5 V. The following equations set the output voltage:

V_OUT= V_FB× (1 + R₁/ R₂)

(10)

(11)

R₁+ R₂≤ V_OUT/ (I_FB× 100)

For improved output accuracy, use Equation 11 and I_FB(TYP)= 10 nA as listed in the Electrical Characteristics

table to calculate the upper limit for series feedback resistance, R₁+ R₂≤ 5 MΩ.

The control-loop error amplifier drives the FB pin to the same voltage as the internal reference (V_FB= 1.24 V as

listed in the Electrical Characteristics table). Use Equation 10 to determine the ratio of R₁/ R₂= 3.03. Use this

ratio and solve Equation 11 for R₂. Now calculate the upper limit for R₂≤ 1.24 MΩ. Select a standard value

resistor of R₂= 1.18 MΩ.

Reference Equation 10 and solve for R₁:

R₁= (V_OUT/ V_FB– 1) × R₂

(12)

From 公式 12, R₁= 3.64 MΩ can be determined. Select a standard resistor value for R₁= 3.6 MΩ. From

Equation 10, select V_OUT= 5.023 V.

8.2.2.3 Thermal Dissipation

Junction temperature can be determined using the junction-to-ambient thermal resistance (R_θJA) and the total

power dissipation (P_D). Use 公式 13 to calculate the power dissipation. Multiply P_Dby R_θJAand add the ambient

temperature (T_A), as 公式 14 shows, to calculate the junction temperature (T_J).

P_D= (I_GND+ I_OUT) × (V_IN– V_OUT

)

(13)

(14)

T_J= R_θJA× P_D+ T_A

公式 15 calculates the maximum ambient temperature. 公式 16 calculates the maximum ambient temperature for

typical design applications.

T_A(MAX)= T_J(MAX)– (R_θJA× P_D)

(15)

(16)

T_A(MAX)= 125°C – [73.3°C/W × (7.2 V – 5 V) × 0.33 A] = 71.8°C

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

8.2.3 Application Curve

1.8

1.6

1.4

1.2

1000

800

I_OUT

V_OUT

600

400

200

0.8

0.6

0.4

0.2

-200

-400

-600

-800

-1000

-1200

-1400

-0.2

-0.4

-1000

1000

2000

3000

4000

Time (µsec)

I_OUT= 1 mA to 0.33 A, slew rate = 0.5 A/μs,

V_OUT= 5 V, V_IN= 7.2 V, C_IN= 1 μF, C_OUT= 1 μF, C_FF= 0 μF

图 41. TPS7A26 Load Transient 1 mA to 330 mA)

TPS7A26

www.ti.com.cn

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

9 Power Supply Recommendations

The device is designed to operate with an input supply range of 2.4 V to 18 V. If the input supply is noisy,

additional input capacitors with low ESR can help improve output noise performance.

10 Layout

10.1 Layout Guidelines

•

Place input and output capacitors as close to the device pins as possible

Use copper planes for device connections to optimize thermal performance

Place thermal vias around the device and under the DRV thermal pad to distribute heat

10.2 Layout Examples

GND PLANE

C_OUT

V_IN

C_IN

V_OUT

GND

R_PG

GND PLANE

Represents via used for application-specific connections

图 42. Adjustable Version Layout Example

V_OUT

V_IN

C_OUT

GND

C_IN

GND

R_PG

GND

PLANE

Represents via used for application-specific connections

图 43. Fixed Version Layout Example

TPS7A26

ZHCSHP4B –DECEMBER 2018–REVISED OCTOBER 2019

www.ti.com.cn

11 器件和文档支持

11.1 器件支持

11.1.1 器件命名规则

表 3. 器件命名规则⁽¹⁾

产品

V_OUT

xx(x) 是标称输出电压。对于分辨率为 100mV 的输出电压，订购编号使用两位数字；对于分辨率为

50mV 的输出电压，则使用三位数字（例如，28 = 2.8V；125 = 1.25V）。01 表示可调节输出版

本。

TPS7A26xx(x)yyyz

yyy 为封装标识符。

z 为封装数量。R 表示大数量卷带，T 表示小数量卷带。

(1) 要获得最新的封装和订货信息，请参阅本文档末尾的封装选项附录，或者访问器件产品文件夹，此文件夹位于www.ti.com.cn内。

11.2 文档支持

11.2.1 相关文档

•

德州仪器 (TI)，《具有电源正常状态指示功能的 TPS7A25 300mA、18V、超低 IQ、低压降线性稳压器》数据

表

•

德州仪器 (TI)，《了解限制》应用报告

德州仪器 (TI)，《使用前馈电容器和低压降稳压器的优缺点》应用报告

11.3 接收文档更新通知

要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品

信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

11.4 社区资源

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

11.5 商标

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.6 静电放电警告

ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可

能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可

能会导致器件与其发布的规格不相符。

11.7 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 机械、封装和可订购信息

以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且

不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS7A2601DRVR

TPS7A2601DRVT

TPS7A26125DRVR

TPS7A2618DRVR

TPS7A2625DRVR

TPS7A2633DRVR

TPS7A2650DRVR

ACTIVE

WSON

DRV

3000 RoHS & Green

250 RoHS & Green

NIPDAU

Level-1-260C-UNLIM

-40 to 125

7A26

1X9P

1X8P

1X7P

NIPDAU

3000 RoHS & Green

1WRP

1WPP

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

17-Apr-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS7A2601DRVR

TPS7A2601DRVT

TPS7A26125DRVR

TPS7A2618DRVR

TPS7A2625DRVR

TPS7A2633DRVR

TPS7A2650DRVR

WSON

DRV

3000

250

178.0

8.4

2.25

1.0

4.0

8.0

3000

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

17-Apr-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS7A2601DRVR

TPS7A2601DRVT

TPS7A26125DRVR

TPS7A2618DRVR

TPS7A2625DRVR

TPS7A2633DRVR

TPS7A2650DRVR

WSON

DRV

3000

250

205.0

200.0

33.0

3000

Pack Materials-Page 2

GENERIC PACKAGE VIEW

DRV 6

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

Images above are just a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4206925/F

PACKAGE OUTLINE

DRV0006A

WSON - 0.8 mm max height

SCALE 5.500

PLASTIC SMALL OUTLINE - NO LEAD

2.1

1.9

PIN 1 INDEX AREA

2.1

1.9

0.8

0.7

SEATING PLANE

0.08 C

(0.2) TYP

0.05

0.00

0.1

EXPOSED

THERMAL PAD

1.3

1.6 0.1

4X 0.65

0.35

0.25

PIN 1 ID

(OPTIONAL)

0.3

0.2

0.1

C A

0.05

4222173/B 04/2018

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

DRV0006A

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

6X (0.45)

6X (0.3)

(1)

SYMM

(1.6)

(1.1)

4X (0.65)

SYMM

(1.95)

(R0.05) TYP

(

0.2) VIA

TYP

LAND PATTERN EXAMPLE

SCALE:25X

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4222173/B 04/2018

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.

www.ti.com

EXAMPLE STENCIL DESIGN

DRV0006A

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

SYMM

6X (0.45)

METAL

6X (0.3)

(0.45)

SYMM

4X (0.65)

(0.7)

(R0.05) TYP

(1)

(1.95)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD #7

88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:30X

4222173/B 04/2018

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担

保。

这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。

您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成

本、损失和债务，TI 对此概不负责。

TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改

TI 针对 TI 产品发布的适用的担保或担保免责声明。

TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TPS7A26 [TI]

相关型号：

TPS7A2601DRVR

TPS7A2601DRVT

TPS7A26125DRVR

TPS7A2618DRVR

TPS7A2625DRVR

TPS7A2633DRVR

TPS7A2650DRVR

TPS7A30

TPS7A3001

TPS7A3001-EP

TPS7A3001DGNR

TPS7A3001DGNT