TPS82692 [TI]
High-Efficiency MicroSiP STEP-DOWN CONVERTER; 高效MicroSiP降压转换器型号: | TPS82692 |
厂家: | TEXAS INSTRUMENTS |
描述: | High-Efficiency MicroSiP STEP-DOWN CONVERTER |
文件: | 总31页 (文件大小:2506K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS82692 , TPS82693, TPS82694, TPS826951
TPS82697, TPS82698, TPS82699
www.ti.com
SLVSBF8A –MARCH 2013–REVISED JULY 2013
(TM)
High-Efficiency MicroSiP STEP-DOWN CONVERTER (PROFILE <1mm)
Check for Samples: TPS82692 , TPS82693, TPS82694, TPS826951, TPS82697, TPS82698, TPS82699
1
FEATURES
DESCRIPTION
•
Total Solution Size <6.7 mm2
The TPS8269xSIP device is a complete 500mA /
800mA, DC/DC step-down power supply intended for
low-power applications. Included in the package are
the switching regulator, inductor and input/output
capacitors. No additional components are required to
finish the design.
2
•
•
•
•
•
•
•
•
•
•
95% Efficiency at 3MHz Operation
23μA Quiescent Current
High Duty-Cycle Operation
Best in Class Load and Line Transient
±2% Total DC Voltage Accuracy
Automatic PFM/PWM Mode Switching
Low Ripple Light-Load PFM Mode
Excellent AC Load Regulation
Internal Soft Start, 200-µs Start-Up Time
The TPS8269xSIP is based on a high-frequency
synchronous step-down dc-dc converter optimized for
battery-powered
MicroSIP™ DC/DC converter operates at a regulated
3-MHz switching frequency and enters the power-
save mode operation at light load currents to maintain
high efficiency over the entire load current range.
portable
applications.
The
Integrated Active Power-Down Sequencing
(Optional)
The PFM mode extends the battery life by reducing
the quiescent current to 23μA (typ) during light load
operation. For noise-sensitive applications, the device
has PWM spread spectrum capability providing a
lower noise regulated output, as well as low noise at
the input. These features, combined with high PSRR
and AC load regulation performance, make this
device suitable to replace a linear regulator to obtain
better power conversion efficiency.
•
•
Current Overload and Thermal Shutdown
Protection
Sub 1-mm Profile Solution
APPLICATIONS
•
•
•
LDO Replacement
Cell Phones, Smart-Phones
PoL Applications
The TPS8269xSIP is packaged in a compact (2.3mm
x 2.9mm) and low profile (1.0mm) BGA package
suitable for automated assembly by standard surface
mount equipment.
100.0
95.0
90.0
85.0
80.0
TPS82693SIP
DC/DC Converter
L
V
V
BAT
OUT
2.85 V @ 800mA
SW
VIN
75.0
70.0
65.0
60.0
55.0
50.0
CI
CO
FB
GND
EN
MODE
SELECTION
ENABLE
MODE
TPS82693
VOUT = 2.85V
MODE = Low
GND
Figure 1. Typical Application
0.1
1
10
100
1000
Current (mA)
G000
Figure 2. Efficiency vs. Load Current
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
MicroSIP, MicroSiP are trademarks of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
TPS82692 , TPS82693, TPS82694, TPS826951
TPS82697, TPS82698, TPS82699
SLVSBF8A –MARCH 2013–REVISED JULY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
PACKAGE
MARKING
CHIP CODE
PART
NUMBER
OUTPUT
DEVICE
SPECIFIC FEATURE
TA
ORDERING(3)
VOLTAGE(2)
800mA peak output current
Spread Spectrum Frequency
Modulation
TPS82692
TPS82693
TPS82694
2.2V(4)
2.85V
TPS82692SIP
800mA peak output current
Spread Spectrum Frequency
Modulation
TPS82693SIP
TPS82694SIP
W3
Output Discharge
800mA peak output current
Spread Spectrum Frequency
Modulation
2.95V(4)
-40°C to 85°C
TPS826951
TPS82697
2.5V(4)
2.8V
800mA peak output current
800mA peak output current
TPS826951SIP
TPS82697SIP
DO
C2
800mA peak output current
Output Discharge
Spread Spectrum Frequency
Modulation
TPS82698
TPS82699
3.0V
TPS82698SIP
TPS82699SIP
WN
500mA peak output current
Output Discharge
3.2V(4)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Internal tap points are available to facilitate output voltages in 50mV increments.
(3) The SIP package is available in tape and reel. Add a R suffix (e.g. TPS82699SIPR) to order quantities of 3000 parts. Add a T suffix (e.g.
TPS82699SIPT) to order quantities of 250 parts.
(4) Product preview. Contact TI factory for more information
2
Copyright © 2013, Texas Instruments Incorporated
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TPS82697, TPS82698, TPS82699
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SLVSBF8A –MARCH 2013–REVISED JULY 2013
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
MAX
6
UNIT
V
Voltage at VIN(2)(3), SW(3)
Voltage at VOUT(3)
Input Voltage
3.6
V
(3)
Voltage at EN, MODE
VIN + 0.3
500
V
TPS82699
mA
TPS82692,
TPS82693,
TPS82694,
TPS826951,
TPS82697,
TPS62698
(4)
Peak output current, IO
Power dissipation
800(4)
mA
Internally limited
(5)
Operating temperature range, TA
–40
–55
85
125
125
2
°C
°C
°C
kV
kV
Maximum internal operating temperature, TINT(max)
Storage temperature range, Tstg
Human body model
ESD(6)
Charge device model
1
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Operation above 4.8V input voltage is not recommended over an extended period of time.
(3) All voltage values are with respect to network ground terminal.
(4) Limit to 50% Duty Cycle over Lifetime.
(5) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the
maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max)= TJ(max)–(θJA X PD(max)). To achieve optimum performance, it is
recommended to operate the device with a maximum junction temperature of 105°C.
(6) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
THERMAL INFORMATION
TPS82693/4/51/7/8/9
THERMAL METRIC(1)
UNITS
SIP (8-Pins)
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
83
53
-
θJCtop
θJB
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
-
ψJB
-
θJCbot
-
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2013, Texas Instruments Incorporated
3
Product Folder Links: TPS82692 TPS82693 TPS82694 TPS826951 TPS82697 TPS82698 TPS82699
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TPS82697, TPS82698, TPS82699
SLVSBF8A –MARCH 2013–REVISED JULY 2013
www.ti.com
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
VIN
Input voltage range
2.3
0
4.8(1)
V
TPS82699
500
mA
mA
TPS82692,
TPS82693
TPS82694,
TPS826951
TPS82697,
TPS62698
800
IO
Output current range
Additional output capacitance (PFM/PWM)
Additional output capacitance (PWM)
Ambient temperature
0
0
4
7
µF
µF
°C
°C
TA
TJ
–40
–40
+85
+125
Operating junction temperature
(1) Operation above 4.8V input voltage is not recommended over an extended period of time.
ELECTRICAL CHARACTERISTICS
Minimum and maximum values are at VIN = 2.3V to 5.5V, VOUT = 2.85V, EN = 1.8V, AUTO mode and TA = –40°C to 85°C;
Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, VOUT
2.85V, EN = 1.8V, AUTO mode and TA = 25°C (unless otherwise noted).
=
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY CURRENT
TPS8269x IO = 0mA. Device not switching
TPS8269x IO = 0mA, PWM mode
TPS8269x EN = GND
23
3.5
0.2
50
μA
mA
μA
Operating quiescent
current
IQ
I(SD)
Shutdown current
7
Undervoltage lockout
threshold
UVLO
TPS8269x
2.05
2.1
V
Protection
Thermal Shutdown
TPS8269x
TPS8269x
140
10
°C
°C
Thermal Shutdown
hysteresis
Peak Output Current
Limit
ILIM
ISC
TPS8269x
TPS8269x
1000
15
mA
mA
Short Circuit Output
Current Limit
ENABLE, MODE
VIH
VIL
Ilkg
High-level input voltage
1
V
V
Low-level input voltage
Input leakage current
TPS8269x
0.4
1.5
Input connected to GND or VIN
0.01
μA
4
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TPS82697, TPS82698, TPS82699
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SLVSBF8A –MARCH 2013–REVISED JULY 2013
ELECTRICAL CHARACTERISTICS (continued)
Minimum and maximum values are at VIN = 2.3V to 5.5V, VOUT = 2.85V, EN = 1.8V, AUTO mode and TA = –40°C to 85°C;
Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, VOUT
2.85V, EN = 1.8V, AUTO mode and TA = 25°C (unless otherwise noted).
=
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
OSCILLATOR
fSW
Oscillator frequency
TPS8269x IO = 0mA, PWM mode. TA = 25°C
2.7
3
3.3
MHz
OUTPUT
3.15V ≤ VIN ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
0.98×VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
VNOM
0.18
1.03×VNOM
1.03×VNOM
1.04×VNOM
1.04×VNOM
1.02×VNOM
1.02×VNOM
1.03×VNOM
1.03×VNOM
1.04×VNOM
1.04×VNOM
1.02×VNOM
1.02×VNOM
1.03×VNOM
1.03×VNOM
1.04×VNOM
1.04×VNOM
1.02×VNOM
1.02×VNOM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
3.25V ≤ VIN ≤ 4.8V, 500mA ≤ IO ≤ 800 mA
PFM/PWM operation
3.15V ≤ VIN ≤ 5.5V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
TPS82693
TPS82697
3.25V ≤ VIN ≤ 5.5V, 500mA ≤ IO ≤ 800 mA
PFM/PWM operation
3.15V ≤ VIN ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PWM operation
3.25V ≤ VIN ≤ 4.8V, 500mA ≤ IO ≤ 800 mA
PWM operation
2.9V ≤ VIN ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
3.15V ≤ VIN ≤ 4.8V, 500mA ≤ IO ≤ 800 mA
PFM/PWM operation
2.9V ≤ VIN ≤ 5.5V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
Regulated DC output
voltage
TPS826951
3.15V ≤ VIN ≤ 5.5V, 500mA ≤ IO ≤ 800 mA
PFM/PWM operation
VOUT
2.9V ≤ VIN ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PWM operation
3.15V ≤ VIN ≤ 4.8V, 500mA ≤ IO ≤ 800 mA
PWM operation
3.3V ≤ VIN ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
3.45V ≤ VIN ≤ 4.8V, 500mA ≤ IO ≤ 800 mA
PFM/PWM operation
3.3V ≤ VIN ≤ 5.5V, 0mA ≤ IO ≤ 500 mA
PFM/PWM operation
TPS82698
3.45V ≤ VIN ≤ 5.5V, 500mA ≤ IO ≤ 800 mA
PFM/PWM operation
3.3V ≤ VIN ≤ 4.8V, 0mA ≤ IO ≤ 500 mA
PWM operation
3.45V ≤ VIN ≤ 4.8V, 500mA ≤ IO ≤ 800 mA
PWM operation
VIN = VO + 0.5V (min 3.15V) to 5.5V
IO = 200 mA
Line regulation
Load regulation
%/V
%/mA
kΩ
IO = 0mA to 800 mA
TPS8269x
–0.0002
480
Feedback input
resistance
TPS82693
TPS826951
TPS82697
IO = 1mA
CO = 4.7μF X5R 6.3V 0402
30
mVPP
IO = 1mA
CO = 4.7μF X5R 6.3V 0402
65
25
mVPP
mVPP
mVPP
Ω
Power-save mode ripple
voltage
ΔVO
TPS82699
TPS82698
IO = 1mA
CO = 10μF X5R 6.3V 0603
IO = 1mA
TPS82692
22
CO = 10μF X5R 6.3V 0603
Discharge resistor for
power-down sequence
rDIS
120
Copyright © 2013, Texas Instruments Incorporated
5
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TPS82697, TPS82698, TPS82699
SLVSBF8A –MARCH 2013–REVISED JULY 2013
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ELECTRICAL CHARACTERISTICS (continued)
Minimum and maximum values are at VIN = 2.3V to 5.5V, VOUT = 2.85V, EN = 1.8V, AUTO mode and TA = –40°C to 85°C;
Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, VOUT
2.85V, EN = 1.8V, AUTO mode and TA = 25°C (unless otherwise noted).
=
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
TPS82693
TPS82699
TPS826951 IO = 0mA, Time from active EN to VO
TPS82698
TPS82697
200
160
μs
μs
Start-up time
TPS82692 IO = 0mA, Time from active EN to VO
6
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SLVSBF8A –MARCH 2013–REVISED JULY 2013
PIN ASSIGNMENTS TPS8269X
SIP-8
(TOP VIEW)
SIP-8
(BOTTOM VIEW)
A1
A2
B2
C2
A3
A3
A2
B2
C2
A1
B1
C1
VOUT
MODE
GND
VIN
EN
VIN
EN
VOUT
MODE
GND
B1
C1
C3
C3
GND
GND
PIN FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
VOUT
VIN
NO.
A1
O
I
Power output pin. Apply output load between this pin and GND.
The VIN pins supply current to the TPS8269xSIP's internal regulator.
A2, A3
This is the enable pin of the device. Connecting this pin to ground forces the converter into
shutdown mode. Pulling this pin to VIN enables the device. This pin must not be left floating and
must be terminated.
EN
B2
I
This is the mode selection pin of the device. This pin must not be left floating and must be
terminated.
MODE = LOW: The device is operating in regulated frequency pulse width modulation mode
(PWM) at high-load currents and in pulse frequency modulation mode (PFM) at light load
currents.
MODE
GND
B1
I
MODE = HIGH: Low-noise mode enabled, regulated frequency PWM operation forced.
Ground pin.
C1, C2, C3
–
FUNCTIONAL BLOCK DIAGRAM
MODE
EN
VIN
CI
4.7µF
DC/DC CONVERTER
Undervoltage
VIN
Lockout
Bias Supply
Soft-Start
Negative Inductor
Current Detect
Bandgap
VREF = 0.8 V
Power Save Mode
Switching
Current Limit
Detect
Thermal
Shutdown
Frequency
Control
R
1
-
L
Gate Driver
VOUT
Anti
Shoot-Through
1µH
R
VREF
2
CO
4.7µF
+
Feedback Divider
GND
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TPS82697, TPS82698, TPS82699
SLVSBF8A –MARCH 2013–REVISED JULY 2013
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PARAMETER MEASUREMENT INFORMATION
TPS8269XSIP
DC/DC Converter
L
V
SW
VOUT
VIN
BAT
CI
CO
FB
GND
EN
MODE
ENABLE
MODE
SELECTION
GND
TYPICAL CHARACTERISTICS
Table 1. Table of Graphs
FIGURE
Figure 3, Figure 4,
Figure 5
vs Load current (TPS82699 VOUT = 3.2V)
vs Load current (TPS82693 VOUT = 2.85V)
Figure 6, Figure 7,
Figure 8
η
Efficiency
vs Load current (TPS82697 VOUT = 2.8V)
vs Load current (TPS826951 VOUT = 2.5V)
vs Load current (TPS82698 VOUT = 3.0V)
vs Input Voltage (TPS82699 VOUT = 3.2V)
vs Load current (TPS82699 VOUT = 3.2V)
vs Load Current (TPS82699 VOUT = 3.2V)
vs Load Current (TPS82693 VOUT = 2.85V)
Figure 9, Figure 10
Figure 11, Figure 12
Figure 13, Figure 14
Figure 15
Peak-to-peak output ripple voltage
DC output voltage
Figure 16, Figure 17
Figure 18
VO
Figure 19, Figure 20
Figure 21, Figure 22,
Figure 23
Load transient response
TPS82699 VOUT = 3.2V
TPS826951 VOUT = 2.5V
TPS82699 VOUT = 3.2V
Figure 24, Figure 25
Figure 26, Figure 27,
Figure 28, Figure 29
AC load transient response
Figure 30, Figure 31,
Figure 32, Figure 33
TPS826951 VOUT = 2.5V
TPS82698 VOUT = 3.0V
Figure 34, Figure 35,
Figure 36
PFM/PWM boundaries
Quiescent current
PWM switching frequency
Start-up
vs Input voltage (TPS82699 VOUT = 3.2V)
vs Input voltage
Figure 37
Figure 38
IQ
fs
vs Input voltage (TPS82699 VOUT = 3.2V)
Figure 39
Figure 40, Figure 41
Figure 42
(TPS82699 VOUT = 3.2V)
Shut-Down
8
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SLVSBF8A –MARCH 2013–REVISED JULY 2013
TYPICAL CHARACTERISTICS (continued)
TPS82699
EFFICIENCY
vs
TPS82699
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
Figure 3.
Figure 4.
TPS82699
EFFICIENCY
vs
TPS82693
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
100.0
90.0
80.0
70.0
60.0
TPS82693
VOUT = 2.85V
VIN = 3.1V
VIN = 3.2V
VIN = 3.6V
VIN = 4.2V
VIN = 4.5V
MODE = Low
0.1
1
10
100
1000
Current (mA)
G000
Figure 5.
Figure 6.
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9
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TPS82697, TPS82698, TPS82699
SLVSBF8A –MARCH 2013–REVISED JULY 2013
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TYPICAL CHARACTERISTICS (continued)
TPS82693
EFFICIENCY
vs
TPS82693
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
TPS82693
VOUT = 2.85V
VIN = 3.1V (PFM/PWM)
VIN = 3.2V (PFM/PWM)
VIN = 3.6V (PFM/PWM)
VIN = 4.2V (PFM/PWM)
VIN = 4.5V (PFM/PWM)
VIN = 3.6V (PWM)
VIN = 3.1V
VIN = 3.2V
VIN = 3.6V
VIN = 4.2V
VIN = 4.5V
TPS82693
VOUT = 2.85V
MODE = High
0.1
1
10
100
1000
1
10
100
1000
Current (mA)
Current (mA)
G000
G000
Figure 7.
Figure 8.
TPS82697
EFFICIENCY
vs
TPS82697
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
TPS62697
VOUT = 2.8V
VIN = 3.1V (PFM/PWM)
VIN = 3.2V (PFM/PWM)
VIN = 3.6V (PFM/PWM)
VIN = 4.2V (PFM/PWM)
VIN = 4.5V (PFM/PWM)
VIN = 3.6V (PWM)
VIN = 3.1V
VIN = 3.2V
VIN = 3.6V
VIN = 4.2V
VIN = 4.5V
TPS62697
VOUT = 2.8V
MODE = High
0.1
1
10
100
1000
1
10
100
1000
Current (mA)
Current (mA)
G000
G000
Figure 9.
Figure 10.
10
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TYPICAL CHARACTERISTICS (continued)
TPS826951
EFFICIENCY
vs
TPS826951
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
100.0
90.0
80.0
70.0
60.0
50.0
40.0
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
TPS626951
VOUT = 2.5V
VIN = 2.9V
VIN = 3.1V
VIN = 3.4V
VIN = 3.6V
VIN = 3.8V
VIN = 4.2V
VIN = 4.5V
VIN = 2.9V
VIN = 3.1V
VIN = 3.4V
VIN = 3.6V
VIN = 3.8V
VIN = 4.2V
VIN = 4.5V
TPS626951
VOUT = 2.5V
MODE = Low
MODE = High
0.1
1
10
100
1000
1
10
100
1000
Current (mA)
Current (mA)
G000
G000
Figure 11.
Figure 12.
TPS82698
EFFICIENCY
vs
TPS82698
EFFICIENCY
vs
LOAD CURRENT
LOAD CURRENT
100.0
90.0
80.0
70.0
60.0
50.0
40.0
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
TPS82698
VOUT = 3.0V
VIN = 3.1V
VIN = 3.3V
VIN = 3.6V
VIN = 3.8V
VIN = 4.0V
VIN = 4.2V
VIN = 4.8V
VIN = 3.1V
VIN = 3.3V
VIN = 3.6V
VIN = 3.8V
VIN = 4.0V
VIN = 4.2V
VIN = 4.8V
TPS82698
VOUT = 3.0V
MODE = Low
MODE = High
0.1
1
10
100
1000
1
10
100
1000
Current (mA)
Current (mA)
G000
G000
Figure 13.
Figure 14.
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TYPICAL CHARACTERISTICS (continued)
TPS82699
EFFICIENCY
vs
TPS82699
PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE
vs
INPUT VOLTAGE
LOAD CURRENT
Figure 15.
Figure 16.
TPS82699
TPS82699
DC OUTPUT VOLTAGE
vs
PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE
vs
LOAD CURRENT
LOAD CURRENT
3.264
3.232
3.200
3.168
3.136
3.104
VOUT = 3.2V
MODE = High
VIN = 3.3V
VIN = 3.4V
VIN = 3.6V
VIN = 3.9V
VIN = 4.2V
VIN = 4.8V
0.1
1
10
100
1000
Current (mA)
G000
Figure 17.
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
TPS82693
DC OUTPUT VOLTAGE
vs
TPS82693
DC OUTPUT VOLTAGE
vs
LOAD CURRENT
LOAD CURRENT
2.93
2.92
VOUT = 2.85V
MODE = Low
VOUT = 2.85V
MODE = High
2.86
2.85
2.83
2.82
2.81
2.80
2.79
2.91
2.90
2.89
2.88
2.87
2.86
2.85
2.83
2.82
2.81
2.80
2.79
VIN = 3.1V
VIN = 3.1V
VIN = 3.2V
VIN = 3.3V
VIN = 3.6V
VIN = 4.5V
VIN = 3.2V
VIN = 3.3V
VIN = 3.6V
VIN = 4.5V
0.1
1
10
100
1000
0.1
1
10
100
1000
Current (mA)
Current (mA)
G000
G000
Figure 19.
Figure 20.
TPS82699
TPS82699
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
V
= 3.6 V, VO = 3.2V
V
= 4.2 V, VO = 3.2V
I
I
10mA to 400mA Load Step
10mA to 400mA Load Step
MODE = Low
MODE = Low
Figure 21.
Figure 22.
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TYPICAL CHARACTERISTICS (continued)
TPS82699
TPS826951
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
V
= 3.6 V, VO = 2.5V
V
= 3.45 V, VO = 3.2V
I
I
10mA to 400mA Load Step
10mA to 400mA Load Step
MODE = Low
MODE = Low
Figure 23.
Figure 24.
TPS826951
LOAD TRANSIENT RESPONSE IN
PFM/PWM OPERATION
TPS82699
AC LOAD TRANSIENT RESPONSE
V
= 2.9 V, VO = 2.5V
V
V
= 3.6 V,
= 3.2 V
I
I
O
10mA to 400mA Load Step
5mA to 350mA Load Sweep
MODE = Low
MODE = Low
Figure 25.
Figure 26.
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TYPICAL CHARACTERISTICS (continued)
TPS82699
TPS82699
AC LOAD TRANSIENT RESPONSE
AC LOAD TRANSIENT RESPONSE
V
V
= 3.45 V,
= 3.2 V
V
V
= 3.6 V,
= 3.2 V
I
I
O
O
5mA to 350mA Load Sweep
5mA to 500mA Load Sweep
MODE = Low
MODE = Low
Figure 27.
Figure 28.
TPS82699
AC LOAD TRANSIENT RESPONSE
TPS826951
AC LOAD TRANSIENT RESPONSE
V
V
= 3.6 V,
= 2.5 V
V
= 3.45 V,
= 3.2 V
I
I
V
O
O
5mA to 500mA Load Sweep
5mA to 500mA Load Sweep
MODE = Low
MODE = Low
Figure 29.
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
TPS826951
TPS826951
AC LOAD TRANSIENT RESPONSE
AC LOAD TRANSIENT RESPONSE
V
V
= 2.9 V,
= 2.5 V
V
V
= 3.6 V,
= 2.5 V
I
I
O
O
5mA to 500mA Load Sweep
5mA to 800mA Load Sweep
MODE = Low
MODE = Low
Figure 31.
Figure 32.
TPS826951
AC LOAD TRANSIENT RESPONSE
TPS82698
AC LOAD TRANSIENT RESPONSE
V
V
= 3.6 V,
= 3.0 V
V
V
= 3.6 V,
= 2.5 V
I
I
O
O
5mA to 800mA Load Sweep
5mA to 800mA Load Sweep
MODE = Low
MODE = Low
Figure 33.
Figure 34.
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SLVSBF8A –MARCH 2013–REVISED JULY 2013
TYPICAL CHARACTERISTICS (continued)
TPS82698
TPS82698
AC LOAD TRANSIENT RESPONSE
AC LOAD TRANSIENT RESPONSE
V
V
= 3.4 V,
= 3.0 V
V
V
= 3.3 V,
= 3.0 V
I
I
O
O
5mA to 800mA Load Sweep
5mA to 500mA Load Sweep
MODE = Low
MODE = Low
Figure 35.
Figure 36.
QUIESCENT CURRENT
vs
TPS82699
PFM/PWM BOUNDARIES
INPUT VOLTAGE
50
45
40
35
30
25
20
15
10
5
Always PWM
PFM to PWM
Mode Change
PWM to PFM
Mode Change
Always PFM
T = −40C
T = +25C
T = +85C
0
3.0
3.5
4.0
4.5
5.0
Supply Voltage (V)
G000
Figure 37.
Figure 38.
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TYPICAL CHARACTERISTICS (continued)
TPS82699
PWM SWITCHING FREQUENCY
vs
TPS82699
START-UP
INPUT VOLTAGE
V
= 3.6 V,
I
VO = 3.2V,
IO = 0mA
MODE = Low
Figure 39.
Figure 40.
TPS82699
START-UP
TPS82699
Shut-Down
V
= 3.6 V,
I
VO = 3.2V,
Load = 0mA
V
= 3.6 V,
I
VO = 3.2V,
RL = 39R
MODE = Low
MODE = Low
Figure 41.
Figure 42.
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SLVSBF8A –MARCH 2013–REVISED JULY 2013
DETAILED DESCRIPTION
OPERATION
The TPS8269xSIP is a standalone synchronous step-down converter operating at a regulated 3-MHz frequency
pulse width modulation (PWM) at moderate to heavy load currents (up to 500mA / 800mA output current). At light
load currents, the TPS8269xSIP's converter operates in power-save mode with pulse frequency modulation
(PFM).
The converter uses a unique frequency locked ring oscillating modulator to achieve best-in-class load and line
response. One key advantage of the non-linear architecture is that there is no traditional feed-back loop. The
loop response to change in VO is essentially instantaneous, which explains the transient response. Although this
type of operation normally results in a switching frequency that varies with input voltage and load current, an
internal frequency lock loop (FLL) holds the switching frequency constant over a large range of operating
conditions.
Combined with best in class load and line transient response characteristics, the low quiescent current of the
device (ca. 23μA) allows to maintain high efficiency at light load, while preserving fast transient response for
applications requiring tight output regulation.
The TPS8269xSIP integrates an input current limit to protect the device against heavy load or short circuits and
features an undervoltage lockout circuit to prevent the device from misoperation at low input voltages.
POWER-SAVE MODE
If the load current decreases, the converter will enter Power Save Mode operation automatically. During power-
save mode the converter operates in discontinuous current (DCM) with a minimum of one pulse, which produces
low output ripple compared with other PFM architectures.
When in power-save mode, the converter resumes its operation when the output voltage trips below the nominal
voltage. It ramps up the output voltage with a minimum of one pulse and goes into power-save mode when the
output voltage is within its regulation limits again.
PFM mode is left and PWM operation is entered as the output current can no longer be supported in PFM mode.
As a consequence, the DC output voltage is typically positioned ca. 1.5% above the nominal output voltage and
the transition between PFM and PWM is seamless.
PFM Mode at Light Load
PFM Ripple
Nominal DC Output Voltage
PWM Mode at Heavy Load
Figure 43. Operation in PFM Mode and Transfer to PWM Mode
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MODE SELECTION
The MODE pin allows to select the operating mode of the device. Connecting this pin to GND enables the
automatic PWM and power-save mode operation. The converter operates in regulated frequency PWM mode at
moderate to heavy loads and in the PFM mode during light loads, which maintains high efficiency over a wide
load current range.
Pulling the MODE pin high forces the converter to operate in the PWM mode even at light load currents. The
advantage is that the converter operates with a fixed frequency that allows simple filtering of the switching
frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the power-save
mode during light loads.
For additional flexibility, it is possible to switch from power-save mode to PWM mode during operation. This
allows efficient power management by adjusting the operation of the converter to the specific system
requirements.
LOW DROPOUT, 100% DUTY CYCLE OPERATION
The device starts to enter 100% duty cycle mode once input and output voltage come close together. In order to
maintain the output voltage, the DC/DC converter's high-side MOSFET is turned on 100% for one or more
cycles.
With further decreasing VIN the high-side switch is constantly turned on, thereby providing a low input-to-output
voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by
taking full advantage of the whole battery voltage range.
SOFT START
The TPS8269xSIP has an internal soft-start circuit that limits the inrush current during start-up. This limits input
voltage drops when a battery or a high-impedance power source is connected to the input of the MicroSiP™
converter.
The soft-start system progressively increases the switching on-time from a minimum pulse-width of 35ns as a
function of the output voltage. This mode of operation continues for approximately 100μs after enable. Should the
output voltage not have reached its target value by that time, such as in the case of heavy load, the soft-start
transitions to a second mode of operation.
If the output voltage has raised above 0.5V (approximately), the converter increases the input current limit
thereby enabling the power supply to come-up properly. The start-up time mainly depends on the capacitance
present at the output node and load current.
ENABLE
The TPS8269xSIP device starts operation when EN is set high and starts up with the soft start as previously
described. For proper operation, the EN pin must be terminated and must not be left floating.
Pulling the EN pin low forces the device into shutdown. In this mode, all internal circuits are turned off and VIN
current reduces to the device leakage current, typically a few hundred nano amps.
The TPS8269xSIP device can actively discharge the output capacitor when it turns off (refer to Ordering
Information Table). The integrated discharge resistor has a typical resistance of 100 Ω. The required time to
ramp-down the output voltage depends on the load current and the capacitance present at the output node.
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APPLICATION INFORMATION
INPUT CAPACITOR SELECTION
Because of the pulsating input current nature of the buck converter, a low ESR input capacitor is required to
prevent large voltage transients that can cause misbehavior of the device or interference in other circuits in the
system.
For most applications, the input capacitor that is integrated into the TPS8269x should be sufficient. If the
application exhibits a noisy or erratic switching frequency, experiment with additional input ceramic capacitance
to find a remedy.
The TPS8269x uses a tiny ceramic input capacitor. When a ceramic capacitor is combined with trace or cable
inductance, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing
can couple to the output and be mistaken as loop instability or can even damage the part. In this circumstance,
additional "bulk" capacitance, such as electrolytic or tantalum, should be placed between the input of the
converter and the power source lead to reduce ringing that can occur between the inductance of the power
source leads and CI.
OUTPUT CAPACITOR SELECTION
The advanced, fast-response, voltage mode, control scheme of the TPS8269x allows the use of a tiny ceramic
output capacitor (CO). For most applications, the output capacitor integrated in the TPS8269x is sufficient.
At nominal load current, the device operates in PWM mode; the overall output voltage ripple is the sum of the
voltage step that is caused by the output capacitor ESL and the ripple current that flows through the output
capacitor impedance. At light loads, the output capacitor limits the output ripple voltage and provides holdup
during large load transitions.
The TPS8269x is designed as a Point-Of-Load (POL) regulator, to operate stand-alone without requiring any
additional capacitance. Adding a 4.7μF ceramic output capacitor (X7R or X5R dielectric) generally works from a
converter stability point of view, helps to minimize the output ripple voltage in PFM mode and improves the
converter's transient response under when input and output voltage are close together.
For best operation (i.e. optimum efficiency over the entire load current range, proper PFM/PWM auto transition),
the TPS8269xSIP requires a minimum output ripple voltage in PFM mode. The typical output voltage ripple is ca.
1% of the nominal output voltage VO. The PFM pulses are time controlled resulting in a PFM output voltage
ripple and PFM frequency that depends (first order) on the capacitance seen at the MicroSiPTM DC/DC
converter's output.
In applications requiring additional output bypass capacitors located close to the load, care should be taken to
ensure proper operation. If the converter exhibits marginal stability or erratic switching frequency, experiment
with additional low value series resistance (e.g. 50 to 100mΩ) in the output path to find a remedy.
Because the damping factor in the output path is directly related to several resistive parameters (e.g. inductor
DCR, power-stage rDS(on), PWB DC resistance, load switches rDS(on) …) that are temperature dependant, the
converter small and large signal behavior must be checked over the input voltage range, load current range and
temperature range.
The easiest sanity test is to evaluate, directly at the converter’s output, the following aspects:
•
•
PFM/PWM efficiency
PFM/PWM and forced PWM load transient response
During the recovery time from a load transient, the output voltage can be monitored for settling time, overshoot or
ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase
margin.
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LAYOUT CONSIDERATION
In making the pad size for the SiP LGA balls, it is recommended that the layout use non-solder-mask defined
(NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the
opening size is defined by the copper pad width. Figure 44 shows the appropriate diameters for a MicroSiPTM
layout.
Figure 44. Recommended Land Pattern Image and Dimensions
(5)
(6)
SOLDER PAD
SOLDER MASK
OPENING
COPPER
THICKNESS
STENCIL
COPPER PAD
STENCIL THICKNESS
DEFINITIONS(1)(2)(3)(4)
OPENING
Non-solder-mask
defined (NSMD)
0.30mm
0.360mm
1oz max (0.032mm)
0.34mm diameter
0.1mm thick
(1) Circuit traces from non-solder-mask defined PWB lands should be 75μm to 100μm wide in the exposed area inside the solder mask
opening. Wider trace widths reduce device stand off and affect reliability.
(2) Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the
intended application.
(3) Recommend solder paste is Type 3 or Type 4.
(4) For a PWB using a Ni/Au surface finish, the gold thickness should be less than 0.5mm to avoid a reduction in thermal fatigue
performance.
(5) Solder mask thickness should be less than 20 μm on top of the copper circuit pattern.
(6) For best solder stencil performance use laser cut stencils with electro polishing. Chemically etched stencils give inferior solder paste
volume control.
SURFACE MOUNT INFORMATION
The TPS8269x MicroSiP™ DC/DC converter uses an open frame construction that is designed for a fully
automated assembly process and that features a large surface area for pick and place operations. See the "Pick
Area" in the package drawings.
Package height and weight have been kept to a minimum thereby to allow the MicroSiP™ device to be handled
similarly to a 0805 component.
See JEDEC/IPC standard J-STD-20b for reflow recommendations.
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THERMAL AND RELIABILITY INFORMATION
The TPS8269x output current may need to be de-rated if it is required to operate in a high ambient temperature
or deliver a large amount of continuous power. The amount of current de-rating is dependent upon the input
voltage, output power and environmental thermal conditions. Care should especially be taken in applications
where the localized PWB temperature exceeds 65°C.
The TPS8269x die and inductor temperature should be kept lower than the maximum rating of 125°C, so care
should be taken in the circuit layout to ensure good heat sinking. Sufficient cooling should be provided to ensure
reliable operation.
Three basic approaches for enhancing thermal performance are listed below:
•
•
•
Improve the power dissipation capability of the PCB design.
Improve the thermal coupling of the component to the PCB.
Introduce airflow into the system.
To estimate the junction temperature, approximate the power dissipation within the TPS8269x by applying the
typical efficiency stated in this datasheet to the desired output power; or, by taking a power measurement if you
have an actual TPS8269x device or a TPS8269x evaluation module. Then calculate the internal temperature rise
of the TPS8269x above the surface of the printed circuit board by multiplying the TPS8269x power dissipation by
the thermal resistance.
The thermal resistance numbers listed in the Thermal Information table are based on modeling the MicroSiP™
package mounted on a high-K test board specified per JEDEC standard. For increased accuracy and fidelity to
the actual application, it is recommended to run a thermal image analysis of the actual system. Figure 45 and
Figure 46 are thermal images of TI’s evaluation board with readings of the temperatures at specific locations on
the device.
Tinductor = 33°C
TPWB = 27°C
Tinductor = 53°C
TPWB = 38°C
Tcapacitor = 30°C
Tcapacitor = 30°C
Tcapacitor = 41°C
Tcapacitor = 39°C
Figure 45. VIN=3.6V, VOUT=2.85V, IOUT=400mA
80mW Power Dissipation at Room Temp.
Figure 46. VIN=3.6V, VOUT=2.85V, IOUT=800mA
330mW Power Dissipation at Room Temp.
The TPS8269x is equipped with a thermal shutdown that will inhibit power switching at high junction
temperatures. The activation threshold of this function, however, is above 125°C to avoid interfering with normal
operation. Thus, it follows that prolonged or repetitive operation under a condition in which the thermal shutdown
activates necessarily means that the components internal to the MicroSiP™ package are subjected to high
temperatures for prolonged or repetitive intervals, which may damage or impair the reliability of the device.
MLCC capacitor reliability/lifetime is depending on temperature and applied voltage conditions. At higher
temperatures, MLCC capacitors are subject to stronger stress. On the basis of frequently evaluated failure rates
determined at standardized test conditions, the reliability of all MLCC capacitors can be calculated for their actual
operating temperature and voltage.
Copyright © 2013, Texas Instruments Incorporated
23
Product Folder Links: TPS82692 TPS82693 TPS82694 TPS826951 TPS82697 TPS82698 TPS82699
TPS82692 , TPS82693, TPS82694, TPS826951
TPS82697, TPS82698, TPS82699
SLVSBF8A –MARCH 2013–REVISED JULY 2013
www.ti.com
Capacitor Lifetime
vs
Capacitor Case Temperature
Capacitor B1 Lifetime
vs
Capacitor Case Temperature
10000
100000
10000
1000
100
VBias=5V
VBias=4.35V
VBias=3.6V
VBias=5V
VBias=4.35V
VBias=3.6V
VBias=3V
1000
100
10
VBias=3V
1
10
0.1
0.01
1
0.1
20
40
60
80
100
120
140
20
40
60
80
100
120
140
Capacitor Case Temperature ( °C)
Capacitor Case Temperature ( °C)
G000
G000
Figure 47.
Figure 48.
Failures caused by systematic degradation can be described by the Arrhenius model. The most critical
parameter (IR) is the Insulation Resistance (i.e. leakage current). The drop of IR below a lower limit (e.g. 1 MΩ)
is used as the failure criterion, see Figure 47. Figure 48 (B1 life) defines the capacitor lifetime based on a failure
rate reaching 1%. It should be noted that the wear-out mechanisms occurring in the MLCC capacitors are not
reversible but cumulative over time.
PACKAGE SUMMARY
SIP PACKAGE
TOP VIEW
BOTTOM VIEW
A1
YML
C1
B1
A1
C2
C3
D
B2
A2
E
A3
CC
LSB
Code:
•
•
•
CC — Customer Code (device/voltage specific)
YML — Y: Year, M: Month, L: Lot trace code
LSB — L: Lot trace code, S: Site code, B: Board locator
MicroSiPTM DC/DC MODULE PACKAGE DIMENSIONS
The TPS8269x device is available in an 8-bump ball grid array (BGA) package. The package dimensions are:
•
•
D = 2.30 ±0.05 mm
E = 2.90 ±0.05 mm
24
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: TPS82692 TPS82693 TPS82694 TPS826951 TPS82697 TPS82698 TPS82699
TPS82692 , TPS82693, TPS82694, TPS826951
TPS82697, TPS82698, TPS82699
www.ti.com
SLVSBF8A –MARCH 2013–REVISED JULY 2013
REVISION HISTORY
Note: Page numbers of current version may differ form previous versions.
Changes from Original (March 2013) to Revision A
Page
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Added package marking for TPS826951 .............................................................................................................................. 2
Added package marking for TPS82697 ................................................................................................................................ 2
Added Spread Spectrum Frequency Modulation for TPS82698 .......................................................................................... 2
Added Regulated DC Output Voltage parameters to electrical characteristics table for device TPS82697 ........................ 5
Added Regulated DC Output Voltage parameters to electrical characteristics table for device TPS826951 ...................... 5
Added Regulated DC Output Voltage parameters to electrical characteristics table for device TPS82698 ........................ 5
Added Power-save mode ripple voltage to electrical characteristics table for device TPS826951 ...................................... 5
Added Power-save mode ripple voltage to electrical characteristics table for device TPS82697 ........................................ 5
Added Power-save mode ripple voltage to electrical characteristics table for device TPS82698 ........................................ 5
Added Start-up time to electrical characteristics table for device TPS826951 ..................................................................... 6
Added Start-up time to electrical characteristics table for device TPS82698 ....................................................................... 6
Added Start-up time to electrical characteristics table for device TPS82697 ....................................................................... 6
Added Efficiency vs Load Current Graph figure references to Table of Graphs. ................................................................. 8
Added Efficiency vs Load Current forced PWM operation for device TPS82697 .............................................................. 10
Added Efficiency vs Load Current forced PWM operation for device TPS82697 .............................................................. 10
Added Efficiency vs Load Current PFM/PWM operation for device TPS826951 ............................................................... 11
Added Efficiency vs Load Current forced PWM operation for device TPS826951 ............................................................ 11
Added Efficiency vs Load Current PFM/PWM operation for device TPS82698 ................................................................. 11
Added Efficiency vs Load Current forced PWM operation for device TPS82698 .............................................................. 11
Added Transient Response Plot for device TPS826951 .................................................................................................... 13
Added Transient Response Plot for device TPS826951 .................................................................................................... 14
Added AC Load Transient Response Plot for device TPS826951 ..................................................................................... 15
Added Added AC Load Transient Response Plot for device TPS826951 .......................................................................... 15
Added AC Load Transient Response Plot for device TPS826951 ..................................................................................... 15
Added AC Load Transient Response Plot for device TPS826951 ..................................................................................... 16
Added AC Load Transient Response Plot for device TPS82698 ....................................................................................... 16
Added AC Load Transient Response Plot for device TPS82698 ....................................................................................... 16
Added AC Load Transient Response Plot for device TPS82698 ....................................................................................... 16
Copyright © 2013, Texas Instruments Incorporated
25
Product Folder Links: TPS82692 TPS82693 TPS82694 TPS826951 TPS82697 TPS82698 TPS82699
PACKAGE OPTION ADDENDUM
www.ti.com
18-Aug-2013
PACKAGING INFORMATION
Orderable Device
TPS82693SIPR
TPS82693SIPT
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
ACTIVE
uSiP
uSiP
SIP
8
8
3000
Green (RoHS
& no Sb/Br)
Call TI
Call TI
Level-2-260C-1 YEAR
W3
TXI693
ACTIVE
SIP
250
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
-40 to 85
W3
TXI693
TPS826970SIPR
TPS826970SIPT
TPS82697SIPR
PREVIEW
PREVIEW
PREVIEW
uSiP
uSiP
uSiP
SIP
SIP
SIP
8
8
8
3000
250
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
-40 to 85
-40 to 85
-40 to 85
3000
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
C2
TXI697
TPS82697SIPT
TPS82698SIPR
TPS82698SIPT
PREVIEW
ACTIVE
ACTIVE
uSiP
uSiP
uSiP
SIP
SIP
SIP
8
8
8
250
3000
250
Green (RoHS
& no Sb/Br)
Call TI
Call TI
Call TI
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 85
-40 to 85
-40 to 85
C2
TXI697
Green (RoHS
& no Sb/Br)
WN
TXI698
Green (RoHS
& no Sb/Br)
WN
TXI698
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Aug-2013
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Aug-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS82693SIPR
TPS82698SIPR
uSiP
uSiP
SIP
SIP
8
8
3000
3000
178.0
178.0
9.0
9.0
2.45
2.45
3.05
3.05
1.1
1.1
4.0
4.0
8.0
8.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Aug-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS82693SIPR
TPS82698SIPR
uSiP
uSiP
SIP
SIP
8
8
3000
3000
223.0
223.0
194.0
194.0
35.0
35.0
Pack Materials-Page 2
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