TPS9104IPTR [TI]

CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY/AUDIO SYSTEM;
TPS9104IPTR
型号: TPS9104IPTR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY/AUDIO SYSTEM

蜂窝 电信 电信集成电路
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TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
Complete Power-Supply/Audio System For  
Cellular Handsets  
PT PACKAGE  
(TOP VIEW)  
Three Low-Dropout Regulators (LDOs) with  
100-mV Dropout  
Speaker and Ringer Power Amplifiers Drive  
32-Dynamic Speakers or Piezo Devices  
48 47 46 45 44 43 42 41 40 39 38 37  
Low-Noise Microphone Amplifier  
Depop Protection For All Amplifiers  
GND  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
GND  
EN_B  
PB  
OFF  
ON  
1
V
CC  
2
PL  
RNGR_OUT+  
RNGR_OUT–  
RNGR_IN  
RNGR_EN  
RESET  
3
Less Than 1 µA Supply Current in  
Shutdown, Typical  
4
5
6
V
NC  
250-ms Microprocessor Reset Output  
CC  
7
10-mA Charge-Pump Driver Configurable  
For Inverted or Doubled Output  
8
EN  
PA  
MIC_EN  
EN_A  
GND  
9
NC  
AREF  
VCP  
GND_CP  
10  
11  
12  
Separate Enables for LDOs, Amplifiers, and  
Charge Pump  
13 14 15 16 17 18 19 20 21 22 23 24  
1.185-V Reference Capable of Driving 2 mA  
48-Pin TQFP Package  
description  
NC – No internal connection  
The TPS9104 incorporates a complete power  
supply and audio power system for a cellular  
subscriber terminal that uses battery packs with three or four NiMH/NiCd cells or a single lithium-ion cell. The  
device includes three low-dropout linear regulators rated for 3.3 V or 3 V at 100 mA each, a charge-pump driver,  
two power amplifiers for a speaker and a ringer, a low-noise microphone amplifier, and logic that includes a  
250-ms reset, on/off control, and processor interface. Regulators A and B and the charge-pump driver are  
disabled until regulator L (logic regulator) reaches the rated voltage and RESET is logic high. Regulators A and  
B, thecharge-pumpdriver, andtheamplifiershaveseparateenablesallowingcircuitrytobepoweredupordown  
as necessary to conserve battery power.  
Each of the amplifiers has a depop circuit to prevent objectionable noise when the IC is powered up or when  
the amplifiers are enabled. Both the speaker amplifier and the ringer amplifier are designed to supply  
2 V peak-to-peak into 32 or into a 90-nF piezoelectric speaker. The microphone amplifier is a low-noise  
high-gain (A =100) circuit capable of supplying 3 V peak-to-peak into a 10-kload.  
V
The TPS9104 operates over a free-air temperature range of –40°C to 85°C and is supplied in a 48-pin TQFP  
package.  
AVAILABLE OPTIONS  
PACKAGED DEVICE  
CHIP FORM  
T
A
THIN QFP  
(PT)  
(Y)  
40°C to 85°C  
TPS9104IPT  
TPS9104Y  
The PT package is available taped and reeled. Add R suffix to the device  
type when ordering (e.g. TPS9104IPTR).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
functional block diagram  
VCP  
Charge  
Pump  
Driver  
CP  
3
V
CC  
GND_CP  
EN_CP  
EN  
VB  
LDO  
Regulator  
B
CB  
PB  
Voltage  
Reference  
REF  
1 Ω  
1 Ω  
1 Ω  
UVLO  
and  
OTP  
VA  
LDO  
Regulator  
A
CA  
PA  
EN_A  
EN_B  
VL  
LDO  
Regulator  
L
CL  
PL  
Reset  
Generator  
RESET  
OFF  
ON  
ON  
ON_REM  
SPKR_IN  
_
+
SPKR_OUT+  
SPKR_OUT–  
SPKR_EN  
GND  
AREF  
4
RNGR_IN  
MIC_IN+  
RNGR_OUT+  
RNGR_OUT–  
+
_
+
_
MIC_IN–  
RNGR_EN  
MIC_OUT  
MIC_EN  
UVLO - Undervoltage lockout  
OTP - Overtemperature protection  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TPS9104Y chip information  
These chips, when properly assembled, display characteristics similar to the TPS9104. Thermal compression  
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with  
conductive epoxy or a gold-silicon preform.  
BONDING PAD ASSIGNMENTS  
36  
35  
34 33  
32  
31  
29  
28 27 26  
25  
37  
38  
24  
23  
22  
21  
19  
CHIP THICKNESS: 15 TYPICAL  
BONDING PADS: 3.3 × 3.3 MINIMUM  
T
J
max = 150°C  
39  
TOLERANCES ARE ±10%.  
ALL DIMENSIONS ARE IN MILS.  
40  
42  
138  
18  
16  
43  
45  
46  
15  
14  
47  
48  
13  
1
2
3
4
5
6
7
8
10 11  
12  
138  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
Terminal Functions  
TERMINAL  
I/O  
DESCRIPTION  
Ground. GND terminals should be externally connected to ground to ensure proper functionality.  
NAME  
NO.  
GND  
1, 15,  
25, 36  
V
CC  
2, 31,  
40  
Supplyvoltageinput.V  
proper functionality.  
terminalsarenotconnectedinternallyandmustbeexternallyconnectedtoensure  
CC  
PL  
3
4
5
6
7
8
I
O
O
I
Program L. PL provides voltage programming input for regulator L.  
Ringer amplifier noninverting output  
Ringer amplifier inverting output  
RNGR_OUT+  
RNGR_OUT–  
RNGR_IN  
RNGR_EN  
RESET  
Ringer amplifier input  
I
Ringer amplifier enable input; logic low enables the amplifier  
Microprocessor reset output  
O
NC  
9, 17,  
20, 30  
41, 44  
No connection  
AREF  
10  
Analog reference. A 0.1-µF capacitor must be connected from AREF to ground. No other connections are  
allowed.  
VCP  
11  
12  
13  
14  
16  
18  
19  
21  
22  
23  
24  
26  
27  
28  
29  
32  
33  
34  
35  
37  
38  
39  
42  
43  
45  
46  
47  
48  
Charge pump driver supply voltage  
GND_CP  
CP  
Charge pump driver ground  
O
I
Charge pump driver output  
EN_CP  
ON_REM  
MIC_OUT  
MIC_IN–  
MIC_IN+  
REF  
Charge pump driver enable input. Logic low on EN_CP turns on the charge pump.  
Remote on; logic high enables the part.  
I
O
I
Microphone amplifier output  
Microphone amplifier inverting input  
I
Microphone amplifier noninverting input  
O
O
1.185-V reference output. Decouple with 0.01-µF to 0.1-µF capacitor to ground.  
Regulator A output voltage  
VA  
CA  
Regulator A filter capacitor connection  
EN_A  
MIC_EN  
PA  
I
I
I
Regulator A enable input; logic low turns on the regulator.  
Microphone amplifier enable input; logic low turns on the microphone amplifier.  
Program A. PA provides programming input for Regulator A.  
EN  
I/O Enable signal input/output; logic low enables the part.  
ON  
O
I
On-signal output  
OFF  
Off signal  
PB  
I
Program B. PB provides programming input for Regulator B.  
Regulator B enable input; logic low turns on the regulator.  
Regulator B filter capacitor connection  
Regulator B output voltage  
EN_B  
CB  
I
VB  
O
O
O
I
SPKR_OUT+  
SPKR_OUT–  
SPKR_IN  
VL  
Speaker amplifier noninverting output  
Speaker amplifier inverting output  
Speaker amplifier input  
O
Regulator L output voltage  
CL  
Regulator L filter capacitor connection  
Speaker amplifier enable input; logic low enables the amplifier.  
On signal; logic low enables the part.  
SPKR_EN  
ON  
I
I
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
detailed description  
voltage reference  
The regulators and reset generator utilize an internal 1.185-V band-gap voltage reference. The reference isalso  
buffered and brought out on REF for external use; REF can source a maximum of 2 mA. A 0.01-µF to 0.1-µF  
capacitor must be connected between REF and ground.  
LDO regulators  
TheTPS9104includesthreelow-dropoutregulators, implementedwith1-PMOSseries-passtransistors, with  
quiescent supply currents of 100 µA. Each of the regulators can supply up to 100 mA of continuous output  
current. The 1-PMOS series-pass transistor achieves the dropout voltage of just 100 mV at the maximum  
rated output current. Each regulator output voltage can be independently programmed to either 3.3 V or 3 V  
using its programming control input PL, PA or PB (Px). A logic low on Px sets the output voltage of the regulator  
to 3.3 V; a logic high sets it to 3 V.  
Each LDO contains a current limit circuit. When the current demand on the regulator exceeds the current limit,  
the output voltage drops in proportion to the excess current. When the excess load current is removed, the  
output voltage returns to regulation. Exceeding the current limit on VL can disable the TPS9104. If enough  
current demand is placed on VL, the output voltage drops below the reset threshold voltage causing RESET  
to go low, effectively unlatching the enable.  
VL is intended to be the primary supply voltage for the microprocessor and other system logic functions. VA and  
VB can be used to power low-noise analog circuits and/or implement system power management. The enable  
terminals EN_A and EN_B are utilized to power down circuitry when it is not required. EN_A and EN_B are  
TTL-compatible inputs with 10-µA active current-source pullups. A logic low enables the respective regulator  
while a logic high pulls the regulator output voltage to ground and reduces the regulator quiescent current to  
leakage levels. Both EN_A and EN_B are not active until RESET is logic high.  
Stability of the LDOs is ensured by the addition of compensation terminals CL, CA, and CB, which connect to  
the output of the regulator through an internal 1-resistor. This compensation scheme allows for capacitors  
with equivalent series resistance (ESR) of up to 15 , eliminating the need for expensive, low-ESR capacitors.  
reset generator  
RESET is a microprocessor reset signal that goes to logic low at power-up, or whenever VL drops below 2.93 V  
(2.6 V for 3-V applications), and remains in that state for 250 ms after VL exceeds the RESET threshold (see  
Figure 5). The open-drain output has a 30-µA pullup that eliminates the need for an external pullup resistor and  
still allows it to be connected with other open-drain or open-collector signals. RESET is valid for supply voltages  
as low as 1.5 V.  
ON, OFF, ON, ON_REM and EN functions  
The ON input is intended to be the main enable for the TPS9104 and should be connected to ground through  
a push-button switch. Once the switch is pressed, internal logic pulls EN low. The EN terminal is designed to  
sink 3.2 mA and can be used as a pulldown to enable other functions on the TPS9104 or other system circuitry.  
When EN is pulled low, the TPS9104 checks to make sure the supply voltage is above the UVLO threshold  
voltage and the die temperature is below 160°C. If both of these conditions are met, the reference circuitry,  
regulator L, reset generator, and other support circuitry are enabled. When RESET goes high, the system can  
respond with a logic high on OFF, which latches the TPS9104 on, and the ON push button can then be released.  
The TPS9104 is disabled in a similar manner. If the ON push button is pressed while the TPS9104 is enabled,  
the ON signal responds with a logic high. Once this logic high is detected, the system can respond with a logic  
low on OFF, disabling the TPS9104 and reducing supply currents to 1 µA (see Figure 1).  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
The ON_REM signal can be used in the same manner as ON in enabling or disabling the TPS9104. The signal  
is provided as a system interface to increase the flexibility of the system. EN can also be used as an input  
wired-OR open collector/drain to enable the TPS9104; however, it does not produce a logic signal ON and  
therefore cannot be used in the disable sequence described above. It is not recommended that EN be used as  
the primary enable signal for the TPS9104.  
Enable Sequence  
Disable Sequence  
ON Must Be Held Low Until  
System Responds With A High  
Signal At OFF.  
ON Is Pressed To Turn Off  
The System (Phone).  
ON  
ON  
Once EN Goes Low, The Status Of The  
UVLO And The OTP Are Checked.  
EN  
VL  
If The UVLO And OTP Are Valid, VL  
And Other Functions Are Enabled.  
250 ms  
RESET  
250 ms After VL Rises Above The Reset  
Threshold Voltage, RESET Goes High.  
The System Can Now  
Respond With A High Signal  
At OFF.  
Once OFF And RESET Are High,  
The Enable Input Is Latched On.  
OFF  
System Detects The High  
Signal At ON And  
Responds With a Low  
Signal At OFF.  
VA  
VB  
EN_A And EN_B Are both Active And  
Low.  
Figure 1. Recommended Enable and Disable Sequence  
speaker/ringer power amplifiers  
The TPS9104 includes two differential-output power amplifiers capable of driving dynamic or piezoelectric  
speakers. Both amplifiers have enable inputs to reduce supply current to leakage levels when the amplifiers  
are not in use. Depopping circuitry prevents objectionable noise when the enable inputs are cycled on or off.  
Each amplifier requires only two gain-setting resistors and a capacitor for dc blocking (see Figure 46).  
RNGR_EN and SPKR_EN inputs are disabled when RESET is asserted. Both the SPKR_EN and the  
RNGR_EN have internal 10-µA pullups.  
microphone amplifier  
This is a high-gain amplifier capable of driving a 10-kload at 3 V peak-to-peak output. MIC_EN input is  
disabled when RESET is asserted. The microphone amplifier has an enable input that reduces supply current  
to leakage levels when disabled. Added depopping circuitry prevents objectionable noise when the enable input  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
is cycled on or off. The microphone amplifier needs only two resistors to set the gain, and one capacitor for dc  
blocking (see Figure 47). Regulator A is the analog supply for the microphone amplifier, and EN_A must be  
asserted for correct operation.  
undervoltage lockout  
Undervoltage lockout (UVLO) prevents operation of the functions in the TPS9104 until the supply voltage  
exceeds the threshold voltage, eliminating abnormal power-up conditions internally and externally, and  
providing an orderly turn-on.  
overtemperature shutdown  
If the die temperature exceeds 160°C, the thermal protection circuit shuts off the TPS9104. When the die  
temperature drops below 150°C, the device can be restarted with the ON input.  
charge pump driver  
An unregulated inverting or doubler charge pump is implemented (see Figure 44) by connecting a network of  
two capacitors and two diodes to CP. In the inverting configuration, the charge pump can power an LCD or  
provide gate bias for a GaAs power amplifier. A 5-V supply for flash-memory programming or powering the  
subscriber identity module (SIM) European applications can be achieved using the doubler configuration and  
an external LDO. A logic-low input to the charge-pump enable, EN_CP, turns on the oscillator and driver; a logic  
high turns them off. EN_CP input is disabled when RESET is asserted. The EN_CP has a 10-µA internal pullup.  
DISSIPATION RATING TABLE 1 – Free-Air Temperature  
T
25°C  
DERATING FACTOR  
T
= 70°C  
T = 85°C  
A
POWER RATING  
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING  
A
PT  
1350 mW  
10.8 mW/°C  
864 mW  
702 mW  
DISSIPATION RATING TABLE 2 – Case Temperature  
25°C DERATING FACTOR = 70°C  
T
C
T
C
T = 85°C  
POWER RATING  
C
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING  
C
PT  
6579 mW  
52.6 mW/°C  
4212 mW  
3423 mW  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
MAXIMUM CONTINUOUS POWER DISSIPATION  
MAXIMUM CONTINUOUS POWER DISSIPATION  
vs  
vs  
FREE-AIR TEMPERATURE  
1400  
CASE TEMPERATURE  
7000  
6000  
1200  
1000  
800  
5000  
4000  
3000  
R
= 19°C/W  
R
= 93°C/W  
θJC  
θJA  
600  
2000  
1000  
0
400  
200  
0
25  
50  
75  
100  
125  
150  
25  
50  
75  
100  
125  
150  
T
A
– Case Temperature – °C  
T
A
– Free-Air Temperature – °C  
Figure 2  
Figure 3  
†‡  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V , VCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 12 V  
CC  
Input voltage range at OFF, MIC_EN, SPKR_EN, RNGR_EN, SPKR_IN,  
RNGR_IN, MIC_IN+, MIC_IN– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V  
Input voltage range at PL, PA, PB, EN, EN_A, EN_B,  
ON, ON_REM, EN_CP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to V  
CC  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table  
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited  
Output current range at SPKR_OUT+, SPKR_OUT–,  
RNGR_OUT+, RNGR_OUT– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA to 100 mA  
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table  
Operating free-air temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C  
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Lead Temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
All voltages are with respect to GND.  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
recommended operating conditions  
MIN NOM  
MAX  
10  
UNIT  
V
Supply voltage, V , VCP  
CC  
3
0
Input voltage, OFF, MIC_EN, SPKR_EN, RNGR_EN  
Input voltage at PL, PA, PB, EN, EN_A, EN_B, ON, ON_REM, EN_CP  
Reference output current  
5
V
0
V
V
CC  
2
0
mA  
mA  
°C  
Continuous regulator output current  
0
100  
85  
Operating free-air temperature  
–40  
electrical characteristics over recommended operating free-air temperature range,  
= VCP = 4 V, Px = 0 V, I = 35 mA, OFF = VL, ON open, ON_REM = 0 V, Cx = 10 µF  
V
CC  
O(Vx)  
(unless otherwise noted)  
voltage reference (REF)  
PARAMETER  
TEST CONDITIONS  
= 0  
MIN  
TYP  
MAX  
UNIT  
V
T
= 25°C,  
I
1.185  
A
O
Output voltage  
4 V V  
10 V,  
0 I 2 mA  
1.161  
1.209  
V
CC  
O
LDO regulators  
PARAMETER  
TEST CONDITIONS  
MIN  
3.25  
3.2  
TYP  
MAX  
3.35  
3.4  
UNIT  
T
= 25°C  
3.3  
V
V
V
A
0 I  
100 mA,  
3.5 V V  
10 V  
CC  
O(Vx)  
Output voltage at VA, VB, VL (Vx)  
Px = V  
,
T
A
= 25°C  
2.95  
3
3.05  
CC  
Px = V  
3.2 V V  
0 I  
O(Vx)  
100 mA,  
CC,  
CC  
2.9  
3.10  
200  
V
10 V  
Dropout voltage  
I
I
I
= 100 mA,  
V
= 3.2 V  
100  
30  
mV  
mV  
mV  
dB  
O(Vx)  
O(Vx)  
O(Vx)  
CC  
CC  
Load regulation  
= 0 mA to 100 mA  
= 100 mA,  
Line regulation  
V
= 3.5 V to 10 V  
10  
Ripple rejection  
f = 120 Hz  
60  
Quiescent current (each regulator)  
100  
µA  
charge pump driver  
PARAMETER  
Frequency  
TEST CONDITIONS  
MIN  
TYP  
100  
50%  
15  
MAX  
UNIT  
50  
150  
kHz  
Duty cycle  
Output resistance  
30  
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effect must be  
taken into account separately.  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
electrical characteristics over recommended operating free-air temperature range,  
V
= VCP = 4 V, Px = 0 V, I  
= 35 mA, OFF = VL, ON open, ON_REM = 0 V, Cx = 10 µF  
CC  
O(Vx)  
(unless otherwise noted) (continued)  
speaker amplifier/ringer amplifier  
PARAMETER  
TEST CONDITIONS  
Single-ended, = 32 Ω  
A = 1 V/V  
MIN  
TYP  
2
MAX  
UNIT  
V
Output voltage swing  
Output offset voltage  
R
1.6  
L
15  
30  
mV  
v
V
= 1 V,  
f = 1 kHz,  
= 32 Ω  
I(PP)  
A = 1 V/V,  
Total harmonic distortion (THD)  
0.5%  
1%  
R
v
L
Gain bandwidth product (GBW)  
Input noise  
A = 10 V/V  
v
4
20  
200  
kHz  
µVrms  
mA  
100 Hz BW 100 kHz  
Quiescent current (each amplifier)  
2
PL = V  
CC  
PL = 0 V  
1.221  
1.345  
Reference voltage, AREF  
V
microphone amplifier  
PARAMETER  
TEST CONDITIONS  
MIN  
1
TYP  
MAX  
VA –1  
1
UNIT  
V
Common mode input voltage range  
Input bias current  
Both inputs = VA/2  
–1  
2.7  
µA  
V
Output voltage swing  
Output offset voltage  
10 kload,  
VA = 3.3 V  
3
A = 1 V/V  
v
6
mV  
f = 1 kHz,  
Output voltage swing = 1 V, V  
A
= 100 V/V,  
O(PP)  
V
Total harmonic distortion (THD)  
0.5%  
1%  
Power-supply rejection ratio (PSRR)  
Common-mode rejection ratio (CMRR)  
Gain bandwidth product (GBW)  
Input noise  
A = 100 V/V  
100  
80  
dB  
dB  
v
A = 100 V/V  
v
A = 100 V/V  
v
4
kHz  
µVrms  
µA  
100 Hz BW 100 kHz  
10  
Quiescent current  
180  
RESET  
PARAMETER  
TEST CONDITIONS  
MIN  
2.871  
2.548  
125  
TYP  
MAX  
UNIT  
V
Input threshold voltage  
Input threshold voltage  
Timeout delay at RESET  
Low-level output voltage  
High-level output current  
Low-level output current  
Hysteresis  
VL voltage decreasing  
VL voltage decreasing,  
See Figure 5  
2.93 2.989  
2.6 2.652  
PL = V  
V
CC  
250  
375  
0.4  
–20  
3.2  
ms  
V
I
= 1 mA,  
V
CC  
= 1.5 V  
O
V
= 2.4 V  
= 0.4 V  
–40  
µA  
mA  
mV  
O
O
V
40  
logic inputs at EN_A, EN_B, SPKR_EN, RNGR_EN, MIC_EN, EN_CP  
PARAMETER  
High-level input voltage  
Low-level input voltage  
Input current  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
2
0.8  
1
V
–20  
–10  
µA  
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effect must be  
taken into account separately.  
10  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
electrical characteristics over recommended operating free-air temperature range,  
= VCP = 4 V, Px = 0 V, I = 35 mA, OFF = VL, ON open, ON_REM = 0 V, Cx = 10 µF  
V
CC  
O(Vx)  
(unless otherwise noted) (continued)  
logic inputs at PL, PA, PB, OFF, ON_REM  
PARAMETER  
TEST CONDITIONS  
TEST CONDITIONS  
MIN  
TYP  
TYP  
MAX  
UNIT  
V
High-level input voltage  
Low-level input voltage  
Input current  
2
0.8  
1
V
–1  
µA  
logic inputs at ON  
PARAMETER  
MIN  
MAX  
UNIT  
V
High-level input voltage  
Low-level input voltage  
Input current  
2
0.8  
1
V
–20  
µA  
logic inputs at EN  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
High-level input voltage  
Low-level input voltage  
Source current  
2.4  
0.8  
1
V
V
V
= 2.4 V  
= 0.4 V  
OFF = 0  
–50  
–30  
µA  
mA  
O
Sink current  
3.2  
O
logic outputs at ON  
PARAMETER  
High-level output voltage  
Low-level output voltage  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
1-mA source current  
1-mA sink current  
2.4  
0.4  
V
overtemperature shutdown  
PARAMETER  
Temperature threshold  
Temperature hysteresis  
TEST CONDITIONS  
MIN  
TYP  
160  
10  
MAX  
UNIT  
°C  
°C  
undervoltage lockout (UVLO)  
PARAMETER  
TEST CONDITIONS  
increasing  
MIN  
TYP  
MAX  
UNIT  
V
Threshold  
V
CC  
1.80  
2.52  
Hysteresis  
50  
mV  
supply current  
PARAMETER  
Shutdown  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
OFF = 0 V  
0.5  
10  
µA  
EN_CP = VCP,  
RNGR_EN = VL,  
SPKR_EN = VL,  
MIC_EN = VL  
Operating  
0.7  
1
mA  
High and low level voltages are dependent on V . See graphs.  
CC  
11  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TPS9104Y electrical characteristics, T = 25°C, V  
= VCP = 4 V, Px = 0 V, I  
= 35 mA,  
O(Vx)  
J
CC  
OFF = VL, ON open, ON_REM = 0 V, Cx 10 µF (unless otherwise noted)  
=
voltage reference (REF)  
PARAMETER  
Output voltage  
MIN  
TYP  
MAX  
UNIT  
TEST CONDITIONS  
TEST CONDITIONS  
I
= 0  
1.185  
V
O
LDO Regulators  
PARAMETER  
MIN  
TYP  
3
MAX  
UNIT  
V
Output voltage at VA, VB, VL (Vx)  
Dropout voltage  
P = V  
2.95  
3.05  
x
CC  
I
I
I
= 100 mA,  
V
= 3.2 V  
CC  
100  
30  
mV  
mV  
mV  
dB  
O(Vx)  
O(Vx)  
O(Vx)  
Load regulation  
= 0 mA to 100 mA  
= 100 mA,  
Line regulation  
V
CC  
= 3.5 V to 10 V  
10  
Ripple rejection  
f = 120 Hz  
60  
Quiescent current (each regulator)  
100  
µA  
charge pump driver  
PARAMETER  
Frequency  
TEST CONDITIONS  
MIN  
MIN  
TYP  
100  
50%  
15  
MAX  
MAX  
UNIT  
kHz  
Duty cycle  
Output resistance  
speaker amplifier/ringer amplifier  
PARAMETER  
TEST CONDITIONS  
Single-ended, = 32 Ω  
A = 1 V/V  
TYP  
2
UNIT  
V
Output voltage swing  
Output offset voltage  
R
L
15  
mV  
v
V
= 1 V,  
f = 1 kHz,  
= 32 Ω  
I(PP)  
A = 1 V/V,  
Total harmonic distortion (THD)  
0.5%  
R
v
L
Gain bandwidth product (GBW)  
Input noise  
A = 10 V/V  
v
20  
200  
kHz  
µVrms  
mA  
100 Hz BW 100 kHz  
Quiescent current (each amplifier)  
2
PL = V  
1.221  
1.345  
CC  
Reference, AREF  
V
PL = 0 V  
microphone amplifier  
PARAMETER  
TEST CONDITIONS  
MIN  
1
TYP  
MAX  
UNIT  
V
Common mode input range  
Output voltage swing  
Output offset voltage  
VA –1  
10 kload,  
VA = 3.3 V  
2.7  
3
V
A = 1 V/V  
v
6
mV  
RESET  
PARAMETER  
Threshold voltage  
Threshold voltage  
Delay  
TEST CONDITIONS  
MIN  
TYP  
2.93  
2.6  
MAX  
UNIT  
V
VL voltage decreasing  
VL voltage decreasing,  
See Figure 5  
PL = V  
V
CC  
250  
40  
ms  
mV  
Hysteresis  
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effect must be  
taken into account separately.  
12  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
40  
2
31  
11  
13  
12  
22  
Voltage  
Reference  
Charge Pump  
Driver  
REF  
0.1 µF  
38  
37  
REF  
Regulator  
B
+
10 µF  
14  
35  
26  
34  
23  
24  
Regulator  
A
+
10 µF  
28  
VL  
45  
46  
Regulator  
L
+
3
10 µF  
Reset  
Generator  
8
RESET  
29  
48  
EN  
ON  
33  
32  
OFF  
ON  
16  
43  
ON_REM  
42  
_
LOAD  
39  
47  
+
VL  
10  
6
0.1 µF  
4
+
_
LOAD  
5
7
21  
19  
LOAD  
V
+
_
I(test)  
18  
27  
0.1 µF  
36  
1
25  
15  
Figure 4. Test Circuit  
13  
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POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
PARAMETER MEASUREMENT INFORMATION  
VL  
V
IT+  
t
RESET  
RESET  
Timeout Delay  
t
Figure 5. RESET Timing Diagram  
5
4
3
V
= 4 V  
CC  
Px = 0 V  
Enable  
T
= 25°C  
= 0 mA  
A
O
2
1
I
Cx = 10 µF  
0
4
3
2
1
0
V
O
0
4
8
12  
16  
20  
t – Time – ms  
Figure 6. LDO Regulator Output Voltage Rise Time and Fall Time  
14  
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POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
PARAMETER MEASUREMENT INFORMATION  
125  
100  
75  
V
= 4 V  
CC  
Px = 0 V  
= 25°C  
T
A
Cx = 10 µF  
50  
25  
0
3.5  
3.4  
3.3  
3.2  
3.1  
0
0.5  
1
1.5  
2
t – Time – ms  
Figure 7. LDO Regulator Load Transient, 1 mA to 100 mA Pulsed Load  
4.4  
4.2  
4
3.8  
3.6  
3.4  
3.3  
Px = 0 V  
3.2  
T
= 25°C  
= 10 mA  
A
I
O
Cx = 10 µF  
3.1  
0
0.3  
0.5  
0.8  
1
t – Time – ms  
Figure 8. LDO Regulator Line Transient  
15  
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POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
PARAMETER MEASUREMENT INFORMATION  
5
4
3
V
T
= 4 V  
CC  
= 25°C  
A
Px = 0 V  
2
1
3.5  
3
2.5  
2
1.5  
1
0.5  
0
10  
20  
30  
40  
50  
t – Time – µs  
Figure 9. Microphone Enable Output Response  
5
V
= 4 V  
CC  
= 25°C  
4
3
T
A
Px = 0 V  
2
1
0
2.5  
2
1.5  
1
0.5  
0
10  
20  
30  
40  
50  
t – Time – µs  
Figure 10. Speaker Enable Output Response  
16  
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CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
PARAMETER MEASUREMENT INFORMATION  
5
V
= 4 V  
CC  
= 25°C  
4
3
T
A
Px = 0 V  
2
1
0
3
2.5  
2
1.5  
1
0.5  
0
10  
20  
30  
40  
50  
t – Time – µs  
Figure 11. Ringer Enable Output Response  
4
4
3
V
= 4 V  
V
= 4 V  
CC  
= 25°C  
CC  
T = 25°C  
A
T
A
Px = 0 V  
Px = 0 V  
3
2
1
0
2
1
0
0
10  
20  
30  
40  
50  
0
10  
20  
30  
40  
50  
t – Time – µs  
t – Time – µs  
Figure 12. Microphone Slew Rate, Rising  
Figure 13. Microphone Slew Rate, Falling  
17  
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POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
Table of Graphs  
FIGURE  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
I
Quiescent current  
Dropout voltage  
vs Supply voltage  
CC  
vs Output current  
vs Junction temperature  
vs Junction temperature  
vs Supply voltage  
vs Supply voltage  
vs Output current  
vs Supply voltage  
vs Supply voltage  
vs Supply voltage  
vs Supply voltage  
vs Frequency  
V  
Change in output voltage  
Output voltage, VL  
O
V
O
V  
Change in output voltage  
Change in output voltage  
Shutdown current  
O
O
V  
I
CC  
Threshold, ON  
Threshold, EN  
Threshold, ON_REM  
Ripple rejection  
Output spectral noise density  
Change in frequency, CP  
Output resistance into CP  
Output resistance out of CP  
Maximum peak output voltage  
vs Frequency  
vs Junction temperature  
vs Supply voltage  
vs Supply voltage  
vs Load resistance  
vs Frequency  
r
r
O
O
V
OM  
THD  
Total harmonic distortion  
vs Load resistance  
vs Frequency  
k
Power supply rejection ratio  
Output noise voltage  
SVR  
V
V
V
vs Frequency  
n
Output voltage  
vs Junction temperature  
vs Load  
O
Maximum peak output voltage  
OM  
vs Frequency  
THD  
Total harmonic distortion  
vs Load resistance  
vs Frequency  
k
Power supply rejection ratio  
Closed-loop gain and phase shift  
Output noise voltage  
SVR  
vs Frequency  
V
vs Frequency  
n
Φ
Phase margin  
vs Load capacitance  
m
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
LDO REGULATORS  
DROPOUT VOLTAGE  
vs  
QUIESENT CURRENT  
vs  
OUTPUT CURRENT  
SUPPLY VOLTAGE  
160  
140  
120  
100  
80  
1
Px = 0  
= 0  
T
A
= 25°C  
I
O
0.9  
0.8  
0.7  
85°C  
Px = V  
CC  
60  
25°C  
Px = 0  
–40°C  
40  
0.6  
0.5  
20  
0
3
4
5
6
7
8
9
10  
0
10 20 30 40 50 60 70 80 90 100  
– Output Current – mA  
V
CC  
– Supply Voltage – V  
I
O
Figure 14  
Figure 15  
LDO REGULATORS  
LDO REGULATORS  
CHANGE IN OUTPUT VOLTAGE  
vs  
JUNCTION TEMPERATURE  
DROPOUT VOLTAGE  
vs  
JUNCTION TEMPERATURE  
10  
8
140  
130  
120  
110  
V
= 4 V  
CC  
I
= 100 mA  
O
Px = 0  
Px = 0  
6
I
O
= 0 mA  
4
2
0
100  
90  
–2  
–4  
–6  
I
O
= 100 mA  
80  
70  
–8  
–10  
60  
–50  
–50 –25  
0
T
25  
50  
75  
100  
125  
–25  
0
25  
50  
75  
100 125  
– Temperature – °C  
T
– Temperature – °C  
J
J
Figure 17  
Figure 16  
19  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
LDO REGULATORS  
CHANGE IN OUTPUT VOLTAGE  
vs  
REGULATOR L  
OUTPUT VOLTAGE  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
3.5  
3
4
3
2
Px = 0  
= 25°C  
EN = 0  
Px = 0 or  
Px = V  
T
A
CC  
T
I
= 25°C  
= 35 mA  
A
O
2.5  
2
1
0
1.5  
1
–1  
–2  
–3  
–4  
0.5  
0
3
4
5
6
7
8
9
10  
2
2.2 2.4 2.6 2.8  
3
3.2 3.4 3.6 3.8  
4
V
CC  
– Supply Voltage – V  
V
CC  
– Supply Voltage – V  
Figure 19  
Figure 18  
LDO REGULATORS  
CHANGE IN OUTPUT VOLTAGE  
vs  
SHUTDOWN CURRENT  
vs  
SUPPLY VOLTAGE  
OUTPUT CURRENT  
4
20  
V
= 4 V  
CC  
Px = 0 or Px = V  
OFF = 0  
CC  
3.5  
15  
10  
T
A
= 25°C  
3
2.5  
2
5
0
–5  
1.5  
1
0.5  
0
–10  
–15  
–20  
T
A
= 25°C  
T
= 85°C  
A
T
A
= 40°C  
2
3
4
5
6
7
8
9
10  
0
10 20 30 40 50 60 70 80 90 100  
V
CC  
– Supply Voltage – V  
I
O
– Output Current – mA  
Figure 21  
Figure 20  
20  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
INPUT THRESHOLD VOLTAGE, EN  
INPUT THRESHOLD VOLTAGE, ON  
vs  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
4.9  
4.4  
1.8  
1.6  
1.4  
1.2  
1
OFF = 0 V  
EN = Open  
ON_REM = 0 V  
OFF = 0 V  
ON = Open  
ON_REM = 0 V  
–40°C  
3.9  
25°C  
85°C  
3.4  
2.9  
2.4  
1.9  
1.4  
0.8  
2
3
4
5
6
7
8
9
10  
2
4
6
8
10  
V
CC  
– Supply Voltage – V  
V
CC  
– Supply Voltage – V  
Figure 23  
Figure 22  
LDO REGULATORS  
INPUT THRESHOLD VOLTAGE, ON_REM  
RIPPLE REJECTION  
vs  
vs  
SUPPLY VOLTAGE  
FREQUENCY  
80  
60  
4
EN = Open  
ON = Open  
OFF = 0 V  
3.5  
3
2.5  
2
1.5  
1
40  
20  
V
T
= 4 V  
= 25°C  
CC  
A
Cx = 10 µF  
= 35 mA  
I
O
2
3
4
5
6
7
8
9
10  
0.01  
0.1  
1
10  
100  
1000  
V
CC  
– Supply Voltage – V  
f – Frequency – kHz  
Figure 25  
Figure 24  
21  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
REGULATOR L  
CHANGE IN FREQUENCY, CP  
vs  
JUNCTION TEMPERATURE  
OUTPUT SPECTRAL NOISE DENSITY  
vs  
FREQUENCY  
4
3
100  
10  
1
VCP = 4 V  
V
= 4 V  
CC  
Px = 0 V  
T
= 25°C  
= 35 mA  
A
O
I
2
1
0
–1  
–2  
–3  
–50  
–25  
0
25  
T – Temperature – °C  
J
50  
75  
100  
125  
1
10  
100  
1000  
10000  
f – Frequency – Hz  
Figure 27  
Figure 26  
OUTPUT RESISTANCE, CP  
vs  
OUTPUT RESISTANCE, CP  
vs  
SUPPLY VOLTAGE  
SUPPLY VOLTAGE  
30  
25  
30  
25  
20  
Current Into CP  
Current Out of CP  
20  
15  
10  
85°C  
25°C  
15  
85°C  
10  
5
–40°C  
25°C  
5
0
–40°C  
0
3
4
5
6
7
8
9
10  
3
4
5
6
7
8
9
10  
V
– Supply Voltage – V  
V
– Supply Voltage – V  
CC(VCP)  
CC(VCP)  
Figure 29  
Figure 28  
22  
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SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
SPEAKER AND RINGER AMPLIFIERS  
TOTAL HARMONIC DISTORTION  
vs  
SPEAKER AND RINGER AMPLIFIERS  
MAXIMUM PEAK OUTPUT VOLTAGE  
vs  
FREQUENCY  
LOAD RESISTANCE  
3
2
1
3
Px = 0 V  
= 4 V  
Px = 0 V  
= 4 V  
V
CC  
= 25°C  
2.8  
V
CC  
= 25°C  
T
A
T
A
V
R
A
= 1 V  
O(PP)  
2.6  
2.4  
2.2  
f = 1 kHz  
= 1 V/V  
= 32 Ω  
L
A
v
= 1 V/V  
v
2
1.8  
1.6  
1.4  
1.2  
1
0
0.1  
1
10  
10  
100  
1000  
f – Frequency – kHz  
R
– Load Resistance – Ω  
L
Figure 31  
Figure 30  
SPEAKER AND RINGER AMPLIFIERS  
SPEAKER AND RINGER AMPLIFIERS  
TOTAL HARMONIC DISTORTION  
vs  
POWER SUPPLY REJECTION RATIO  
vs  
LOAD RESISTANCE  
FREQUENCY  
0.6  
0.5  
0.4  
0.3  
0.2  
100  
80  
Px = 0 V  
Px = 0 V  
V = 4 V  
CC  
= 25°C  
V
T
= 4 V  
CC  
= 25°C  
T
A
A
f = 1 kHz  
= 1 V  
V
A
O(PP)  
= 1 V/V  
v
60  
40  
20  
0
0.1  
0
0
500  
1000  
1500  
2000  
2500  
3000  
0.01  
0.1  
1
10  
100  
1000  
R
– Load Resistance – Ω  
f – Frequency – kHz  
L
Figure 33  
Figure 32  
23  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
SPEAKER AND RINGER AMPLIFIERS  
OUTPUT NOISE VOLTAGE  
vs  
SPEAKER AND RINGER AMPLIFIERS  
OUTPUT VOLTAGE  
vs  
FREQUENCY  
JUNCTION TEMPERATURE  
2.2  
2.1  
2
200  
Px = 0 V  
= 4 V  
Px = 0 V  
V
V = 4 V  
CC  
T = 25°C  
CC  
A
150  
100  
1.9  
1.8  
1.7  
50  
0
1.6  
–55  
–25  
0
T
25  
50  
75  
100  
125  
0.1  
1
10  
– Temperature – °C  
f – Frequency – kHz  
J
Figure 35  
Figure 34  
MICROPHONE AMPLIFIER  
MICROPHONE AMPLIFIER  
TOTAL HARMONIC DISTORTION  
MAXIMUM PEAK OUTPUT VOLTAGE  
vs  
vs  
FREQUENCY  
LOAD RESISTANCE  
0.24  
0.22  
3.5  
3
V
= 4 V  
V
= 4 V  
CC  
CC  
Px = 0 V  
= 25°C  
Px = 0 V  
T
T
= 25°C  
A
A
f = 1 kHz  
A
v
= 100 V/V  
0.2  
2.5  
2
0.18  
0.16  
1.5  
0.14  
0.12  
1
100  
1 k  
10 k  
100 k  
0.1  
1
10  
R
L
– Load Resistance – Ω  
f – Frequency – kHz  
Figure 37  
Figure 36  
24  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
MICROPHONE AMPLIFIER  
POWER SUPPLY REJECTION RATIO  
MICROPHONE AMPLIFIER  
TOTAL HARMONIC DISTORTION  
vs  
vs  
FREQUENCY  
LOAD RESISTANCE  
100  
80  
0.35  
V
= 4 V  
V
= 4 V  
CC  
Px = 0 V  
CC  
Px = 0 V  
T = 25°C  
A
T
A
= 25°C  
0.3  
0.25  
60  
0.2  
40  
20  
0.15  
0.1  
0.01  
0.1  
1
10  
100  
1000  
0
10  
20  
30  
40  
50  
60  
f– Frequency – kHz  
R
– Load Resistance – kΩ  
L
Figure 39  
Figure 38  
MICROPHONE AMPLIFIER  
MICROPHONE AMPLIFIER  
CLOSED-LOOP GAIN AND PHASE SHIFT  
OUTPUT NOISE VOLTAGE  
vs  
vs  
FREQUENCY  
FREQUENCY  
225°  
40  
30  
20  
100  
V
= 4 V  
V
= 4 V  
CC  
Px = 0 V  
CC  
Px = 0 V  
T = 25°C  
A
A
R
T
A
= 100  
= 10 kΩ  
= 25°C  
v
L
180°  
135°  
80  
60  
40  
Gain  
Phase  
10  
0
90°  
20  
0
45°  
0°  
–10  
1
10  
100  
1000  
10000  
1
10  
100  
1000  
f – Frequency – Hz  
f – Frequency – kHz  
Figure 41  
Figure 40  
25  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
TYPICAL CHARACTERISTICS  
MICROPHONE AMPLIFIER  
PHASE MARGIN  
vs  
LOAD CAPACITANCE  
80°  
60°  
V
= 4 V  
CC  
Px = 0 V  
T
A
= 25°C  
40°  
20°  
0°  
0
0.2  
0.4  
0.6  
0.8  
1
C
– Load Capacitance – µF  
L
Figure 42  
26  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
THERMAL INFORMATION  
Using thermal resistance, junction-to-ambient (R  
equation:  
), maximum power dissipation can be calculated with the  
θJA  
T
T
J(max)  
R
A
P
D(max)  
JA  
Where T  
is the maximum allowable junction temperature or 125°C.  
J(max)  
This limit should then be applied to the internal power dissipation of the TPS9104. The equation for calculating  
total internal power dissipation of the TPS9104 is:  
P
V
V
I
V
I
D(max)  
I
X
X
I
Q
x
Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces,  
andthepresenceofotherheat-generatingcomponentsaffectthepowerdissipationlimitsofagivencomponent.  
Three basic approaches for enhancing thermal performance are:  
Improving the power dissipation capability of the PWB design  
Improving the thermal coupling of the component to the PWB  
Introducing airflow in the system  
27  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
APPLICATION INFORMATION  
BATTERY  
1 µF  
Voltage  
Reference  
REF  
0.1 µF  
Charge Pump  
4.7 µF  
RF  
Section  
REF  
Regulator  
B
3.3 V  
7–13 µF  
Analog  
Section  
Regulator  
A
3.3 V  
7–13 µF  
Regulator  
L
3.3 V  
7–13 µF  
Reset  
Generator  
RESET  
OFF  
Processor  
and  
Logic  
EN  
ON  
ON  
Section  
ON_REM  
Audio  
Speaker  
SPKR_IN  
RNGR_IN  
_
+
VL  
SPKR_EN  
0.1 µF  
+
_
Ringer  
Speaker  
RNGR_EN  
+
_
REF  
MIC  
0.1 µF  
MIC_EN  
GND  
Figure 43. Typical Application  
28  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
APPLICATION INFORMATION  
LDOs (VL, VA, VB) output capacitors  
A 10-µF capacitor must be tied to Cx (CL, CA, or CB). The Cx terminal is connected internally to the output of  
the LDO through a 1-resistor. The stability of LDOs is dependent on the ESR of the output filter capacitor. Most  
LDOs are designed to be stable over a narrow range of ESR with lower limits and upper limits, thus limiting the  
type of capacitor that can be used. With the use of the internal 1-resistor, the lower ESR limit of the capacitor  
is eliminated, permitting the upper limit to be raised. Therefore, almost any tantalum or ceramic capacitor can  
be used, provided the ESR does not exceed 15 over temperature.  
charge pump design  
V
CC  
V
CC  
VCP  
CP  
VCP  
CP  
C1  
C1  
V
O
V
O
+
C2  
C2  
+
GND_CP  
GND_CP  
a. Voltage Inverter  
b. Voltage Doubler  
Figure 44. Charge Pump Configurations  
The charge-pump terminal can drive either a voltage inverter or a voltage doubler. In either case only two  
capacitors and two signal diodes are needed. The output voltage is unregulated and a regulator may be added  
if needed.  
The charge transfer of C1 is:  
(
)
V
O
q
C1  
V
CC  
This occurs f times a second and the charge transfer per unit time (current) is:  
(
)
V
I
f
C1  
V
O
CC  
Rewriting this equation in the form of I = V/R  
V
V
CC  
f
O
I
1
C1  
1
where  
is an equivalent resistor.  
f
C1  
29  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
APPLICATION INFORMATION  
charge pump design (continued)  
An equivalent circuit can now be drawn taking the diodes into account.  
R
R
R
R
equiv  
internal  
equiv  
internal  
–(V  
–V  
)
2V  
–V  
CC diode  
CC diode  
+
C2  
C2  
+
a. Voltage Inverter  
b. Voltage Doubler  
Figure 45. Equivalent Circuit  
The output voltage for the doubler is then:  
V
2
V
2
V
I
R
CC  
diode  
O
total  
O
and the output voltage for the inverter is:  
(
)
V
V
2
V
I
R
CC  
diode  
O
total  
O
To determine the size of C1 use  
I
C
f
V
where f = 100,000 and V = ripple voltage.  
For an output current of 10 mA calculate  
0.01 A  
C1  
1 F  
100 kHz  
0.1 V  
ripple  
Because of losses caused by diode switching and ESR, the calculated capacitance should be multiplied by 1.5  
to 2. A 2-µF capacitance should drive a 10-mA voltage doubler or inverter.  
amplifier design  
TPS9104  
SPKR_OUT+  
or RNGR_OUT+  
AREF  
+
–1  
_
C2  
0.1 µF  
Speaker  
SPKR_IN  
SPKR_OUT–  
or RNGR_IN  
or RNGR_OUT–  
Audio In  
C1  
R1  
R2  
Figure 46. Speaker and Ringer Amplifiers  
30  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
APPLICATION INFORMATION  
amplifier design (continued)  
The speaker and ringer amplifiers are capable of driving either dynamic or piezoelectric speakers. The gain is  
set with two external resistors connected as shown. There is an inverting stage and a noninverting stage, both  
of which can drive a speaker differentially. When the speaker is connected in the differential mode, the gain is  
doubled. The gain equation is  
R2  
R1  
G
2
Typically R2 is in the range of 10 kto 100 kand the gain can be as high as 10. The noninverting amplifier  
input is connected to the internal reference and should be bypassed with a 0.1-µF capacitor. The audio input  
signal must be capacitor-coupled (refer to C1 in Figure 47). R1 and C1 determine the low-frequency pole (f )  
p
location. The frequency response of the input RC is:  
1
f
p
2
R1 C1  
For a 0.22-µF capacitor and a 1-kresistor, the 3-dB point is  
1
f
750 Hz  
p
2
1K 0.22  
F
Both V  
and VL supply power to the speaker and ringer amplifiers. The output of VL is used to power the  
CC  
high-gain input stage, and V  
capacitive load, series resistance should be added to minimize signal distortion.  
is used to power the low-gain high-current output stage. When driving a highly  
CC  
TPS9104  
+
_
MIC_IN+  
MIC_OUT  
MIC_IN–  
R1  
Microphone  
C1  
R2  
Figure 47. Microphone Amplifier  
This is a high-gain amplifier capable of driving a 10 kload at 3 V. The gain is set using two external resistors,  
R2  
R1  
G
R1 and R2. A low noise reference must be connected to MIC_IN+. The gain equation is:  
. Typically  
R2 can be in the range of 10 kto 100 kand the gain can be up to 100. The microphone must be either  
capacitor-coupled (C1) or tied to the reference. The closed-loop –3 dB point for this amplifier is a minimum of  
4 kHz. The location of the low-frequency pole can be calculated using  
1
f
p
.
2
R1 C1  
31  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS9104  
CELLULAR SUBSCRIBER TERMINAL  
POWER SUPPLY/AUDIO SYSTEM  
SLVS133A – AUGUST 1996 – REVISED APRIL 1998  
MECHANICAL DATA  
PT (S-PQFP-G48)  
PLASTIC QUAD FLATPACK  
0,27  
0,17  
M
0,08  
0,50  
36  
25  
37  
24  
48  
13  
0,13 NOM  
1
12  
5,50 TYP  
7,20  
SQ  
6,80  
Gage Plane  
9,20  
SQ  
8,80  
0,25  
0,05 MIN  
0°7°  
1,45  
1,35  
0,75  
0,45  
Seating Plane  
0,10  
1,60 MAX  
4040052/C 11/96  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-026  
D. This may also be a thermally enhanced plastic package with leads conected to the die pads.  
32  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor  
product or service without notice, and advises its customers to obtain the latest version of relevant information  
to verify, before placing orders, that the information being relied on is current and complete.  
TI warrants performance of its semiconductor products and related software to the specifications applicable at  
the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are  
utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each  
device is not necessarily performed, except those mandated by government requirements.  
Certain applications using semiconductor products may involve potential risks of death, personal injury, or  
severe property or environmental damage (“Critical Applications”).  
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED  
TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS.  
Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI  
products in such applications requires the written approval of an appropriate TI officer. Questions concerning  
potential risk applications should be directed to TI through a local SC sales office.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards should be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance, customer product design, software performance, or  
infringement of patents or services described herein. Nor does TI warrant or represent that any license, either  
express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property  
right of TI covering or relating to any combination, machine, or process in which such semiconductor products  
or services might be or are used.  
Copyright 1998, Texas Instruments Incorporated  

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