TPS92638-Q1 [TI]
具有 PWM 调光功能的汽车类 8 通道线性 LED 驱动器;
| 型号： | TPS92638-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 PWM 调光功能的汽车类 8 通道线性 LED 驱动器 驱动 驱动器 |
| 文件： | 总37页 (文件大小：4921K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
具有 PWM 调光功能的 TPS92638-Q1 8 通道线性 LED 驱动器
1 特性
该器件可驱动多达八个灯串，每个灯串上可有一到三个
1
LED，每个通道的总电流高达 70mA。可通过将多个输
出并行以提供高达 560mA 的驱动电流。
•
符合汽车类应用 要求
–
器件温度等级 1：–40°C 至 125°C 的环境工作
温度范围
在多灯串 应用中，该器件的优势在于支持 LED 灯串进
行共阴极连接。因此，对于具有低端电流感应功能的系
统而言，只需要一条回线即可，而无需为每个 LED 灯
串配一条回线。
–
–
器件 HBM ESD 分类等级 H2
器件 CDM ESD 分类等级 C3B
•
提供功能安全
可帮助进行功能安全系统设计的可用文档
–
该器件具有在高电流和低电流之间切换 LED 电流的能
力，适用于停车灯和尾灯 应用。可通过两个基准电阻
为每个输出设置这两种 LED 电流电平。
•
•
•
具有模拟和 PWM 调光功能的 8 通道 LED 驱动器
宽输入电压范围：5V 至 40V
由基准电阻器设定的可调恒定输出电流
–
–
–
–
最大电流：每通道 70mA
最大电流：并行工作模式下为 560mA
精度：每通道 ±3%
该器件包含温度监控器，可在集成电路 (IC) 结温超过
温度阈值时降低 LED 驱动电流。温度阈值可通过外部
电阻进行编程。将 TEMP 引脚接地面可禁用热电流监
视功能。可在出厂程序中选择将结温以模拟电压的形式
输出。
精度：每个器件 ±4%
•
PWM 调光输入 (PWM)
开/关延时：25µs（典型值），45µs（最大值）
–
器件信息(1)
封装
•
•
•
4 组 PWM 调光功能，可控制 8 个通道
通过去毛刺脉冲实现 LED 开路和短路检测
器件型号
TPS92638-Q1
封装尺寸（标称值）
HTSSOP (20)
6.50mm × 4.40mm
用于报告开路、短路和热关断故障的故障引脚，允
许并行总线最多连接 15 个器件
(1) 如需了解所有可用封装，请见数据表末尾的可订购产品附录。
•
高温电流折返功能，可防止热关断，具有可编程阈
值
4 典型应用原理图
Tail
•
•
•
•
一个用于停车灯电流设定点的电阻
一个用于尾灯电流设定点的电阻
SUPPLY
EN
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
PWM1
PWM2
PWM3
PWM4
工作结温范围：-40°C 至 150°C
Stop
Stop
封装：20 引脚耐热增强型 PWP 封装 (PDSO)
STOP
FAULT
2 应用
V(bat)
TPS92638-Q1
REFHI
REF
LED 照明 应用 （例如，日间行车灯、位置灯、雾
灯、后灯、刹车灯或尾灯、内部照明）
TEMP
GND
3 说明
TPS92638-Q1 是一款具有 PWM 调光控制功能的八通
道线性 LED 驱动器。其设计非常适合用于将多个 LED
灯串驱动至中等功率范围。
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSCK5
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
目录
9.1 Overview ................................................................. 13
9.2 Functional Block Diagram ....................................... 13
9.3 Feature Description................................................. 14
9.4 Device Functional Modes........................................ 20
10 Application and Implementation........................ 21
10.1 Application Information.......................................... 21
10.2 Typical Applications .............................................. 21
11 Power Supply Recommendations ..................... 28
12 Layout................................................................... 28
12.1 Layout Guidelines ................................................. 28
12.2 Layout Example .................................................... 28
12.3 Thermal Information.............................................. 29
13 器件和文档支持 ..................................................... 30
13.1 商标....................................................................... 30
13.2 静电放电警告......................................................... 30
13.3 Glossary................................................................ 30
14 机械、封装和可订购信息....................................... 30
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
典型应用原理图........................................................ 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Switching Characteristics.......................................... 6
7.7 Typical Characteristics.............................................. 7
Parameter Measurement Information ................ 12
Detailed Description ............................................ 13
8
9
5 修订历史记录
Changes from Revision B (March 2015) to Revision C
Page
•
向特性 部分添加了功能安全链接 ............................................................................................................................................ 1
Changes from Revision A (November 2014) to Revision B
Page
•
•
已更改通道精度和器件精度的值 ............................................................................................................................................. 1
删除了 “说明” 部分中第四段的文本 ........................................................................................................................................ 1
Changes from Original (September 2014) to Revision A
Page
•
•
•
•
•
已更改 更改了 “特性” 列表中的某些项目................................................................................................................................. 1
已更改 更改了 “应用” 部分中的项目 ....................................................................................................................................... 1
已更改 用新文本更改了 “说明” 部分的段落............................................................................................................................. 1
Deleted the existing Pin Functions table and replaced with new one ................................................................................... 3
Added new sections and subsections to the data sheet beginning with the Specifications section ...................................... 4
2
Copyright © 2014–2020, Texas Instruments Incorporated
TPS92638-Q1
www.ti.com.cn
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
6 Pin Configuration and Functions
20-Pin PDSO With PowerPAD Package
PWP Package
(Top View)
SUPPLY
EN
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
GND
STOP
PWM1
PWM2
PWM3
PWM4
FAULT
TEMP
REFHI
Thermal
Pad
10
REF
Pin Functions
PIN
I/O
DESCRIPTION
NAME
EN
NO.
2
I
I/O
—
O
O
O
O
O
O
O
O
I
Enable and shutdown
Fault pin
FAULT
GND
8
12
20
19
18
17
16
15
14
13
4
Ground
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
PWM1
PWM2
PWM3
PWM4
REF
Current output pin
Current output pin
Current output pin
Current output pin
Current output pin
Current output pin
Current output pin
Current output pin
PWM input and channel ON-OFF for CH1 and CH2
PWM input and channel ON-OFF for CH3 and CH4
PWM input and channel ON-OFF for CH5 and CH6
PWM input and channel ON-OFF for CH7 and CH8
Reference resistor terminal for normal current setting
Reference resistor pin for stop light current setting
Signal input for the stop light
5
I
6
I
7
I
11
10
3
I
REFHI
STOP
SUPPLY
TEMP
I
I
1
I
Input pin – VBAT supply
9
I
Temperature foldback threshold programming
Copyright © 2014–2020, Texas Instruments Incorporated
3
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
SUPPLY, IOUTx, PWMx, EN,
Unregulated input(2) (3)
STOP
–0.3
45
V
FAULT
See(2)
See(2)
–0.3
–0.3
–40
–40
–65
22
7
V
V
REF, REFHI, TEMP
TJ
Virtual junction temperature range
Operating ambient temperature range
Storage temperature range
150
125
150
°C
°C
°C
TA
Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
(3) Absolute maximum voltage 45 V for 200 ms
7.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per AEC Q100-002(1)
Corner pins (SUPPLY,
±2000
V(ESD)
Electrostatic discharge
±750
±500
V
Charged device model
IOUT1, REF and REFHI)
(CDM), per AEC Q100-011
Other pins
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
5
NOM
MAX
40
UNIT
SUPPLY
V
EN, STOP
2
40
VIH
VIL
TJ
FAULT
2
20
V
PWMx
2
40
EN, STOP
0
0.7
0.7
0.7
5
FAULT
0
V
PWMx
0
REF, REFHI, TEMP
Operating junction temperature range
0
V
–40
150
°C
7.4 Thermal Information
TPS92638-Q1
THERMAL METRIC(1)
PWP (HTSSOP)
UNIT
20 PINS
37.8
25.2
21.7
0.8
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
21.5
2.1
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
Copyright © 2014–2020, Texas Instruments Incorporated
TPS92638-Q1
www.ti.com.cn
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
7.5 Electrical Characteristics
V(VIN) = 14 V, TJ = –40°C to 150°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY VOLTAGE AND CURRENT (SUPPLY)
I(Quiescent)
I(Shutdown)
Quiescent current
Shutdown current
V(PWMx), V(EN) = high, I(IOUTx) = 40 mA
V(PWMx) = 0 V, V(EN) = 0 V
0.5
0.6
0.9
10
mA
µA
Shutdown current in fault mode
(device to GND)
0.5
0.75
1
V(PWMx), V(EN) = high, V(FAULT) = low,
V(SUPPLY) = 5 V to 40 V, I(IOUTx) = 30 mA
I(fault)
mA
Shutdown current in fault mode
(from SUPPLY)
1.15
PWM, EN, STOP
I(EN-pd)
EN internal pulldown
V(EN) = 0 V to 40 V
0.5
1.161
1.119
5
µA
V
VIH(PWMx)
VIL(PWMx)
V(PWM-hys)
Logic input, high level(1)
Logic input, low level(1)
Hysteresis
PWMx rising from a low state, IOUTx disabled
PWMx falling from a high state, IOUTx enabled
1.222 1.283
1.178 1.237
44
V
mV
nA
µA
µA
V(PWMx) = 0 V to 20 V
V(PWMx) = 20 V to 40 V
V(STOP) = 0 V to 40 V
180
0.2
300
2
I(PWM-pd)
PWMx internal pulldown current
STOP internal pulldown
I(STOP-PD)
0.1
1
CURRENT REGULATION (IOUTx)
Each channel, V(PWMx) = high, V(EN) = high
V(SUPPLY) > 5 V, V(IOUTx) > 0.9 V
I(IOUTx)
2
16
70
560
7%
mA
mA
Regulated output current range
8 channels in parallel mode, V(PWMx) = high, V(EN)
= high, V(SUPPLY) > 5 V, V(IOUTx) > 0.9 V
I(IOUT_TOTAL)
5 mA ≤ I(IOUTx) < 10 mA, V(SUPPLY) = 5 V–40 V
Channel accuracy = (I(IOUTx) – I(avg)) / I(avg)
–7%
–3%
–18%
–8%
–4%
–20%
–10%
–8%
–20%
(2)
10 mA ≤ I(IOUTx) ≤ 70 mA, V(SUPPLY) = 5 V–40 V
Channel accuracy = (I(IOUTx) – I(avg)) / I(avg)
ΔIO(channel)
Channel accuracy
3%
(2)
2 mA ≤ I(IOUTx) < 5 mA, V(SUPPLY) = 5 V–40 V
Channel accuracy = (I(IOUTx) – I(avg)) / I(avg)
18%
8%
(2)
5 mA ≤ I(IOUTx) < 10 mA, V(SUPPLY) = 5 V to 20 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting)
(3)
10 mA ≤ I(IOUTx) ≤ 70 mA, V(SUPPLY) = 5 V to 20 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting)
4%
(3)
2 mA ≤ I(IOUTx) < 5 mA, V(SUPPLY) = 5 V to 20 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting)
20%
10%
8%
(3)
ΔIO(device)
Device accuracy
5 mA ≤ I(IOUTx) < 10 mA, V(SUPPLY) = 20 V to 40 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting)
(3)
10 mA ≤ I(IOUTx) ≤ 70 mA, V(SUPPLY) = 20 V to 40 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting)
(3)
2 mA ≤ I(IOUTx) < 5 mA, V(SUPPLY) = 20 V to 40 V
Device accuracy = (I(IOUTx) – I(setting)) / I(setting)
20%
(3)
V(REF)
Reference voltage
I(IOUTx) = 20 mA
1.198
1.198
1.222 1.246
1.222 1.246
V
V
V(REFHI)
STOP reference voltage
Ratio of I(IOUTx) to reference
current
I(IOUTx) / I(REF) or I(IOUTx) / ( I(REF)
G(I)
200
mA/mA
+ I(REFHI)
)
V(DROP_IOUTx)
V(DROP)
I(IOUTx) = 70 mA
I(IOUTx) = 35 mA
0.71
0.28
0.9
V
V
Dropout voltage
0.45
(1) VIH and VIL track each other. That is, both are simultaneously at MAX, MIN, or the same intermediate point. Therefore, there can be no
overlap of the VIH and VIL values during normal operation.
(2) I(AVG) = [I(IOUT1) + I(IOUT2) + I(IOUT3) + I(IOUT4) + I(IOUT5) + I(IOUT6) + I(IOUT7) + I(IOUT8)] / 8
(3) I(setting) is the target current set by R(REF)
.
Copyright © 2014–2020, Texas Instruments Incorporated
5
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
Electrical Characteristics (continued)
V(VIN) = 14 V, TJ = –40°C to 150°C (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Current rising from 10% to 90% or falling from
90% to 10% at I(IOUTx) = 35 mA.(4)
1.5
6
12 mA/µs
Current slew-rate rise and fall
times
I(slew)
Current rising from 10% to 90% or falling from
90% to 10% at I(IOUTx) = 70 mA.(4)
3
6
12 mA/µs
FAULT (FAULT)
VOL
Logic output low level
500-µA external pullup
1-µA external pulldown
0.4
V
V
VOH
Logic output high level
Strong pulldown current
Pullup current
2
600
4
I(pulldown)
I(pullup)
780
8
1000
12
µA
µA
PROTECTION
Open-load detection voltage
V(OL_TH) = V(SUPPLY) – V(IOUTx)
V(OL_th)
50
100
200
150
300
mV
V(OL_hys)
Open-load detection hysteresis
Short-detection voltage
100
0.846
318
mV
V
V(SHORT_th)
V(SHORT_hys)
0.89 0.935
Short-detection hysteresis
335
352
mV
Open-load detection PWM
deglitch cycle number
N(SHORT_deg)
7
8
Cycles
R(REF_th)
R(REFHI_th)
,
REF and REFHI pins, parallel-
resistor short detection
1400
2300
Ω
THERMAL MONITOR
T(shutdown) Thermal shutdown
T(hys)
155
170
15
°C
°C
Thermal shutdown hysteresis
Thermal foldback activation
temperature
T(th)
I(IOUTx) = 90% × I(setting), TEMP terminal floating
95
40%
0
110
125
60%
0.2
°C
Minimum foldback current, ratio
of I(setting)
I(TFC-min)
V(T-disable)
K(temp1)
50%
Thermal-foldback-function
disable threshold of V(TEMP)
V
Change of V(TEMP) relative to
T(J)
25
mV/°C
(4) See Parameter Measurement Information for the load model for the slew-rate test and delay-time test.
7.6 Switching Characteristics
PARAMETER
TEST CONDITION
MIN
TYP
MAX UNIT
t(startup)
td(on)
Start-up time
V(SUPPLY) > 5 V, I(IOUTx) = 15 mA, I(setting) = 30 mA(1)
150
µs
Delay time between PWM rising
edge to 10% of I(IOUTx)
Two LEDs in series, 10-kΩ resistor in parallel
Two LEDs in series, 10-kΩ resistor in parallel
20
45
µs
Delay time between PWM falling
edge to 90% of I(IOUTx)
td(off)
20
45
3.2
8
µs
ms
1.2
7
2.2
Open-load detection deglitch
Short-detection deglitch
During PWM, count the number of continuous cycles
when V(SUPPLY) – V(IOUTx) < V(OL_th)
Cycles
ms
1.2
7
2.2
3.2
8
During PWM, count the number of continuous cycles
when V(IOUTx) < V(SHORT_th)
Cycles
(1) Start-up is complete when I(setting) is 30 mA and I(IOUTx) increases from 0 to 15 mA.
6
Copyright © 2014–2020, Texas Instruments Incorporated
TPS92638-Q1
www.ti.com.cn
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
7.7 Typical Characteristics
2%
1%
0
2%
1.5%
1%
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
0.5%
0
-0.5%
-1%
-1%
-1.5%
-2%
-2%
0
5
10
15
20
Supply Voltage (V)
25
30
35
40
45
-50
0
50
Ambient Temperature (èC)
100
150
D005
D002
V(SUPPLY) = 12 V
图 1. I(IOUTx) Accuracy vs V(SUPPLY)
图 2. I(IOUTx) Accuracy vs Ambient Temperature
2%
1%
0
2%
1%
0
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
-1%
-1%
-2%
-2%
-50
0
50
Ambient Temperature (èC)
100
150
-50
0
50
Ambient Temperature (èC)
100
150
D003
D004
V(SUPPLY) = 5 V
V(SUPPLY) = 40 V
图 3. I(IOUTx) Accuracy vs Ambient Temperature
图 4. I(IOUTx) Accuracy vs Ambient Temperature
35.05
35
35.05
35
34.95
34.9
34.95
34.9
34.85
34.8
34.85
34.8
34.75
34.7
34.75
34.7
34.65
34.6
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
34.65
34.6
34.55
34.55
34.5
-50
0
50
Ambient Temperature (èC)
100
150
-50
0
50
Ambient Temperature (èC)
100
150
D009
D010
V(SUPPLY) = 12 V
V(SUPPLY) = 5 V
图 5. I(IOUTx) Current vs Temperature
图 6. I(IOUTx) Current vs Temperature
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TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
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Typical Characteristics (接下页)
36
35.9
35.8
35.7
35.6
35.5
35.4
35.3
35.2
35.1
4%
2%
0
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
-2%
-4%
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
35
34.9
34.8
-50
0
50
Ambient Temperature (èC)
100
150
0
100
200
300
400
R(REF) (W)
500
600
700
800
D011
D001
V(SUPPLY) = 40 V
V(SUPPLY) = 12 V
TA = 25ºC
图 7. I(IOUTx) Current vs Temperature
图 8. I(IOUTx) Channel Accuracy vs R(REF)
40
35
30
25
20
15
10
5
2%
1.5%
1%
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
0.5%
0
-0.5%
-1%
-1.5%
-2%
0
0
100
200
300
400
R(REF) (W)
500
600
700
800
0
20
40
60
80
100
Duty Cycle
D008
D006
图 9. I(IOUTx) Current vs R(REF)
图 10. I(IOUTx) Accuracy vs PWM Duty Cycle
40
35
30
25
20
15
10
5
1.4
1.2
1
Ch1
Ch5
Ch6
Ch7
Ch8
Ch2
Ch3
Ch4
0.8
0.6
0.4
0.2
0
0
0
20
40
60
80
100
80
90
100
110
120
130
140
150
Duty Cycle
Junction Temperature (èC)
D007
D012
图 11. I(IOUTx) Current vs PWM Duty Cycle
图 12. Reference Voltage vs Junction Temperature
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Typical Characteristics (接下页)
CH1: V(IOUT1)
CH4: FAULT
CH2: I(IOUT1)
CH3: V(SUPPLY)
CH1: V(IOUT1)
CH4: FAULT
CH2: I(IOUT1)
CH3: V(SUPPLY)
图 14. Jump Start From 13.5 V to 26 V
图 13. Cold Cranking Behavior
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
CH3: V(IOUT8)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
CH3: V(IOUT8)
I(IOUTx) = 35 mA
I(IOUTx) = 35 mA
图 15. Superimposed Alternating Voltage, 12 V–18 V, 15 Hz
图 16. Superimposed Alternating Voltage, 12 V–18 V, 200 Hz
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
CH3: V(IOUT8)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
CH3: V(IOUT8)
I(IOUTx) = 35 mA
I(IOUTx) = 35 mA
图 17. Superimposed Alternating Voltage, 12 V–18 V, 2 kHz
图 18. Superimposed Alternating Voltage, 12 V–18 V, 10 kHz
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Typical Characteristics (接下页)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
CH3: V(IOUT8)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(REF)
CH3: V(IOUT8)
I(IOUTx) = 35 mA
I(IOUTx) = 35 mA
图 20. Superimposed Alternating Voltage, 12 V–18 V, 30 kHz
图 19. Superimposed Alternating Voltage, 12 V–18 V, 20 kHz
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
图 21. Transient Overvoltage (16 V – 18 V – 17 V – 16 V)
图 22. Transient Undervoltage (10.8 V – 9 V – 10.8 V)
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
CH1: V(IOUT1)
CH4: I(FAULT)
CH2: I(IOUT1)
CH3: V(SUPPLY)
图 24. Slow Decrease and Slow Increase
图 23. Slow Decrease and Quick Increase
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Typical Characteristics (接下页)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(FAULT)
CH3: V(REF)
CH1: V(SUPPLY)
CH4: I(IOUT8)
CH2: V(FAULT)
CH3: V(REF)
图 26. Slow Power Down (V(SUPPLY), V(EN), V(PWMx) Fall
图 25. Slow Power Up (V(SUPPLY), V(EN), V(PWMx) Rise Together
Together From 14 V to 0 V by 0.2 V/s)
From 0 V to 14 V by 0.2 V/s)
CH1: V(REFHI)
CH4: I(IOUT8)
CH2: V(REF)
CH3: I(IOUT1)
CH1: V(PWM3)
CH4: I(IOUT8)
CH2: V(PWM4)
CH3: V(REF)
Duty cycle = 50%
V(SUPPLY), V(EN) = 14 V
图 28. Load Transient, I(IOUTx) Increases From 35 mA to 70
图 27. PWM Dimming, Dimming Frequency = 1000 Hz
mA
CH1: V(SUPPLY)
CH2: V(REF)
CH3: V(FAULT)
CH1: V(REFHI)
CH4: I(IOUT8)
CH2: V(REF)
CH3: I(IOUT1)
I(IOUTx) = 35 mA
图 30. Line Transient, V(SUPPLY), V(EN), V(PWMx) Ramp From 9
图 29. Load Transient, I(IOUTx) Decreases From 70 mA to 35
V to 16 V to 9 V by 0.1 V/µs
mA
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8 Parameter Measurement Information
SUPPLY
IOUTx
EN
ton
toff
PWM1
PWMX
0.7 V
17 Ω at 70 mA
40 Ω at 30 mA
PWM2
PWM3
PWM4
10
kΩ
TPS92638-Q1
90%
I2
I1
V(bat)
5.5 V
STOP
FAULT
REFHI
IOUTX
REF
10%
TEMP
GND
t1
t2
t3
t4 t5
t6
图 31. TPS92638-Q1 Test Circuit and Waveforms
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9 Detailed Description
9.1 Overview
The TPS92638-Q1 device is an 8-channel constant-current regulator with PWM dimming, designed for high-
brightness red or white LEDs in automotive lighting applications. Each channel has up to 70-mA current
capability and 560 mA when paralleled. The device provides excellent current matching between channels and
devices. The high-side current source allows LED common-cathode connection. The advanced control loop
allows high accuracy between channels even with different numbers of LEDs connected on the output.
The design of the TPS92638-Q1 device is specifically for use in STOP-and-TAIL applications where the LED
current switches between a high current (indicating stop or brake) and a lower current (for normal taillight
operation).
The TPS92638-Q1 device monitors fault conditions on the output and reports its status on the FAULT pin. The
device features output short-to-ground detection, open-load detection, and thermal shutdown. The FAULT pin
allows maximum flexibility for determining the fault mode and reporting to the MCU in case of an error. For
applications lacking an MCU, connecting multiple TPS92638-Q1 devices in a bus is an option.
Integrated thermal foldback protects the device from thermal shutdown by reducing the output current linearly
when reaching a preset threshold. Provision for programming the temperature foldback threshold is through an
external resistor. Tying the TEMP pin to ground disables this function.
9.2 Functional Block Diagram
V(bat)
SUPPLY
TEMP
Thermal
Control
Current Regulator
REF
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
R(REF)
Current
Reference
REFHI
R(REF1)
PWMx
EN
Control Logic
FAULT
STOP
GND
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9.3 Feature Description
9.3.1 LED Current Setting
Independent linear current regulators control the eight LED output channels. Global external resistors set the
current of each channel. The device also features two current levels, intended for stop and tail applications.
The internal current reference, I(REF), has two possible values depending on the state of the STOP input: When
STOP is low, REF, the current drawn from the REF pin, controls the output current. When STOP is high, the sum
of the currents drawn from the REFHI pin and REF pin controls the output current.
Equations 公式 1 and 公式 2 calculate values for the current-setting resistors:
when STOP = low
V
´ G(I)
ref
I(OUTx-TAIL)
=
R(REF)
V
´ G(I)
ref
R(REF)
=
I(OUTx-TAIL)
(1)
when STOP = high
V
ref ´ G(I)
Vref ´ G(I)
I(IOUTx-STOP)
=
+
R(REFHI)
R(REF)
V
ref ´ G(I)
R(REFHI)
=
Vref ´ G(I)
I(IOUTx-STOP)
-
R(REF)
(2)
where
Vref is the internal reference voltage
G(I) is the ratio of output current to reference current
9.3.2 PWM Control
The device features four independent PWM-bank dimming-control pins, each of which controls one bank
consisting of two channels. A PWM input can also function as a shutdown pin for an unused bank. Tying PWM to
ground disables the corresponding outputs. The PWM signal has a precise threshold, which a designer can use
to define the start-up voltage of an LED as an undervoltage-lockout (UVLO) function with a divider resistor from
SUPPLY. 表 1 shows the PWM bank mapping.
表 1. PWM Bank Mapping
PWM INPUT
PWM1
CONTROLLED OUTPUTS
OUT1, OUT2
PWM2
OUT3, OUT4
PWM3
OUT5, OUT6
PWM4
OUT7, OUT8
9.3.3 Fault Diagnostics
The TPS92638-Q1 device has a fault pin, FAULT, which is for the short, open, and thermal-shutdown general
faults. This arrangement allows the maximum flexibility based on all requirements and application conditions.
Connection the device FAULT pin to the MCU allows for fault reporting. The FAULT pin is an open-drain
transistor with a weak internal pullup.
The device releases the FAULT bus when external circuitry toggles the FAULT bus, or on a power cycle of the
device. In an application that has no MCU, only cycling power clears the fault.
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The following faults result in the FAULT pin going low: thermal shutdown, open load, or output short circuit. For
thermal shutdown and open LED, release of the FAULT pin occurs when the thermal shutdown or open-LED
condition no longer exists. For other faults, the FAULT pin remains low even after the condition does not exist,
and clearing is only possible by toggling FAULT or by power cycling of the device.
Fault removed
SUPPLY
and EN
FAULT
LED
LED
Open
2 ms
Short
to GND
2 ms
Faulty
Channel
LED Open
7-PWM Cycles
LED Short
7 PWM Cycles
Other
Channels
PWM
图 32. TPS92638-Q1 Device Fault-Handling Behavior, FAULT Bus Floating
The design of an application with no MCU allows the connecting together of up to 15 TPS92638-Q1 FAULT
When one or more devices have errors, their corresponding FAULT
̅
pins.
̅
pins go low, thus pulling down the connected
FAULT bus and shutting down all device outputs. 图 33 illustrates the FAULT line bus connection.
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TPS92638-Q1
Internal
Pullup
SUPPLY
FAULT
Fault
Logic
GND
Up to 13 ICs
TPS92638-Q1
SUPPLY
Internal
Pullup
FAULT
Fault
Logic
GND
图 33. Connection of FAULT Line Bus
The device releases the FAULT bus by external circuitry pulling the FAULT bus high, by toggling of the EN pin,
or by a power cycle of the device. In an application without an MCU, only a power cycle clears the fault. 图 34 is
a detailed timing diagram.
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Fault removed
SUPPLY
and EN
FAULT
LED
Short
to GND
2 ms
Faulty
Channel
Current
LED
Open
2 ms
LED Open
7-PWM Cycles
LED Short
7 PWM Cycles
Other
Channel
Current
PWM
图 34. TPS92638-Q1 Device Fault-Handling Behavior, FAULT Bus Externally Pulled High
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表 2. Fault Table
JUDGMENT CONDITION
FAILURE MODE
DIAGNOSTIC
ACTION
FAILURE
REMOVED
SELF
CLEARING
FAULT
DEVICE REACTION
OUTPUT PIN(1)
DETECTION
VOLTAGE
CHANNEL
STATUS
DETECTION
MECHANISM
Externally
pulled high
Failing strings turned off,
other CHs on
Toggle EN,
power cycle
Short Circuit:
1 or several LED
strings
V(SUPPLY) > 5 V
On
On
V(IOUTx) < 0.9 V
FAULT
FAULT
Pulled low
Pulled low
No
Toggle EN,
power cycle
Floating
All strings turned OFF
All strings stay ON
Failure
condition
removed
Externally
pulled high
Open Load:
1 or several LED
strings
V(SUPPLY) – V(IOUTx)
< 100 mV
V(SUPPLY) > 5 V
Yes
Failure
condition
removed
Failing strings stay ON,
other CHs turned OFF
Floating
Failure
condition
removed
Externally
pulled high
All strings stay ON
Short to Battery:
1 or several LED
strings
V(SUPPLY) – V(IOUTx)
< 100 mV
V(SUPPLY) > 5 V
On or off
On or off
FAULT
FAULT
Pulled low
Pulled low
Yes
Failure
condition
removed
Failing strings stay ON,
other CHs turned OFF
Floating
Externally
pulled high
Temperature
< 155°C
Thermal Shutdown
Thermal Foldback
V(SUPPLY) > 5 V
> 170°C
All strings turned OFF
Yes
Floating
N/A
Reduced current to all
strings
Temperature
< 100°C
V(SUPPLY) > 5 V
V(SUPPLY) > 5 V
On or off
On or off
> 110°C
N/A
None
Yes
No
Reference Resistor
Short
Toggle EN,
power cycle
R(ref) < 1400 Ω
FAULT
Pulled low
N/A
All strings turned off
(1) If tying the diagnostic FAULT pin high externally, the pullup must be strong enough to override the internal pulldown.
9.3.3.1 Open-Load Detection
The device detects an open-load condition when the voltage across the channel, V(SUPPLY) – V(IOUTx), is less than
the open-load detection voltage, V(olv). When this condition is present for more than the open-load-detection
deglitch time, 2 ms when PWM is 100% on or 7 continuous PMW duty cycles when in the PWM dimming mode,
the device pulls FAULT low and turns off the faulted channel. With the FAULT pin tied high, all channels shut
down. The channel recovers on removal of the open condition. Note that the device may also detect an open
load if the sum of the forward voltages of the LEDs in a string is close to or greater than the supply voltage on
the SUPPLY pin.
9.3.4 Thermal Foldback
The TPS92638-Q1 device integrates thermal shutdown protection to prevent the IC from overheating. In addition,
to prevent LEDs from flickering due to rapid thermal changes, the device includes a programmable thermal
current foldback feature to reduce power dissipation at high junction temperatures.
The TPS92638-Q1 device reduces the LED current as the silicon junction temperature of the TPS92638-Q1
device increases (see 图 35). Mounting the TPS92638-Q1 device on the same thermal substrate as the LEDs
allows use of this feature to limit the dissipation of the LEDs. As its junction temperature increases, the
TPS92638-Q1 device reduces the regulated current level, thereby reducing the dissipated power in the
TPS92638-Q1 and in the LEDs. The current reduction from the 100% level is typically 2% per degree Celsius
until the point where the current drops to 50% of the full value, which occurs at T(th) + 20ºC.
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I
(setting)
90%
2% of I
per ºC
(setting)
50%
T
+ 20°C
T
T
(shutdown)
(th)
(th)
图 35. Thermal Foldback
Above this temperature, the device maintains the current at the 50% current level until the junction temperature
reaches the overtemperature shutdown threshold, T(shutdown). Changing the voltage on the TEMP pin adjusts the
temperature at which the current reduction begins. With TEMP left open, the definition of thermal monitor
activation temperature is the temperature at which the current reduction begins, T(th). The specification of T(th) in
the Electrical Characteristics table is at the 90% current level. T(th) increases as the voltage at the TEMP pin,
V(TEMP), decreases. 公式 3 provides an approximate calculation of T(th)
.
T
= -121.7 °C/V ´ V(TEMP) + 228.32°C
(th)
(3)
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
Thermal Foldback Temperature (èC)
D004
图 36. TEMP Pin Voltage vs Thermal Foldback Temperature
A resistor connected between TEMP and GND reduces V(TEMP) and increases T(th). A resistor connected between
TEMP and a reference supply greater than 1 V increases V(TEMP) and reduces T(th)
.
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100
80
60
40
20
0
V(res)
0 V
3.3 V
5 V
20
40
60
80
100
120
Thermal Foldback Temperature (ºC)
140
160
D005
图 37. Pullup and Pulldown Resistors vs T(th)
图 37 shows how the nominal value of the thermal monitor activation temperature varies with the voltage at
TEMP and with a resistor R(TEMP), either connected to GND or pulled up to 3 V or to 5 V.
In extreme cases, if the junction temperature exceeds the overtemperature limit, T(shutdown), the device disables all
regulators. Temperature monitoring continues, and the device re-activates the regulators, when the temperature
drops below the specified hysteresis threshold.
Note that it is possible for the TPS92638-Q1 device to transition rapidly between thermal shutdown and normal
operation. This can happen if the thermal mass attached to the exposed thermal pad is small and T(th) is too
close to the shutdown temperature. The period of oscillation depends on T(th), the dissipated power, the thermal
mass of any heatsink present, and the ambient temperature.
9.4 Device Functional Modes
The functional modes of the TPS92638-Q1 device are operational and non-operational. The device operates
normally when V(SUPPLY) is at least 5 V and not greater than 40 V.
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10 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The following discussion includes several applications showing how to implement the TPS92638-Q1 device for
automotive lighting such as stop lights and taillights. Some of the examples demonstrate implementation of the
fault bus function or detail use of the device for higher-current applications.
10.2 Typical Applications
10.2.1 PWM Dimming by Bank
The TPS92638-Q1 device provides four PWM banks for output dimming. A TLC555-Q1 PWM generator can be
used on the to avoid the use of an MCU.
Battery
Tail
SUPPLY
EN
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
VDD
PWM1
PWM2
TLC555-Q1
OUT
PWM3
PWM4
STOP
FAULT
TPS92638-Q1
REFHI
REF
V(bat)
R(REF)
TEMP
R(TEMP)
GND
图 38. Schematic for PWM Dimming by Bank
10.2.1.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
20 mA
(1)
I(TAIL)
(1)
I(STOP)
40 mA
(1) I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.1.2 Detailed Design Procedure
The design uses the R(REF) reference resistor to set the maximum output current, and the TLC555-Q1 sets the
PWM duty cycle to control the dimming ratio.
G(I)
200
R(REF) = V
´
= 1.222 ´
= 6.11 kW
(REF)
I(STOP)
0.04
(4)
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I(TAIL)
0.02
Duty cycle =
=
= 0.5 = 50%
I(STOP) 0.04
(5)
10.2.1.3 Application Performance Plots
SUPPLY = EN = 14 V PWM freq. = 1 kHz Duty cycle = 50%
SUPPLY = EN = 14 V PWM freq. = 1 kHz Duty cycle = 50%
CH1: PWM3
CH4: IOUT8
CH2: PWM4
CH3: Vref
CH1: PWM1
CH4: IOUT8
CH2: PWM2
CH3: Vref
图 40. PWM Dimming by Bank, PWM3, PWM4, Analog
图 39. PWM Dimming by Bank, PWM1, PWM2, Analog
Reference and Output Current
Reference and Output Current
10.2.2 Two Brightness Levels for TAIL and STOP Lights
For a typical TAIL and STOP application, implementation using the TPS92638-Q1 device with an integrated
STOP and TAIL function is easy. The following schematic depicts the application circuit. In a typical application,
two independent sources, namely Tail and Stop, power the stop and tail lights. Using blocking diodes D0 and D1
with the TPS92638-Q1 device allows merging the STOP and TAIL functions, powered by a single supply.
Blocking diode D2 protects the STOP pin during a reverse battery scenario. The STOP pin has an internal
pulldown resistor to ensure a low state when STOP is not active.
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D0
Tail
Stop
SUPPLY
D1
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
EN
PWM1
PWM2
PWM3
PWM4
STOP
FAULT
Stop
TPS92638-Q1
D2
REFHI
REF
R(REFHI)
V(bat)
R(REF)
TEMP
R(TEMP)
GND
图 41. Schematic for Two Brightness Levels for TAIL and STOP Lights
10.2.2.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
10 mA
(1)
I(TAIL)
(1)
I(STOP)
40 mA
(1) I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.2.2 Detailed Design Procedure
Designing the application consists in calculating the values of resistors to be used for the desired output currents.
G(I)
200
R(REF) = V
´
= 1.222 ´
= 24.44 kW
(REF)
I(TAIL)
0.01
(6)
(7)
G(I)
200
0.04 - 0.01
R
(REFHI) = V
´
= 1.222´
= 8.146 kW
(REFHI)
I(STOP) - I(TAIL)
The recommended value for R(STOP) is 10 kΩ.
10.2.3 PWM Dimming by Modulated Supply
The TPS92638-Q1 device supports PWM dimming from the supply as depicted below. A high-side switch in the
body control module (BCM) usually implements supply dimming. Due to the nature of the high-side switch,
TPS92638-Q1 supply voltage is not strongly pulled down to ground, but depends on the decoupling capacitor
and total current consumption. The TPS92638-Q1 device keeps the output current constant as long as supply
voltage is adequate to overcome the LED forward voltage and dropout voltage.
When supply voltage drops too low to drive LEDs, the device shuts down the output channels on open-load
detection. Therefore, TI recommends ensuring channel shutdown using the PWM or EN inputs. Thus a resistor
string of R1 and R2 is recommended to ensure the lowest divided voltage is lower than PWM threshold.
版权 © 2014–2020, Texas Instruments Incorporated
23
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
BCM
Battery
High-Side
Switch
TPS1H100-Q1
R1
SUPPLY
TPS92638-Q1
GND
EN
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
PWM1
PWM2
R2
PWM3
PWM4
STOP
FAULT
REFHI
REF
V(bat)
R(REF)
TEMP
R(TEMP)
图 42. Schematic for PWM Dimming by Modulated Supply
10.2.3.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
30 mA
(1)
I(TAIL)
(1)
I(STOP)
50 mA
(1) I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.3.2 Design Procedure
The R(REF) reference resistor sets the current.
G(I)
200
R(REF) = V
´
= 1.222 ´
= 4.888 kW
(REF)
I(STOP)
0.05
(8)
(9)
I(TAIL)
0.03
Duty cycle =
=
= 0.6 = 60%
I(STOP) 0.05
R2
V(SUPPLY)min ´
< V
(PWM_ threshold)
R1 + R2
(10)
10.2.4 Driving LEDs From a Single Device With Channels in Parallel
The TPS92638-Q1 device the parallel driving of LED strings supports by combining multiple channels in parallel
to achieve better thermal performance and higher current-driving capability.
24
版权 © 2014–2020, Texas Instruments Incorporated
TPS92638-Q1
www.ti.com.cn
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
Battery
SUPPLY
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
EN
PWM1
PWM2
PWM3
PWM4
STOP
FAULT
Stop
TPS92638-Q1
REFHI
REF
R(REFHI)
V(bat)
R(REF)
TEMP
R(TEMP)
GND
图 43. Schematic for Driving With a Single Device Using Parallel Channels
10.2.4.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
30 mA
(1)
I(TAIL)
(1)
I(STOP)
100 mA
(1) I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.4.2 Design Procedure
The R(REF) and R(REFHI) reference resistors set the current. R(REF) sets the tail current, and R(REF) and R(REFHI) set
the stop current.
G(I)
200
R(REF) = V
´
= 1.222 ´
= 16.29 kW
(REF)
I(TAIL) / N(channel)
0.03 / 2
(11)
(12)
10.2.5 Driving LEDs From Multiple Devices With Channels in Parallel
For design flexibility, there is also support for using multiple TPS92638-Q1 devices in parallel driving between
different devices. The following diagram shows a combination that uses both devices and channels in parallel to
drive high-current loads.
版权 © 2014–2020, Texas Instruments Incorporated
25
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
Battery
SUPPLY
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
EN
PWM1
PWM2
PWM3
PWM4
STOP
FAULT
Stop
TPS92638-Q1
REFHI
REF
R(REFH)
V(bat)
R(REF)
TEMP
R(TEMP)
GND
SUPPLY
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
IOUT6
IOUT7
IOUT8
EN
PWM1
PWM2
PWM3
PWM4
STOP
FAULT
TPS92638-Q1
REFHI
REF
R(REFHI)
R(REF)
TEMP
R(TEMP)
GND
图 44. Schematic for Driving With Multiple Devices Using Parallel Channels
10.2.5.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
60 mA
(1)
I(TAIL)
(1)
I(STOP)
200 mA
(1) I(TAIL) = tail light curent per channel; I(STOP) = stop light current per
channel.
10.2.5.2 Design Procedure
The R(REFHI) and R(REF) reference resistors set the current. R(REF) by itself sets the tail current. R(REF) and R(REFHI)
together set the stop current. In different applications, reference resistors can be set to different values for
different devices to achieve current flexibility. In this document, for simplicity, the application sets the same
reference current in both devices.
26
版权 © 2014–2020, Texas Instruments Incorporated
TPS92638-Q1
www.ti.com.cn
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
G(I)
200
R(REF) = V
´
= 1.222 ´
= 16.29 kW
(REF)
I(TAIL) / N(channel)
0.06 / 4
(13)
(14)
G(I)
-I(TAIL) / N
200
R(REFHI) = V
´
= 1.222 ´
= 6.98 kW
(REFHI)
(0.2 - 0.06) / 4
I
(
)
(STOP)
(channel)
版权 © 2014–2020, Texas Instruments Incorporated
27
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
11 Power Supply Recommendations
The TPS92638-Q1 device is qualified for automotive applications. The normal power supply connection is
therefore to an automobile electrical system that provides a voltage within the range specified in Recommended
Operating Conditions.
12 Layout
12.1 Layout Guidelines
In order to prevent thermal shutdown, TJ must be less than 150°C. If the input voltage is very high, the power
dissipation might be large. Currently there is the TSSOP-EP package which has good thermal impedance, but at
the same time, the PCB layout is also very important. Good PCB design can optimize heat transfer, which is
absolutely essential for the long-term reliability of the device.
•
Maximize the copper coverage on the PCB to increase the thermal conductivity of the board, because the
major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is
extremely important when there are not any heat sinks attached to the PCB on the other side of the package.
•
•
Add as many thermal vias as possible directly under the package ground pad to optimize the thermal
conductivity of the board.
All thermal vias should be either plated shut or plugged and capped on both sides of the board to prevent
solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.
12.2 Layout Example
Power ground
on both top and
bottom layers
IOUT1
IOUT2
IOUT3
IOUT4
IOUT5
VIN
EN
1
20
19
18
17
16
15
14
TPS92638-Q1
VIA to Ground
2
STOP
PWM1
3
4
PWM2
PWM3
5
6
IOUT6
IOUT7
PWM4
7
IOUT8
GND
REF
8
13
12
11
FAULT
TEMP
REFH
9
10
Thermal pad
图 45. TPS92638-Q1 Layout Diagram
28
版权 © 2014–2020, Texas Instruments Incorporated
TPS92638-Q1
www.ti.com.cn
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
12.3 Thermal Information
This device operates a thermal shutdown (TSD) circuit as a protection from overheating. For continuous normal
operation, the junction temperature should not exceed the thermal-shutdown trip point. If the junction temperature
exceeds the thermal-shutdown trip point, the output turns off. When the junction temperature falls below the
thermal-shutdown trip point minus hysteresis, the output turns on again.
Calculate the power dissipated by the device according to the following formula:
8
2
2
V
V
(REFHI)
(REF)
P(IC) = V(SUPPLY) ´ I(SUPPLY)
-
nk ´ V(LEDk) ´ I(LEDk)
-
-
R(REF)
R(REFHI)
å
k=1
(15)
where:
nk = Number of LEDs for x channel
V(LEDk)= Voltage drop across one LED for x channel
V(REF) = Reference voltage, typically 1.24 V
I(LEDk) = Average LED current for channel k
After determining the power dissipated by the device, calculate the junction temperature from the ambient
temperature and the device thermal impedance.
TJ = TA + RqJA ´ P(IC)
(16)
where:
TA = Ambient temperature
RθJA = Junction-to-ambient thermal impedance
P(IC) = Dissipated power
版权 © 2014–2020, Texas Instruments Incorporated
29
TPS92638-Q1
ZHCSDK4C –SEPTEMBER 2014–REVISED JANUARY 2020
www.ti.com.cn
13 器件和文档支持
13.1 商标
All trademarks are the property of their respective owners.
13.2 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查看左侧的导航面板。
30
版权 © 2014–2020, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS92638QPWPRQ1
ACTIVE
HTSSOP
PWP
20
2000 RoHS & Green
NIPDAU
Level-3-260C-168 HR
-40 to 125
TPS92638
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Dec-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS92638QPWPRQ1 HTSSOP PWP
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Dec-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
HTSSOP PWP 20
SPQ
Length (mm) Width (mm) Height (mm)
350.0 350.0 43.0
TPS92638QPWPRQ1
2000
Pack Materials-Page 2
重要声明和免责声明
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不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
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