TRF1208 [TI]
10MHz 至 11GHz、3dB 带宽、单端转差分放大器;
| 型号： | TRF1208 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 10MHz 至 11GHz、3dB 带宽、单端转差分放大器 放大器 |
| 文件： | 总31页 (文件大小：2211K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TRF1208
ZHCSLL7B –OCTOBER 2021 –REVISED APRIL 2022
TRF1208 10 MHz 至11 GHz 3dB BW，ADC 驱动器放大器
• 外形小巧，省去无源射频平衡-非平衡变压器，从而
减小系统尺寸
1 特性
• 采用数字PD 控制器的低功耗断电模式，可优化系
统设计
• 相控阵雷达
• 军用无线电
• 高速数字转换器
• 4G/5G 无线BTS
• 射频有源平衡-非平衡变压器
• 测试和测量
• 可用作ADC 驱动器，具备出色的单端至差分转换
性能
• 也可在差分至单端模式下运行，用作DAC 缓冲器
• 11GHz，3dB 带宽
• 8GHz，1dB 增益平坦度
• 单端至差分的固定功率增益为16dB
• OIP3 性能：
– 2GHz 时为37dBm
– 6 GHz 时为32dBm
• P1dB 性能：
– 2GHz 时为15dBm
– 6GHz 时为12.5dBm
• 噪声系数：
– 2GHz 时为7dB
– 8GHz 时为7dB
• 增益和相位不平衡：±0.3dB/±3 度
• 关断特性
3 说明
TRF1208 是一款超高性能射频放大器，专门针对射频
(RF)
应 用 进 行 了 优 化 。 在 驱 动 高 性 能
ADC12DJ5200RF 等模数转换器 (ADC) 时，交流耦合
应用需要进行单端至差分转换，此款器件是这类应用的
理想之选。片上匹配元件可对印刷电路板 (PCB) 实现
方案进行简化，并在可用带宽内提供最高性能。此器件
采用德州仪器 (TI) 先进的互补 BiCMOS 工艺制造，并
采用节省空间的WQFN-FCRLF 封装。
• 3.3V 单电源运行
它由单轨电源供电，消耗约138 mA 的有效电流。断电
功能还有助于实现节能。
• 有效电流：138mA
2 应用
器件信息(1)
• 直接驱动射频采样或GSPS ADC
• 最高可支持X 带，适用于航天和国防应用
• 具备高线性，支持新一代5G 系统
封装尺寸（标称值）
器件型号
TRF1208
封装
WQFN-FCRLF (12) 2.00mm × 2.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 具备低噪声系数，可实现更佳的信号完整性
PD
VDD
TRF1208
+
–
ADC12DJ5200
Rs = 50 Ω
50 Ω
驱动高速ADC 的TRF1208
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS972
TRF1208
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ZHCSLL7B –OCTOBER 2021 –REVISED APRIL 2022
Table of Contents
8 Application and Implementation..................................16
8.1 Application Information............................................. 16
8.2 Typical Application.................................................... 18
9 Power Supply Recommendations................................21
10 Layout...........................................................................21
10.1 Layout Guidelines................................................... 21
10.2 Layout Example...................................................... 22
11 Device and Documentation Support..........................23
11.1 Device Support........................................................23
11.2 Documentation Support ......................................... 23
11.3 接收文档更新通知................................................... 23
11.4 支持资源..................................................................23
11.5 Trademarks............................................................. 23
11.6 Electrostatic Discharge Caution..............................23
11.7 术语表..................................................................... 23
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description......................................................14
7.1 Overview...................................................................14
7.2 Functional Block Diagram.........................................14
7.3 Feature Description...................................................14
7.4 Device Functional Modes..........................................15
Information.................................................................... 23
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision A (March 2022) to Revision B (April 2022)
Page
• Changed Pin 12 from: OUTP to: OUTM and Pin 11 from: OUTM to OUTP .......................................................3
• Updated the Interfacing with AFE7950 RX and Interfacing with AFE7950 TX figures..................................... 16
• Updated the TRF1208 in Receive Chain with AFE7950 figure.........................................................................18
• Updated the TRF1208 in Transmit Chain with AFE7950 figure........................................................................20
Changes from Revision * (October 2021) to Revision A (March 2022)
Page
• 将文档的状态从预告信息更改为“量产数据”..................................................................................................1
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5 Pin Configuration and Functions
13 GND
(Thermal
Pad)
12 OUTM
11 OUTP
INM 5
INP 6
图5-1. RPV Package,
12-Pin WQFN-FCRLF
(Top View)
表5-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
GND
NO.
1, 4, 7, 10
GND
Ground
INP / INM
OUTP / OUTM
PD
6, 5
I
O
I
Differential signal input
Differential signal output
11, 12
2
8
Power down signal. Supports 1.8 V and 3.3 V Logic. 0 = Chip Enabled. 1 = Power Down.
Test pin. Short to ground.
TP1
—
—
P
TP2
3
Test pin. Short to ground.
VDD
9
3.3 V supply (there is an alternate part, TRF1208A5, that works off 5 V supply).
Thermal pad. Connect to ground on board.
Thermal pad
13
—
(1) I = input, O = output, P = power, GND = ground
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
3.7
UNIT
V
Supply voltage, VDD
–0.3
INP, INM
20
dBm
V
Input level
PD
3.7
–0.3
–40
–40
Junction temperature, TJ
Temperature
150
150
ºC
Storage temperature, Tstg
ºC
Continuous power dissipation
See thermal information
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, all pins(1)
±1000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per ANSI/ESDA/
JEDEC JS-002, all pins(2)
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
3.2
NOM
3.3
MAX
3.45
105
UNIT
V
VDD
TA
Supply voltage
Ambient air temperature
Junction temperature
25
°C
–40
–40
TJ
125
°C
6.4 Thermal Information
DEVICE
THERMAL METRIC(1)
PKG DES (PKG FAM)
UNIT
PINS
66.9
64.3
17.4
1.7
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ΨJT
17.2
9.0
ΨJB
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
Test conditions are at TA = 25 oC , VDD = 3.3 V, Single-ended input with RS = 50 Ω, output with ZL = 100 Ωdifferential,
unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
SSBW
LSBW
Small-signal 3-dB bandwidth
Large-signal 3-dB bandwidth
Vo = 0.1 VPP
11
11
GHz
GHz
GHz
dB
Vo = 1 VPP
1-dB BW Bandwidth for 1-dB flatness
8
S21
S11
S12
Power Gain
f = 2 GHz
16
Input return loss
Reverse isolation
f = 10 MHz to 8 GHz
f = 2 GHz
dB
–10
-35
± 0.3
± 3
dB
ImbGAIN Gain Imbalance
ImbPHASE Phase Imbalance
f = 10 MHz to 8 GHz
f = 10 MHz to 8 GHz
dB
degrees
CMRR using the formula (S21-S31) /
CMRR
(S21+S31). Port-1: INP, Port-2: OUTP,
Port-3: OUTM
f = 2 GHz
-45
dB
f = 0.5 GHz, Po = +3 dBm
f = 2 GHz, Po = +3 dBm
f = 6 GHz, Po = +3 dBm
f = 8 GHz, Po = +3 dBm
f = 0.5 GHz, Po = +3 dBm
f = 2 GHz, Po = +3 dBm
f = 6 GHz, Po = +3 dBm
f = 8 GHz, Po = +3 dBm
-70
-65
-52
-45
-68
-63
-56
-63
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
HD2
Second-order harmonic distortion
Third-order harmonic distortion
HD3
f = 0.5 GHz, Po = -4 dBm per tone (10
MHz spacing)
-73
-69
-56
-45
-75
-84
-72
-51
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
f = 2 GHz, Po = -4 dBm per tone (10 MHz
spacing)
IMD2
Second-order intermodulation distortion
f = 6 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 8 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 0.5 GHz, Po = -4 dBm per tone (10
MHz spacing)
f = 2 GHz, Po = -4 dBm per tone (10 MHz
spacing)
IMD3
Third-order intermodulation distortion
f = 6 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 8 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 0.5 GHz
f = 2 GHz
f = 6 GHz
f = 8 GHz
11
15
dBm
dBm
dBm
dBm
OP1dB
Output 1-dB compression point
12.5
7.5
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6.5 Electrical Characteristics (continued)
Test conditions are at TA = 25 oC , VDD = 3.3 V, Single-ended input with RS = 50 Ω, output with ZL = 100 Ωdifferential,
unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
f = 0.5 GHz, Po = -4 dBm per tone (10
MHz spacing)
68
dBm
f = 2 GHz, Po = -4 dBm per tone (10 MHz
spacing)
63
55
42
34
37
34
30
21
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
OIP2
Output second-order intercept point
f = 6 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 8 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 0.5 GHz, Po = -4 dBm per tone (10
MHz spacing)
f = 2 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 4 GHz, Po = -4 dBm per tone (10 MHz
spacing)
OIP3
Output third-order intercept point
f = 6 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 8 GHz, Po = -4 dBm per tone (10 MHz
spacing)
f = 0.5 GHz
f = 2 GHz
f = 6 GHz
f = 8 GHz
6.5
6.8
7.2
7
dB
dB
dB
dB
NF
Noise Figure
IMPEDANCE
ZO-DIFF Differential output impedance
ZIN Single ended input impedance
TRANSIENT
f = DC (internal to the device)
3
Ω
Ω
50
With INM terminated with 50 Ω
VOMAX
VOSAT
TREC
Output max operating range (differential)
2
3.9
0.2
VPP
VPP
ns
Output saturated voltage level
(differential)
f = 2 GHz
Over-drive recovery time
Using a -0.5 Vp input pulse of width 2 ns
POWER SUPPLY
IQA
Active current
Power-down quiescent current
Current on VDD pin, PD = 0
Current on VDD pin, PD = 1
138
7
mA
mA
IQPD
ENABLE
VPDHIGH PD pin logic HIGH
VPDLOW PD pin logic LOW
1.45
V
0.8
100
250
V
PD = HIGH (1.8 V logic)
PD = HIGH (3.3 V logic)
50
200
2
µA
µA
pF
ns
ns
IPDBIAS
PD bias current (current on PD pin)
CPD
TON
TOFF
PD pin capacitance
Turn_on time
50% VPD to 90% RF
50% VPD to 10% RF
200
50
Turn_off time
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6.6 Typical Characteristics
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
20
18
16
14
12
10
8
20
18
16
14
12
10
8
6
6
-40 èC
25 èC
85 èC
105 èC
4
4
3.15 V
3.3 V
3.45 V
2
2
0
0
0
2000
4000
6000
Frequency (MHz)
8000
10000
12000
0
2000
4000
6000
8000
10000
12000
SBOS
Frequency (MHz)
.
.
图6-1. Power Gain Across Temperature
图6-2. Power Gain Across VDD
0
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-40 èC
25 èC
85 èC
105 èC
3.15 V
3.3 V
3.45 V
0
2000
4000
6000
Frequency (MHz)
8000
10000
12000
0
2000
4000
6000
8000
10000
12000
SBOS
Frequency (MHz)
.
.
图6-3. Return Loss Across Temperature
图6-4. Return Loss Across VDD
0
-5
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-10
-15
-20
-25
-30
-35
-40
-45
-50
-40 èC
25 èC
85 èC
3.15 V
3.3 V
3.45 V
105 èC
0
2000
4000
6000
Frequency (MHz)
8000
10000 12000
0
2000
4000
6000
8000
10000
12000
SBOS
Frequency (MHz)
.
.
图6-5. Reverse Isolation Across Temperature
图6-6. Reverse Isolation Across VDD
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6.6 Typical Characteristics (continued)
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
3.15 V
3.3 V
3. 45 V
-40 èC
25 èC
85 èC
105 èC
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
Pout /tone = -4 dBm, 10 MHz tone spacing
Pout /tone = -4 dBm, 10 MHz tone spacing
图6-7. OIP3 Across Temperature
图6-8. OIP3 Across VDD
-20
-30
-40
-50
-60
-70
-80
-90
-100
-20
-30
-40
-50
-60
-70
-80
-90
-100
3.15 V
3.3 V
3.45 V
-40 èC
25 èC
85 èC
105 èC
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
At (2f1-f2) frequency, f1 < f2; Pout /tone = -4 dBm, 10 MHz tone
spacing
At (2f1-f2) frequency, f1 < f2; Pout /tone = -4 dBm, 10 MHz tone
spacing
图6-9. IMD3 Lower Across Temperature
图6-10. IMD3 Lower Across VDD
-20
-20
3.15 V
3.3 V
3.45 V
-40
-40 èC
25 èC
85 èC
105 èC
-30
-40
-50
-60
-70
-80
-90
-100
-30
-50
-60
-70
-80
-90
-100
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
At (2f2-f1) frequency, f1 < f2; Pout /tone = -4 dBm, 10 MHz tone
spacing
At (2f2-f1) frequency, f1 < f2; Pout /tone = -4 dBm, 10 MHz tone
spacing
图6-11. IMD3 Higher Across Temperature
图6-12. IMD3 Higher Across VDD
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6.6 Typical Characteristics (continued)
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
80
70
60
50
40
30
20
80
70
60
50
40
30
20
-40 èC
25 èC
85 èC
105 èC
3.15 V
3.3 V
3.45 V
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
At (f2-f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
At (f2-f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
图6-13. OIP2 Lower Across Temperature
图6-14. OIP2 Lower Across VDD
80
80
70
60
50
70
60
50
40
40
-40 èC
25 èC
85 èC
105 èC
30
20
3.15 V
30
3.3 V
3.45 V
20
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
At (f2+f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
At (f2+f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
图6-15. OIP2 Higher Across Temperature
图6-16. OIP2 Higher Across VDD
-20
-20
3.15 V
3.3 V
3.45 V
-40
-40 èC
25 èC
85 èC
105 èC
-30
-40
-50
-60
-70
-80
-90
-100
-30
-50
-60
-70
-80
-90
-100
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
At (f2-f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
At (f2-f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
图6-17. IMD2 Lower Across Temperature
图6-18. IMD2 Lower Across VDD
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6.6 Typical Characteristics (continued)
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
-20
-30
-40
-50
-60
-70
-80
-90
-100
-20
-30
-40
-50
-60
-70
-80
-90
-100
3.15 V
3.3 V
3.45 V
-40 èC
25 èC
85 èC
105 èC
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
At (f2+f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
At (f2+f1) frequency, f2 > f1; Pout /tone = -4 dBm, 10 MHz tone
spacing
图6-19. IMD2 Higher Across Temperature
图6-20. IMD2 Higher Across VDD
-20
-20
3.15 V
3.3 V
3.45 V
-40
-40 èC
25 °C
85 °C
105 °C
-30
-40
-50
-60
-70
-80
-90
-100
-30
-50
-60
-70
-80
-90
-100
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
Pout = +3 dBm
Pout = +3 dBm
图6-21. HD2 Across Temperature
图6-22. HD2 Across VDD
-20
-30
-40
-50
-60
-70
-80
-90
-100
-20
-30
-40
-50
-60
-70
-80
-90
-100
3.15 V
3.3 V
3.45 V
-40 èC
25 èC
85 èC
105 èC
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
Pout = +3 dBm
Pout = +3 dBm
图6-23. HD3 Across Temperature
图6-24. HD3 Across VDD
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6.6 Typical Characteristics (continued)
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
-20
-30
-40
-50
-60
-70
-80
-90
-100
-20
-30
-40
-50
-60
-70
-80
-90
-100
1800 MHz
4000 MHz
6000 MHz
8000 MHz
1800 MHz
4000 MHz
6000 MHz
8000 MHz
-4
-2
0
2
4
6
8
-4
-2
0
2
4
6
8
Output Power (dBm)
Output Power (dBm)
.
.
图6-25. HD2 vs Output Power
图6-26. HD3 vs Output Power
20
18
16
14
12
10
8
20
18
16
14
12
10
8
3.15 V
3.3 V
3.45 V
-40 èC
25 èC
85 èC
105 èC
6
6
4
4
0
0
2000
4000 6000
Frequency (MHz)
8000
10000
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
.
.
图6-27. Output P1dB Across Temperature
图6-28. Output P1dB Across VDD
14
12
10
8
14
12
10
8
3.15 V
3.3 V
3.45 V
-40 èC
25 èC
85 èC
105 èC
6
6
4
4
2
2
0
0
0
0
2000
4000 6000
Frequency (MHz)
8000
10000
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
.
.
图6-29. NF Across Temperature
图6-30. NF Across VDD
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6.6 Typical Characteristics (continued)
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
1
0.8
0.6
0.4
0.2
0
5
4
3
2
1
0
-0.2
-0.4
-0.6
-0.8
-1
-1
-2
-3
-4
-5
-40 èC
25 èC
85 èC
105 èC
-40 èC
25 èC
85 èC
105 èC
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000 6000
Frequency (MHz)
8000
10000
SBOS
SBOS
.
.
图6-31. Gain Imbalance
图6-32. Phase Imbalance
0
-10
-20
-30
-40
-50
-60
-70
0
-10
-20
-30
-40
-50
-60
-70
3.15 V
3.3 V
3.45 V
-40 èC
25 èC
85 èC
105 èC
0
2000
4000 6000
Frequency (MHz)
8000
10000
0
2000
4000
6000
8000
10000
SBOS
Frequency (MHz)
.
.
图6-33. CMRR Across Temperature
图6-34. CMRR Across VDD
2
1.5
1
4
3.5
3
0.5
0
2.5
2
-0.5
-1
1.5
1
-1.5
-2
V_measured
V_ideal
0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
2000
4000
6000
8000
10000
Time (ns)
Frequency (MHz)
Input = -2 dBm, f = 500 MHz
Input = +6 dBm
图6-35. Overdrive Recovery
图6-36. Saturation Voltage
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6.6 Typical Characteristics (continued)
Temperature = 25 °C, VDD = 3.3 V, input is 50 Ωsingle-ended, output is 100 Ωdifferential unless otherwise specified.
.
.
图6-38. Differential S22
图6-37. Single-Ended S11
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7 Detailed Description
7.1 Overview
The TRF1208 is a very high-performance amplifier optimized for radio frequency (RF) and intermediate
frequency (IF) with signal bandwidths up to 11 GHz. The device is ideal for ac-coupled applications that may
require a single-ended to differential conversion when driving an analog-to-digital converter (ADC). The chip has
a 2-stage architecture and provides about 16 dB of gain when configured for single-ended inputs driven from a
50-Ωsource. This chip can also work as as a Diff-to-SE amplifier to act as a DAC buffer.
This chip does not require any pull up or pull down components on PCB and thereby it simplifies the layout and
ensures the highest performance over the whole bandwidth.
The input and output are ac coupled. The chip is powered with 3.3 V supply (TRF1208A5 is an alternate part
that works off 5 V supply). A power-down feature is also available for this chip.
7.2 Functional Block Diagram
The following figure shows the functional block diagram of TRF1208. It essentialy has 2-stages with voltage
feedback configuration.
TRF1208
–
+
–
+
7.3 Feature Description
The TRF1208 includes the following features:
• Fully differential amplifier
• Single supply operation
• Power-down option
7.3.1 Fully-Differential Amplifier
The TRF1208 is a voltage feedback fully-differential amplifier (FDA) with fixed gain by architecture. TRF1208 is
most suited to be operated as a single-ended to differential amplifier by terminating the INM pin by a 50 Ω
resistor and driving the INP pin directly with no external components.
This amplifier has non-linearity cancellation circuits due to which it has excellent linearity performance over a
wide range of frequencies.
The output of the amplifier has a low DC impedance. It can be matched to a load if required by adding
appropriate series resistors or attenuator pad.
7.3.2 Single Supply Operation
TRF1208 operates on a single 3.3 V supply. The input and output bias voltages are set internally. Therefore, the
signal path has to be ac-coupled on the board at all the 4 RF input and output pins. Single supply operation
simplifies the board design.
There is also another variant of this chip (TRF1208A5) that operates with 5 V supply instead of 3.3 V.
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7.3.3 Power Down Option
There is power-down functionality for this device. The PD pin can be used to power-down the amplifier. This pin
supports both 1.8 V and 3.3 V digital logics and is referenced to the GND. A logic 1 turns the device off placing
the device into a low quiescent current state.
Note that, when disabled, the signal path is still present through the internal circuits. Input signals applied to a
disabled device still appear at the outputs at some lower level through this path as they would for any disabled
feedback amplifier.
7.4 Device Functional Modes
TRF1208 has 2 functional modes, namely, Active mode and Power-down mode. The functional modes are
controlled by the PD pin as described in the previous section.
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
8.1.1 Driving a High-Speed ADC
A common application of TRF1208 is to drive a high-speed ADC such as ADC12DJ5200RF or AFE7950 which
have differential input. Conventionally passive baluns are used to drive Gsps ADCs due to non-availability of
high-BW, linear amplifiers. TRF1208 is an active balun that has excellent bandwidth flatness, gain, and phase
imbalance comparable to or exceeding costly passive baluns.
图 8-1 shows a typical interface circuit for ADC12DJ5200RF. Depending on the ADC and system requirement,
this circuit can be simplified or can be more complex.
Anti-aliasing filter
Resistive matching pad
50 Ω
TRF1208
ADC12DJ5200RF
图8-1. Interfacing with ADC12DJ5200RF
It shows two sections of the circuit between the driver amp and the ADC – namely the matching pad (or
attenuator pad) and the anti-aliasing filter. Small form-factor RF quality passive components are recommended
for these circuits. The output swing of TRF1208 is well suited to drive these ADCs full-scale at the same time not
over-driving it avoiding the need for any voltage limiting device at the ADC.
The following figures show typical interface circuits for AFE7950 RX and TX chains in which TRF1208 is the S2D
and D2S amplifier respectively.
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3.3 V
RX path
100 pF
100 pF
10
10
10
10
12
11
9
100 pF
100 pF
OUTM
OUTP
To AFE7950 RX
VDD
6
5
INP
INM
1
4
7
GND
TRF1208
GND
GND
GND
TPAD
2
PD
8
3
10
13
TP1
TP2
(See NOTE A)
A. AFE matching network –component type (whether L or C) and values depend on the channel (A, B, C, D, FB1, FB2) and frequency
band
图8-2. Interfacing with AFE7950 RX
1.8 V
TX path
3.3 V
100 pF
20
100 pF
20
12
11
9
OUTM
OUTP
VDD
6
5
INP
INM
From AFE7950 TX
1
4
7
TRF1208GND
GND
2
100 pF
PD
GND
GND
TPAD
20
8
3
100 pF
10
13
TP1
TP2
(See NOTE A)
A. AFE matching network –component type (whether L or C) and values depend on the channel (A, B, C, D) and frequency band
图8-3. Interfacing with AFE7950 TX
8.1.2 Calculating Output Voltage Swing
This section gives an idea of the output voltage swings for different input power levels as a quick reference. The
output is terminated with 100 Ωdifferential load in this case and power gain of 16 dB is assumed.
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Pi, Vi
50
Po, Vo
TRF1208
图8-4. Power and Voltage Levels
Voltage gain = 20*log (Vo/Vi)
Power gain = 10*log (Po/Pi) = 10*log ((Vo 2/100)/(Vi 2/50)) = 20*log (Vo/Vi) - 3 dB
(1)
表8-1. Output Voltage Swings for Different Input Power Levels
Input
Output
Pi (dBm)
-20
Vi (Vpp)
Po (dBm)
Vo (Vpp)
0.063
0.112
0.2
-4
1
0.564
1.004
1.785
2.002
-15
-10
6
-9
0.224
7
8.1.3 Thermal Considerations
The TRF1208 is packaged in a 2 mm × 2 mm WQFN-FCRLF package that has excellent thermal properties. The
chip has a thermal pad underneath that should be connected to a ground plane. The ground plane should be
shorted to the other ground pins of the chip at four corners if possible to allow heat propagation to the top layer
of PCB. There should be a thermal via that connects the thermal pad plane on the top layer of the PCB to the
inner layer ground planes to allow heat propagation to the inner layers.
The total power dissipation needs to be limited to keep the device junction temperature below 150°C for
instantaneous power and below 125°C for continuous power.
8.2 Typical Application
An example of TRF1208 acting as ADC and DAC amplifiers for AFE7950 is explained in this section.
8.2.1 TRF1208 in Receive Chain
This section describes an RF receiver chain in which TRF1208 is working as a S2D (SE-to-diff) amp and driving
a receive channel of AFE7950.
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INM
OUTP
RXIN+
11
12
TRF1208
AFE7950
RXIN-
INP
OUTM
图8-5. TRF1208 in Receive Chain with AFE7950
The previous figure is a generic schematics of a design in which TRF1208 drives an AFE7950 receive channel.
The exact values of the components depend on the frequency band for which the AFE7950 front-end is
matched.
8.2.1.1 Design Requirements
The AFE7950 channel is required to be matched to 8.2 GHz.
8.2.1.2 Detailed Design Procedure
The TRF1208 is configured as a S2D amplifier. The section close to TRF1208 output is an attenuator pad which
is meant for robust matching. The section close to AFE7950 is the matching network for the AFE which is
channel dependent. The matching components are chosen based on the AFE return-loss data and some trial
and error since the board parameters can influence the exact values
表 8-2 shows the bill of materials (BOM) values of the design for a channel that is matched to center frequency
of 8.2 GHz.
表8-2. Component Values of RX Chain with Center Frequency = 8.2 GHz
Section
Designator
C117
C115
C111
C122
R74
Type
Value
100 nF
100 nF
100 nF
100 nF
10 Ω
Part Number
Install / DNI
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
DNI
DC block cap
DC block cap
DC block cap
DC block cap
Attenuator
Attenuator
Attenuator
Attenuator
Attenuator
Attenuator
INM term
cap
530L104KT
cap
530L104KT
cap
530L104KT
cap
530L104KT
resistor
resistor
resistor
resistor
resistor
resistor
resistor
ERJ-1GEF10R0C
ERJ-1GEF10R0C
ERJ-1GEF10R0C
ERJ-1GEF10R0C
ERJ-1GNF1400C
ERJ-1GNF1400C
ERJ-1GEF49R9C
R70
10 Ω
R69
10 Ω
R67
10 Ω
R71
140 Ω
140 Ω
50 Ω
R68
R82
Matching
C91
Matching
L20
DNI
Matching
C103
C83
DNI
Matching
DNI
Matching
L22
inductor
inductor
inductor
0.1 nH
0.1 nH
0.1 nH
LQP03TG0N1B02#
LQP03TG0N1B02#
LQP03TG0N1B02#
Install
Install
Install
Matching
L18
Matching
C96
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表8-2. Component Values of RX Chain with Center Frequency = 8.2 GHz (continued)
Section
Matching
Matching
Matching
Matching
Designator
Type
Value
0.1 nH
0.8 pF
0.8 pF
0.3 nH
Part Number
Install / DNI
C87
inductor
cap
LQP03TG0N1B02#
02015J0R8PBSTR
02015J0R8PBSTR
LQP03TG0N3B02#
Install
Install
Install
Install
C97
C88
cap
C92
inductor
8.2.2 TRF1208 in Transmit Chain
This section describes an RF transmit chain in which TRF1208 works as a diff-to-SE converter to convert the
DAC output of AFE7950 into a single-ended signal that will drive a PA or a mixer.
TXOUT+
11
INM
OUTP
TRF1208
AFE7950
12
INP
OUTM
TXOUT-
图8-6. TRF1208 in Transmit Chain with AFE7950
The previous figure is a generic schematics of a design in which TRF1208 is used with AFE7950 in the transmit
chain. The exact values of the components depend on the frequency band for which the AFE7950 front-end is
matched.
8.2.2.1 Design Requirements
The AFE7950 channel is required to be matched to 8.2 GHz.
8.2.2.2 Detailed Design Procedure
The TRF1208 is configured as a D2S amplifier. OUTM pin of TRF1208 is terminated on 50 Ω and OUTP is taken
out as the SE output. The section close to TRF1208 input is an attenuator pad which is meant for robust
matching. The section close to AFE7950 is the matching network for the AFE which is channel dependent. The
matching components are chosen based on the AFE return-loss data and some trial and error since the board
parameters can influence the exact values.
表8-3 shows the BOM values of the design for a channel that is matched to center frequency of 8.2 GHz.
表8-3. Component Values of TX Chain with Center Frequency = 8.2 GHz
Section
Designator
Type
Value
2 nH
2 nH
Part Number
Install / DNI
Install
Install
DNI
Supply inductor
Supply inductor
Matching
L25
inductor
inductor
LQP03TG2N0B02#
LQP03TG2N0B02#
L26
C125
C142
C156
L34
Matching
DNI
Matching
DNI
Matching
capacitor
capacitor
0.7 pF
0.7 pF
02015J0R7PBSTR
02015J0R7PBSTR
Install
Install
Matching
L33
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表8-3. Component Values of TX Chain with Center Frequency = 8.2 GHz (continued)
Section
Designator
C134
C140
C139
C149
C150
C151
C153
R88
Type
Value
0.5 nH
0.1 nH
0.1 nH
100 nF
100 nF
100 nF
100 nF
20 Ω
Part Number
Install / DNI
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Install
Matching
Matching
Matching
DC block cap
DC block cap
DC block cap
DC block cap
Attenuator
Attenuator
Attenuator
Attenuator
Attenuator
Attenuator
Term
inductor
inductor
inductor
capacitor
capacitor
capacitor
capacitor
resistor
resistor
resistor
resistor
resistor
resistor
resistor
resistor
resistor
resistor
resistor
LQP03TG0N5B02#
LQP03TG0N1B02#
LQP03TG0N1B02#
530L104KT
530L104KT
530L104KT
530L104KT
ERJ-1GNF20R0C
ERJ-1GNF20R0C
ERJ-1GNF20R0C
ERJ-1GNF20R0C
ERJ-1GNF57R6C
ERJ-1GNF57R6C
ERJ-1GN0R00C
ERJ-1GN0R00C
ERJ-1GEF10R0C
ERJ-1GEF10R0C
ERJ-1GEF49R9C
R89
20 Ω
R92
20 Ω
R93
20 Ω
R90
57.6 Ω
57.6 Ω
0 Ω
R91
R105
R107
R96
Term
0 Ω
Term
10 Ω
Term
R97
10 Ω
Term
R108
50 Ω
9 Power Supply Recommendations
TRF1208 requires a single 3.3 V supply. Supply decoupling is critical to high-frequency performance. Typically 2
or 3 capacitors are used for supply decoupling. The lowest-value capacitor should be a small form-factor
component that is placed closest to the VDD pin of the device. There should be bulk decoupling capacitor that is
of bigger value and size which can be placed next to the small capacitor. Additional layout recommendations are
given in the Layout section.
10 Layout
10.1 Layout Guidelines
TRF1208 is a wide-band feedback amplifer with about 16 dB of gain. When designing with a wide-band RF
amplifier with relatively high gain, certain board layout precautions must be taken to ensure stability and optimum
performance. TI recommends that the board be multi-layered to maintain signal and power integrity and thermal
performance. 图10-1 shows an example of a good layout. In this figure, only the top layer is shown.
The RF input and output lines are recommended to be routed as grounded coplanar waveguide (GCPW) lines.
The second layer should be continuous ground layer without any ground-cuts near the amplifier area. The output
differential lines have to be matched in length to minimize phase imbalance. Use small footprint passive
components wherever possible. Care should be given also for the input side layout. The INP routing should be
50-ohm line and the termination on INM pin should have low parasitics by placing the ac-coupling cap and the
50 Ωresistor very close to the device. Use a RF quality 50 Ωresistor for termination. Ensure that ground planes
on the top and internal layers are well stitched with vias.
Place thermal via under the device that connects the top thermal pad with ground planes in the inner layers of
PCB. Also connect the thermal pad to the top layer ground plane through the ground pins as shown in the figure
for improved heat dissipation.
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10.2 Layout Example
50-ohm termina on
resistor (0201) on INM pin
very close to the cap
Matched di eren al
output rou ng with
symmetric ground vias
dc-blocking caps (0402) placed
very close to the device
TRF1208 device
Thermal via under the device,
connected to top layer ground for
improved heat dissipa on
Supply decoupling caps (0201 &
0402) placed very close to the device
图10-1. Layout Example –Placement and Top Layer Layout
The TRF1208 device can be evaluated using the TRF1208 EVM board, which can be ordered from TRF1208
product folder. Additional information about the evaluation board construction and test setup is given in the
TRF1208 EVM User's Guide.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, TRF1208 EVM User's Guide
11.3 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TRF1208RPVR
TRF1208RPVT
ACTIVE
ACTIVE
WQFN-HR
WQFN-HR
RPV
RPV
12
12
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 105
-40 to 105
1208
1208
Samples
Samples
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-Jan-2023
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TRF1208RPVR
TRF1208RPVT
WQFN-
HR
RPV
RPV
12
12
3000
250
178.0
8.4
2.25
2.25
1.0
4.0
8.0
Q1
WQFN-
HR
178.0
8.4
2.25
2.25
1.0
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TRF1208RPVR
TRF1208RPVT
WQFN-HR
WQFN-HR
RPV
RPV
12
12
3000
250
205.0
205.0
200.0
200.0
33.0
33.0
Pack Materials-Page 2
PACKAGE OUTLINE
RPV0012A
WQFN-FCRLF - 0.7 mm max height
S
C
A
L
E
6
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
2.1
1.9
A
B
PIN 1 INDEX AREA
2.1
1.9
0.7
0.6
C
SEATING PLANE
0.08 C
0.01
0.00
EXPOSED
THERMAL PAD
2X 0.5
(0.055) TYP
SYMM
6
5
4
7
12X (0.18)
SYMM
13
2X 1.5
0.75 0.1
8X 0.5
10
1
11
12
PIN 1 ID
0.3
12X
0.2
0.5
0.3
12X
0.1
C A B
0.05
4225258/B 04/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
RPV0012A
WQFN-FCRLF - 0.7 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
12X (0.6)
12
11
SEE SOLDER MASK
DETAIL
10
12X (0.25)
1
13
SYMM
(1.8)
8X (0.5)
(
0.75)
4
7
(R0.05) TYP
6
5
(
0.2) TYP
VIA
(1.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 30X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
SOLDER MASK DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4225258/B 04/2020
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RPV0012A
WQFN-FCRLF - 0.7 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
1X ( 0.71)
11
12
12X (0.6)
1
12X (0.25)
10
13
SYMM
(1.8)
8X (0.5)
4
7
(R0.05) TYP
5
6
SYMM
(1.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 30X
EXPOSED PAD 13
90% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
4225258/B 04/2020
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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