TRSF3243EIPWR [TI]
具有 15kV IEC ESD 保护的多通道 RS-232 兼容线路驱动器/接收器 (3T/5R) | PW | 28 | -40 to 85;
| 型号： | TRSF3243EIPWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 15kV IEC ESD 保护的多通道 RS-232 兼容线路驱动器/接收器 (3T/5R) | PW | 28 | -40 to 85 驱动 驱动器 |
| 文件： | 总29页 (文件大小：2061K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TRSF3243E
ZHCSOZ9A –NOVEMBER 2021 –REVISED SEPTEMBER 2022
具有±15kV IEC ESD 保护功能的TRSF3243E 3V 至5.5V 多通道RS-232 兼容线路
驱动器和接收器
±15kV ESD（HBM 和 IEC61000-4-2，空气间隙放
电）和 ±8kV ESD（IEC61000-4-2，接触放电）保
1 特性
• 为RS-232 总线引脚提供ESD 保护
护。该器件可在异步通信控制器和串行端口连接器之间
提供电气接口。电荷泵和四个小型外部电容器支持由
3V 至 5.5V 单电源供电。另外，该器件包括一个始终
有效同相输出(ROUT2B)，这使得使用振铃指示的应用
能够在器件断电的情况下发送数据。该器件以高达
1Mbit/s 的数据信号传输速率运行，具有从 18V/μs 至
150V/μs 的更高压摆率范围。
– ±15kV 人体放电模型(HBM)
– ±8kV IEC61000-4-2 接触放电
– ±15kV IEC61000-4-2 气隙放电
• 由单个3V 至5.5V VCC 电源供电
• 始终有效同相接收器输出(ROUT2B)
• 低待机电流：1μA（典型值）
• 外部电容器：4 × 0.1μF
• 接受5V 逻辑输入及3.3V 电源
• 串行鼠标驱动能力
• 支持高达1Mbit/s 的运行速度
• 自动断电功能，在没有检测到有效RS-232 信号时
禁用驱动器输出
串行端口处于非活动状态时，可提供灵活的电源管理控
制选项。当 FORCEON 为低电平且 FORCEOFF 为高
电平时，自动断电功能启用。在这种运行模式下，如果
器件未检测到有效的 RS-232 信号，则禁用驱动器输
出。如果 FORCEOFF 设定为低电平，则驱动器和接
收器（ROUT2B 除外）均关闭，且电源电流降低至
1μA。断开串行端口的连接或关闭外围驱动器会导致
发生自动断电情况。
• 采用节省空间的RHB (5mm x 5mm QFN-32) 封装
2 应用
封装信息
封装(1)
• 工业PC
• 有线网络
• 数据中心和网络设备
• 笔记本电脑
• 手持设备
封装尺寸（标称值）
5,00mm × 5,00mm
9,70mm × 4,40mm
器件型号
TRSF3243E
VQFN (RHB) (32)
TSSOP (PW) (28)
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
3 说明
TRSF3243E 由三个线路驱动器、五个线路接收器和一
个双电荷泵电路组成，在串行端口连接引脚上具有
空白
3.3 V, 5 V
POWER
FORCEOFF
FORCEON
AUTO-
POWERDOWN
3
3
DOUTx
RS-232
DIN
TX
5
5
RIN
RS-232
RX
ROUT
RIN2
RS-232
RX
ROUT2B
STATUS
INVALID
简化版电路
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLLSFO5
TRSF3243E
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ZHCSOZ9A –NOVEMBER 2021 –REVISED SEPTEMBER 2022
Table of Contents
Parameter Measurement Information...............................9
7 Detailed Description......................................................12
7.1 Overview...................................................................12
Functional Block Diagram...............................................12
7.2 Feature Description...................................................13
7.3 Device Functional Modes..........................................13
8 Application and Implementation..................................14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 14
8.3 Design Requirements............................................... 16
8.4 Detailed Design Procedure.......................................16
9 Power Supply Recommendations................................16
10 Layout...........................................................................17
10.1 Layout Guidelines................................................... 17
10.2 Layout Example...................................................... 17
11 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 ESD Ratings - IEC Specifications...............................5
6.4 Recommended Operating Conditions.........................6
6.5 Thermal Information....................................................6
6.6 Electrical Characteristics.............................................6
6.7 Electrical Characteristics: Driver.................................7
6.8 Switching Characteristics: Driver................................ 7
6.9 Electrical Characteristics: Receiver............................ 7
6.10 Switching Characteristics: Receiver..........................8
6.11 Electrical Characteristics: Auto-Powerdown............. 8
6.12 Switching Characteristics: Auto-Powerdown............ 8
Information.................................................................... 18
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (November 2021) to Revision A (September 2022)
Page
• 删除了封装信息表中的TSSOP (PW) 产品预发布说明...................................................................................... 1
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5 Pin Configuration and Functions
C2+
C2-
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
C1+
V+
2
V-
3
V
CC
RIN1
RIN2
RIN3
RIN4
RIN5
DOUT1
DOUT2
DOUT3
DIN3
DIN2
DIN1
4
GND
5
C1-
6
FORCEON
FORCEOFF
INVALID
ROUT2B
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
7
8
9
10
11
12
13
14
Not to scale
图5-1. PW (TSSOP) Packages, 28 Pin, Top View
表5-1. Pin Functions
PIN
NAME
TYPE(1)
DESCRIPTION
NO.
1
C2+
Positive terminal of the charge-pump capacitor
—
—
2
C2-
Negative terminal of the charge-pump capacitor
Negative charge-pump rail
3
V-
4
RIN1
5
RIN2
6
RIN3
I
RS-232 receiver inputs
7
RIN4
8
RIN5
9
DOUT1
DOUT2
DOUT3
DIN3
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
O
I
RS-232 driver outputs
Driver logic inputs
DIN2
DIN1
ROUT5
ROUT4
ROUT3
ROUT2
ROUT1
ROUT2B
INVALID
FORCEOFF
FORCEON
C1-
O
Receiver logic outputs
Always-active non-inverting receiver logic output
Invalid Output Pin
—
O
I
Auto Powerdown Control input (Refer to Truth Table)
Auto Powerdown Control input (Refer to Truth Table)
Negative terminal of the charge-pump capacitor
Ground
I
—
—
—
—
—
GND
VCC
3-V to 5.5-V supply voltage
V+
Positive charge-pump rail
C1+
Positive terminal of the charge-pump capacitor
(1) Signal Types: I = Input, O = Output, I/O = Input or Output.
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RIN1
RIN2
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
GND
C1-
RIN3
FORCEON
FORCEOFF
RIN4
INVALID
RIN5
DOUT1
DOUT2
DOUT3
ROUT2B
ROUT1
ROUT2
Not to scale
图5-2. RHB (VQFN) Package, 32 Pin, Top View
表5-2. Pin Functions
PIN
NAME
TYPE
DESCRIPTION
NO.
1
RIN1
2
RIN2
3
RIN3
I
RS-232 receiver inputs
4
RIN4
5
RIN5
6
DOUT1
DOUT2
DOUT3
NC
7
O
RS-232 driver outputs
No internal connection
Driver logic inputs
8
9
—
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DIN3
DIN2
I
DIN1
ROUT5
ROUT4
ROUT3
NC
O
Receiver logic outputs
No internal connection
Receiver outputs
—
ROUT2
ROUT1
ROUT2B
INVALID
FORCEOFF
FORCEON
C1-
O
O
O
Always-active non-inverting receiver output
Invalid Output Pin
I
Auto Powerdown Control input (Refer to Truth Table)
Auto Powerdown Control input (Refer to Truth Table)
Negative terminal of the charge-pump capacitor
Ground
I
—
—
—
—
—
—
—
—
—
—
GND
NC
No internal connection
VCC
3-V to 5.5-V supply voltage
V+
Positive charge-pump rail
C1+
Positive terminal of the charge-pump capacitor
C2+
C2-
Negative terminal of the charge-pump capacitor
Negative charge-pump rail
V-
NC
No internal connection
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
–0.3
–0.3
0.3
MAX
6
UNIT
VCC
Supply voltage range(2)
V
V
V
V
V+
Positive-output supply voltage range(2)
Negative-output supply voltage range(2)
Supply voltage difference(2)
7
V–
–7
13
V+ –V–
Driver ( FORCEOFF, FORCEON)
6
–0.3
–25
VI
Input voltage range
V
Receiver
Driver
25
VO
TJ
Output voltage range
13.2
150
150
V
–13.2
Operating virtual junction temperature
Storage temperature range
°C
°C
Tstg
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) All voltages are with respect to network GND.
6.2 ESD Ratings
VALUE
UNIT
All pins except RIN1, RIN2, RIN3, RIN4,
RIN5, DOUT1, DOUT2 and DOUT3 pins
±3000
Human-body model (HBM), per ANSI/
ESDA/JEDEC JS-001(1)
Electrostatic
discharge
RIN1, RIN2, RIN3, RIN4, RIN5, DOUT1,
DOUT2 and DOUT3 pins to GND
V (ESD)
V
±15000
±1500
Charged device model (CDM), per ANSI/
ESDA/JEDEC JS-002(2)
All pins
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings - IEC Specifications
VALUE
±8,000
UNIT
IEC 61000-4-2 Contact Discharge (1)
RIN1, RIN2, RIN3, RIN4, RIN5, DOUT1,
DOUT2 and DOUT3 pins
Electrostatic
discharge
V (ESD)
V
IEC 61000-4-2 Air-gap Discharge (1)
±15,000
(1) A minimum of 1-µF capacitor between VCC and GND is required to meet the specified IEC 61000-4-2 rating.
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6.4 Recommended Operating Conditions
see (1)
MIN
3
NOM
3.3
5
VCC = 3.3 V
VCC = 5 V
VCC = 3.3 V
VCC = 5 V
3.6
V
5.5
Supply voltage
4.5
2
VIH
Driver and control high-level input voltage DIN, FORCEOFF, FORCEON
Driver and control low-level input voltage DIN, FORCEOFF, FORCEON
V
2.4
VIL
VI
0.8
5.5
25
V
V
Driver and control input voltage
Receiver input voltage
DIN, FORCEOFF, FORCEON
0
–25
–40
VI
V
TA
Operating free-air temperature
85
°C
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.5 Thermal Information
TRSF3243E
THERMAL METRIC(1)
VQFN (RHB)
32 PINS
34.1
TSSOP (PW)
28 PINS
70.3
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
25.9
21.0
14.6
29.2
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.5
1.3
ψJT
14.6
28.8
ψJB
RθJC(bot)
5.1
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS(2)
MIN TYP(1)
MAX UNIT
II
Input leakage current
FORCEOFF, FORCEON
±0.01
±1
1.2
10
μA
No load,
Auto-powerdown disabled
Powered off
0.3
1
mA
FORCEOFF and FORCEON = VCC
No load, FORCEOFF = GND
ICC
Supply current
No load, FORCEOFF = VCC
FORCEON = GND,
All RIN are open or grounded,
All DIN are grounded
,
μA
Auto-powerdown enabled
1
10
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
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6.7 Electrical Characteristics: Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS(3)
MIN TYP(1)
MAX UNIT
High-level output
voltage
VOH
VOL
VO
5
5.4
V
All DOUT at RL = 3 kΩ to GND
Low-level output
voltage
-5
V
V
All DOUT at RL = 3 kΩ to GND
–5.4
Output voltage
(mouse driveability)
DIN1 = DIN2 = GND, DIN3 = VCC, 3-kΩ to GND at DOUT3,
DOUT1 = DOUT2 = 2.5 mA
±5
IIH
IIL
High-level input current VI = VCC
Low-level input current VI = GND
±0.01
±0.01
±1
±1
μA
μA
VCC = 3.6 V,
VO = 0 V
Short-circuit output
current(2)
IOS
ro
±35
±60
mA
VCC = 5.5 V,
VO = 0 V
Output resistance
VO = ±2 V
VO = ±12 V,
VO = ±10 V,
300
10M
VCC, V+, and V–= 0 V,
Ω
VCC = 3 V to 3.6 V
±25
±25
Ioff
Output leakage current FORCEOFF = GND
μA
VCC = 4.5 V to 5.5 V
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
(3) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.8 Switching Characteristics: Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS(3)
MIN TYP(1)
MAX UNIT
kbit/s
CL = 1000 pF
250
1000
1000
25
Maximum data rate
(see 图7-1)
RL = 3 kΩ,
CL = 250 pF,
VCC = 3 V to 4.5 V
VCC = 4.5 V to 5.5 V
See 图7-2
One DOUT switching
CL = 1000 pF,
tsk(p)
Pulse skew(2)
CL = 150 pF to 2500 pF,
CL = 150 pF to 1000 pF,
ns
RL = 3 kΩ to 7 kΩ,
Slew rate,
transition region
(see 图7-1)
SR(tr)
VCC = 3.3 V
18
150
RL = 3 kΩ to 7 kΩ,
V/μs
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Pulse skew is defined as |tPLH –tPHL| of each channel of the same device.
(3) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.9 Electrical Characteristics: Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
High-level output voltage
Low-level output voltage
TEST CONDITIONS(2)
IOH = –1 mA
IOL = 1.6 mA
VCC = 3.3 V
MIN
TYP(1)
MAX
UNIT
VOH
VOL
V
V
VCC –0.6
VCC –0.1
0.4
2.4
2.4
1.6
1.9
VIT+
Positive-going input threshold voltage
Negative-going input threshold voltage
V
V
VCC = 5 V
VCC = 3.3 V
0.6
0.8
1.1
VIT–
VCC = 5 V
1.4
Vhys
Ioff
ri
0.5
V
Input hysteresis (VIT+ –VIT–
)
Output leakage current (except ROUT2B)
Input resistance
FORCEOFF = 0 V
VI = ±3 V to ±25 V
±0.05
5
±10
7
μA
kΩ
3
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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(2) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.10 Switching Characteristics: Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Output enable time
TEST CONDITIONS(3)
TYP(1)
UNIT
ns
tPLH
tPHL
ten
150
150
200
200
50
CL = 150 pF, See 图7-3
ns
CL = 150 pF, See 图7-3
CL = 150 pF, RL = 3 kΩ, See 图7-4
CL = 150 pF, RL = 3 kΩ, See 图7-4
See 图7-3
ns
tdis
Output disable time
ns
tsk(p)
Pulse skew(2)
ns
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Pulse skew is defined as |tPLH –tPHL| of each channel of the same device.
(3) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.11 Electrical Characteristics: Auto-Powerdown
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see 图7-5)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
Receiver input threshold
for INVALID high-level output voltage
VT+(valid)
VT–(valid)
VT(invalid)
VOH
FORCEON = GND, FORCEOFF = VCC
2.7
V
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND, FORCEOFF = VCC
FORCEON = GND, FORCEOFF = VCC
V
V
V
V
–2.7
–0.3
Receiver input threshold
for INVALID low-level output voltage
0.3
0.4
IOH = –1 mA, FORCEON = GND,
FORCEOFF = VCC
VCC –
INVALID high-level output voltage
INVALID low-level output voltage
0.6
IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VCC
VOL
6.12 Switching Characteristics: Auto-Powerdown
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see 图7-5)
PARAMETER
TYP(1)
UNIT
μs
tvalid
tinvalid
ten
Propagation delay time, low- to high-level output
1
Propagation delay time, high- to low-level output
Supply enable time
30
μs
100
μs
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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Parameter Measurement Information
3 V
Input
RS-232
Output
0 V
Generator
50 Ω
C
(see Note B)
L
(see Note A)
t
t
TLH
THL
R
L
V
V
OH
3 V
−3 V
3 V
3 V
−3 V
Output
FORCEOFF
OL
6 V
tTHL or tTLH
SR(tr) +
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. C includes probe and jig capacitance.
L
B. The pulse generator has the following characteristics: PRR = 1 Mbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.
O
r
f
图7-1. Driver Slew Rate
3 V
0 V
Input
1.5 V
1.5 V
RS-232
Output
Generator
50 Ω
C
(see Note B)
L
(see Note A)
t
t
PHL
PLH
R
L
V
V
OH
3 V
FORCEOFF
50%
50%
Output
OL
TEST CIRCUIT
NOTES: A. C includes probe and jig capacitance.
VOLTAGE WAVEFORMS
L
B. The pulse generator has the following characteristics: PRR = 1 Mbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.
O
r
f
图7-2. Driver Pulse Skew
3 V or 0 V
3 V
FORCEON
Input
1.5 V
1.5 V
−3 V
Output
Generator
t
t
PLH
PHL
50 Ω
C
(see Note B)
L
(see Note A)
3 V
V
V
OH
FORCEOFF
50%
50%
Output
OL
TEST CIRCUIT
NOTES: A. C includes probe and jig capacitance.
VOLTAGE WAVEFORMS
L
B. The pulse generator has the following characteristics: Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.
O
r
f
图7-3. Receiver Propagation Delay Times
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3 V
Input
1.5 V
1.5 V
V
CC
GND
0 V
3 V or 0 V
S1
FORCEON
t
t
PZH
(S1 at GND)
PHZ
(S1 at GND)
R
L
V
OH
3 V
Output
50%
Output
0.3 V
C
L
(see Note A)
FORCEOFF
t
t
PZL
(S1 at V
PLZ
)
(S1 at V
)
CC
CC
Generator
(see Note B)
50 Ω
0.3 V
Output
50%
V
OL
TEST CIRCUIT
NOTES: A. C includes probe and jig capacitance.
VOLTAGE WAVEFORMS
L
B. The pulse generator has the following characteristics: Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.
O
r
f
C.
D.
t
t
and t
and t
are the same as t
.
dis
PLZ
PZL
PHZ
PZH
are the same as t
.
en
图7-4. Receiver Enable and Disable Times
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3 V
2.7 V
2.7 V
0 V
0 V
Receiver
Input
−2.7 V
−2.7 V
t
ROUT
−3 V
Generator
50 Ω
(see Note B)
t
valid
invalid
V
CC
50% V
50% V
CC
CC
INVALID
Output
0 V
t
en
Auto-
INVALID
C = 30 pF
powerdown
≈V+
V+
L
(see Note A)
0.3 V
V
Supply
Voltages
CC
FORCEOFF
FORCEON
0 V
0.3 V
DIN
DOUT
≈V−
V−
TEST CIRCUIT
VOLTAGE WAVEFORMS
Valid RS-232 Level, INVALID High
2.7 V
0.3 V
Indeterminate
If Signal Remains Within This Region
0 V
†
for More Than 30 µs, INVALID Is Low
−0.3 V
Indeterminate
−2.7 V
Valid RS-232 Level, INVALID High
†
Auto-powerdowndisables drivers and reduces supply
current to 1 µA.
NOTES: A. C includes probe and jig capacitance.
L
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, Z = 50 Ω, 50% duty cycle, t ≤ 10 ns, t ≤ 10 ns.
O
r
f
图7-5. INVALID Propagation Delay Times and Supply Enabling Time
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7 Detailed Description
7.1 Overview
The TRSF3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with
±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)
protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides the
electrical interface between an asynchronous communication controller and the serial-port connector.
The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In
addition, the device includes an always-active noninverting output (ROUT2B), which allows applications using
the ring indicator to transmit data while the device is powered down. The device operates at data signaling rates
up to 500 kbit/s and a maximum of 30-V/μs driver output slew rate.
Functional Block Diagram
14
13
12
9
10
11
DIN1
DIN2
DIN3
DOUT1
DOUT2
DOUT3
22
23
FORCEOFF
FORCEON
21
INVALID
Auto-Powerdown
19
20
4
ROUT1
RIN1
RIN2
ROUT2B
18
17
16
15
5
6
7
8
ROUT2
ROUT3
ROUT4
ROUT5
RIN3
RIN4
RIN5
图7-1. Logic Diagram
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7.2 Feature Description
Auto-powerdown can be disabled when FORCEON and FORCEOFF are high and should be done when driving
a serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal is
applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any
receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V
or has been between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if all receiver input
voltages are between –0.3 V and 0.3 V for more than 30 μs. Refer to 图7-5 for receiver input levels.
7.3 Device Functional Modes
表7-1 through 表7-3 show the device functional modes.
表7-1. Each Driver
INPUTS(1)
OUTPUT
DOUT
DRIVER STATUS
VALID RIN
RS-232 LEVEL
DIN
FORCEON
FORCEOFF
X
L
X
H
H
L
L
X
X
Z
H
L
Powered off
H
H
H
H
Normal operation with
auto-powerdown disabled
H
L
X
Yes
Yes
H
L
Normal operation with
auto-powerdown enabled
H
L
Powered off by auto-powerdown
feature
X
L
H
No
Z
(1) H = high level, L = low level, X = irrelevant, Z = high impedance
表7-2. Each Receiver
INPUTS(1)
FORCEON
OUTPUT
RECEIVER STATUS
RIN
X
FORCEOFF
ROUT
X
X
X
X
L
H
H
H
Z
H
L
Powered off
L
Normal operation with
auto-powerdown disabled/enabled
H
Open
H
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
表7-3. ROUT2B And Outputs INVALID
INPUTS(1)
OUTPUTS
OUTPUT STATUS
VALID RIN
RS-232 LEVEL
RIN2
FORCEON
FORCEOFF
INVALID
ROUT2B
Yes
Yes
Yes
No
L
X
X
X
X
X
X
X
X
H
H
H
L
L
H
L
H
Always active
Open
Open
L
(1) H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
For proper operation, add capacitors as shown in 图 8-1. Pins 12 through 23 connect to UART or general-
purpose logic lines. RS-232 lines on Pins 4 through 11 connect to a connector or cable.
8.2 Typical Application
Three driver and five receiver channels are supported for full duplex transmission with hardware flow control.
The five 5-kΩresistors are internal to the device.
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A. C3 can be connected to VCC or GND
B. Resistor values shown are nominal.
图8-1. Typical Operating Circuit and Capacitor Values
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8.3 Design Requirements
For this design example, use the values in VCC vs Capacitor Values.
• VCC minimum is 3 V and maximum is 5.5 V.
• Maximum recommended bit rate is 1 Mbps.
表8-1. VCC vs Capacitor Values
VCC
C1
C2, C3, and C4
0.1 µF
3.3 V ± 0.3 V
5 V ± 0.5 V
3 V to 5.5 V
0.1 µF
0.047 µF
0.1 µF
0.33 µF
0.47 µF
8.4 Detailed Design Procedure
TRSF3243E has integrated charge-pump that generates positive and negative rails needed for RS-232 signal
levels. Main design requirement is that charge-pump capacitor terminals must be connected with recommended
capacitor values. Charge-pump rail voltages and device supply pin must be properly bypassed with ceramic
capacitors.
9 Power Supply Recommendations
The VCC voltage must be connected to the same power source used for logic device connected to DIN and
ROUT pins. VCC must be between 3 V and 5.5 V.
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10 Layout
10.1 Layout Guidelines
As shown in Layout Example, charge-pump and supply voltage capacitors must be located very close to device
pins. Non-polarized ceramic capacitors are recommended. If polarized tantalum or electrolytic capacitors are
used, they should be connected as per Typical Operating Circuit and Capacitor Values.
10.2 Layout Example
C1+ 28
V+
C2+
C2-
1
2
27
3
Vcc 26
25
(GND)
V-
4
5
6
RIN1
GND
C1-
24
FORCEON 23
FORCEOFF
RIN2
RIN3
7
8
22
INVALID 21
20
RIN4
RIN5
9
ROUT2B
ROUT1 19
ROUT2
DOUT1
DOUT2
10
11
18
DOUT3
DIN3
12
13
14
ROUT3 17
ROUT4 16
DIN2
ROUT5 15
DIN1
图10-1. Example Layout
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Device and Documentation Support
11.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.3 商标
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TRSF3243EIPWR
TRSF3243EIRHBR
ACTIVE
ACTIVE
TSSOP
VQFN
PW
28
32
2000 RoHS & Green
5000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
F3243
Samples
Samples
RHB
NIPDAU
TRSF
3243
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Apr-2023
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Oct-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TRSF3243EIPWR
TRSF3243EIRHBR
TSSOP
VQFN
PW
28
32
2000
5000
330.0
330.0
16.4
12.4
6.9
5.3
10.2
5.3
1.8
1.1
12.0
8.0
16.0
12.0
Q1
Q2
RHB
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Oct-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TRSF3243EIPWR
TRSF3243EIRHBR
TSSOP
VQFN
PW
28
32
2000
5000
356.0
367.0
356.0
367.0
35.0
35.0
RHB
Pack Materials-Page 2
GENERIC PACKAGE VIEW
RHB 32
5 x 5, 0.5 mm pitch
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224745/A
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PACKAGE OUTLINE
RHB0032E
VQFN - 1 mm max height
S
C
A
L
E
3
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
5.1
4.9
B
A
PIN 1 INDEX AREA
(0.1)
5.1
4.9
SIDE WALL DETAIL
20.000
OPTIONAL METAL THICKNESS
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
2X 3.5
(0.2) TYP
3.45 0.1
9
EXPOSED
THERMAL PAD
16
28X 0.5
8
17
SEE SIDE WALL
DETAIL
2X
SYMM
33
3.5
0.3
0.2
32X
24
0.1
C A B
C
1
0.05
32
25
PIN 1 ID
(OPTIONAL)
SYMM
0.5
0.3
32X
4223442/B 08/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
RHB0032E
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
3.45)
SYMM
32
25
32X (0.6)
1
24
32X (0.25)
(1.475)
28X (0.5)
33
SYMM
(4.8)
(
0.2) TYP
VIA
8
17
(R0.05)
TYP
9
16
(1.475)
(4.8)
LAND PATTERN EXAMPLE
SCALE:18X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4223442/B 08/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
RHB0032E
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
4X ( 1.49)
(0.845)
(R0.05) TYP
32
25
32X (0.6)
1
24
32X (0.25)
28X (0.5)
(0.845)
SYMM
33
(4.8)
17
8
METAL
TYP
16
9
SYMM
(4.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 33:
75% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:20X
4223442/B 08/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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Copyright © 2023，德州仪器 (TI) 公司
相关型号：
TRSF3243EIRHBR
具有 15kV IEC ESD 保护的多通道 RS-232 兼容线路驱动器/接收器 (3T/5R) | RHB | 32 | -40 to 85Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
TI
TRSF3243IDB
具有 +/-15kV ESD 保护的 3V 至 5.5V 多通道 1Mbps RS-232 线路驱动器/接收器 | DB | 28Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSF3243IDBR
3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSF3243IDW
3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSF3243IDWR
3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSF3243IDWRG4
5 LINE TRANSCEIVER, PDSO28, GREEN, PLASTIC, SOIC-28Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSF3243IPW
3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSF3243IPWR
3-V TO 5.5-V MULTICHANNEL RS-232 COMPATIBLE LINE DRIVER/RECEIVERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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TI
TRSHIA
TAPED LED LAMPWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
-
YSTONE
TRSHIB
TAPED LED LAMPWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 211
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YSTONE
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