TS2PCIE412 [TI]
4-CHANNEL 8:16 MULTIPLEXER/DEMULTIPLEXER PCI EXPRESS SWITCH; 4通道8时16复用器/解复用器PCI Express交换
| 型号： | TS2PCIE412 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 4-CHANNEL 8:16 MULTIPLEXER/DEMULTIPLEXER PCI EXPRESS SWITCH |
| 文件： | 总17页 (文件大小：570K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS2PCIE412
www.ti.com
SCDS269C –MARCH 2009–REVISED APRIL 2010
4-CHANNEL 8:16 MULTIPLEXER/DEMULTIPLEXER PCI EXPRESS SWITCH
Check for Samples: TS2PCIE412
1
FEATURES
RUA PACKAGE
(TOP VIEW)
2
•
•
•
Compatible With PCI Express (PCIe) Standard
Wide Bandwidth of over 3 Gbps
Low Crosstalk (XTALK = –32 dB Typ at
1.25 GHz)
B
B
B
B
B
B
B
B
GND
1
2
3
4
5
6
7
8
9
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
0
1
2
3
0
1
2
3
1
•
•
•
•
OIRR = –36.3 dB Typical at 1.25 GHz
Low Bit-to-Bit Skew (tsk(O) = 0.06 ns Typical)
VDD Operating Range: 1.5 V to 2 V
A
0
1
A
1
1
GND
1
Ioff Supports Partial Power-Down Mode
Operation
V
2
DD
A
2
2
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
A
3
2
V
ESD Performance Tested Per JESD 22
DD
2
Exposed
Center Pad
(GND)
V
4
SEL
–
2000-V Human-Body Model
(A114-B, Class II)
DD
B
GND 10
1
1
1
1
2
2
2
2
A
11
4
B
–
1000-V Charged-Device Model (C101)
5
6
7
4
5
6
7
A
B
B
B
B
B
B
12
13
14
15
16
17
5
APPLICATIONS
•
•
V
DD
PCIe Bus Multiplexing and Expansion
Routing PCI Express Data and/or Display Port
Signals
Notebook PCs
Desktop PCs
GND
A
6
A
7
•
•
•
GND
Servers/Storage Area Networks
If the exposed center pad is used, it must
be connected to ground.
DESCRIPTION/ ORDERING INFORMATION
The TS2PCIE412 is a 4-channel PCIe 2:1 multiplexer/demultiplexer switch that can be used to route one PCIe
data lane between two possible destinations or two PCIe data lanes to one destination. Each channel consists of
differential pairs of receive (RX) and transmit (TX) signals and operates at a signal-processing bandwidth speed,
which supports the PCIe standard of 2.5 Gbps. The device is controlled with one select input (SEL) pin, where
SEL controls the data path of the multiplexer/demultiplexer and can be connected to any GPIO in the system.
The unselected channel is set in a high-impedance state.
ORDERING INFORMATION
TA
PACKAGE(1) (2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SH412
–40°C to 85°C
QFN – RUA Tape and reel
TS2PCIE412RUAR
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
TS2PCIE412
SCDS269C –MARCH 2009–REVISED APRIL 2010
www.ti.com
FUNCTION TABLE
SEL
FUNCTION
L
An to nB1
An to nB2
H
FUNCTIONAL DIAGRAM
2
38
37
36
35
34
33
32
31
29
28
27
26
25
24
23
22
A
0
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
0
1
2
3
0
1
2
3
4
5
6
7
4
5
6
7
1
1
1
1
2
2
2
2
1
1
1
1
2
2
2
2
3
A
1
6
A
2
7
A
3
11
A
4
12
A
5
15
A
6
16
A
7
9
Control
Logic
SEL
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
2, 3, 6,
7, 11, 12,
15, 16
An,
I/O
Data I/Os
22–29,
31–38
nBm
I/O
I
Data I/Os
SEL
9
Select input
5, 8, 13,
18, 20, 30,
40, 42
VDD
–
Power supply
Ground
1, 4, 10,
14, 17, 19,
21, 39, 41,
Exposed
GND
–
center pad
2
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SCDS269C –MARCH 2009–REVISED APRIL 2010
ABSOLUTE MAXIMUM RATINGS(1) (2)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
2.5
UNIT
V
VDD Supply voltage range
VIN
VI/O Switch I/O voltage range(2) (3) (4)
IIK Control input clamp current
II/OK I/O port clamp current
Control input voltage range(2) (3)
2.5
V
2.5
V
VIN < GND
VI/O < GND
–50
–50
100
100
–100
150
mA
mA
mA
mA
mA
°C
II/O
IDD
ON-state switch current(5)
Continuous current through VDD
IGND Continuous current through GND
Tstg Storage temperature range.
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND unless otherwise specifed.
(3) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(4) VI and VO are used to denote specific conditions for VI/O
.
(5) II and IO are used to denote specific conditions for II/O
.
PACKAGE THERMAL IMPEDANCE
over operating free-air temperature range (unless otherwise noted)
UNIT
qJA
Package thermal impedance(1)
RUA package
51.2
°C/W
(1) The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
1.5
TYP
MAX
UNIT
VDD
VIH
VIL
VIO
TA
Supply voltage
1.8
2
V
V
High-level control input voltage (SEL)
Low-level control input voltage (SEL)
Switch input/output voltage
Operating free air temperature
0.65 × VDD
0.35 × VDD
VDD
V
0
0
V
85
°C
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SCDS269C –MARCH 2009–REVISED APRIL 2010
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ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY(1)
VDD = 1.5 V to 2.0 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SEL
TEST CONDITIONS
IIN = –18 mA
VIN = VDD
MIN
TYP(2)
MAX
–1.3
±1
UNIT
V
VIK
IIH
VDD = 2.0 V,
–0.7
SEL
VDD = 2.0 V,
mA
mA
mA
mA
pF
pF
pF
Ω
IIL
SEL
VDD =2.0 V,
VIN = GND
±1
Ioff
ICC
CIN
VDD = 0,
VO = 0 to 2 V,
II/O = 0,
VI = 0
1
VDD = 2.0 V,
Switch ON or OFF
200
1
400
SEL
f = 10 MHz, VIN = 0 V
VI = 0 V, f = 10 MHz,
VI = 0 V, f = 10 MHz,
VDD = 1.8 V,
COFF
CON
rON
B port
Outputs open,
Outputs open,
Switch OFF
Switch ON
IO = –40 mA
1.5
4.5
12
1.5
4.5
18
GND ≤ VI ≤ VDD
,
rON(flat)
VDD = 1.8 V,
VDD = 1.8 V,
VI = 1.65 to 1.8 V,
IO = –40 mA
IO = –40 mA
0.5
0.2
Ω
Ω
(3)
(4)
ΔrON
GND ≤ VI ≤ VDD
,
0.8
Dynamic
RL = 100 Ω, f = 10 MHz
RL = 100 Ω, f = 1.25 GHz
RL = 100 Ω, f = 10 MHz
RL = 100 Ω, f = 1.25 GHz
RL = 50 Ω,
–81
–32
–74
–36
2.1
XTALK
See Figure 9
See Figure 10
dB
dB
OIRR
BW
See Figure 8
See Figure 8
GHz
Max data rate
RL = 50 Ω,
4.2
Gbps
(1) VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs.
(2) All typical values are at VDD = 1.8 V (unless otherwise noted), TA = 25°C.
(3) rON(flat) is the difference of rON in a given channel at specific voltages.
(4) ΔrON is the difference of ron from center ports to any other port.
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VDD = 1.5 V to 2.0 V, RL = 200 Ω, CL = 10 pF
(unless otherwise noted)
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
TYP(1)
MAX
UNIT
(2) (3)
tpd
An or nBn
SEL
nBn or An
An or nBn
An or nBn
nBn or An
0.28
7.8
ns
ns
ns
ns
ns
tPZH, tPZL
tPHZ, tPLZ
9
4
SEL
2.5
(4)
tsk(O)
An or nBn
0.06
0.06
0.1
0.1
(5) (6)
tsk(p)
(1) All typical values are at VDD = 1.8 V (unless otherwise noted) TA = 25°C.
(2) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance when driven by an ideal voltage source (zero output impedance).
(3) See Figure 6
(4) Output skew between center port to any other port
(5) Skew between opposite transitions of the same output in a given device tPHL – tPLH
(6) See Figure 7
4
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SCDS269C –MARCH 2009–REVISED APRIL 2010
TYPICAL PERFORMANCE
0
–1
–3
–5
Gain at –3 dB: 2.1 GHz
–7
–9
–11
–13
1
10
1000
100
10000
Frequency (MHz)
Figure 1. Frequency Response (Insertion Loss)
–20
–30
–40
–50
–60
–70
–80
–90
–100
O
at 1.25 GHz: –36.3 dB
IRR
O
at 10 MHz: –73.7 dB
IRR
1
10
1000
100
10000
Frequency (MHz)
Figure 2. OFF Isolation vs Frequency
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SCDS269C –MARCH 2009–REVISED APRIL 2010
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TYPICAL PERFORMANCE (continued)
-20
-30
-40
-50
-60
-70
-80
-90
-100
X
at 1.25 GHz: –31.9 dB
TALK
X
at 10 MHz: –80.4 dB
TALK
1
10
1000
100
Frequency (MHz)
Figure 3. Crosstalk vs Frequency
10000
Eye Diagrams
10-inch trace board for real implementation, VDD = 1.8 V, f = 1.25 GHz, transitional signal and non-transitional signal eye from
Tektronix TDS6154C and Tektronix RT-Eye＝ software
Figure 4. Transitional Signal Eye for TS2PCIE412 Using a 10-inch Trace
6
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TS2PCIE412
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SCDS269C –MARCH 2009–REVISED APRIL 2010
TYPICAL PERFORMANCE (continued)
10-inch trace board for real implementation, VDD = 1.8 V, f = 1.25 GHz, transitional signal and non-transitional signal eye from
Tektronix TDS6154C and Tektronix RT-Eye＝ software
Figure 5. Transitional Signal Eye (Left) and Non-Transitional Signal Eye (Right) for TS2PCIE412 Using a 10-inch Trace
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SCDS269C –MARCH 2009–REVISED APRIL 2010
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PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
V
DD
Input Generator
V
SEL
50 Ω
50 Ω
V
G1
TEST CIRCUIT
DUT
2 ×
V
DD
Input Generator
50 Ω
S1
Open
GND
R
L
V
V
O
I
C
L
50 Ω
V
G2
R
L
(see Note A)
V
S1
2 × V
V
V
∆
C
R
TEST
DD
I
L
L
t
/t
PLZ PZL
1.5 V to 2 V
1.5 V to 2 V
200 Ω
200 Ω
GND
10 pF
10 pF
0.15 V
0.15 V
DD
t
/t
PHZ PZH
V
GND
DD
V
DD
Output Control
V
/2
V
/2
DD
DD
(V
IN
)
V
SEL
0 V
t
t
PLZ
PZL
Output
V
OH
OL
Waveform 1
S1 at 2
V
/2
CC
V
O
O
V
CC
V
V
+ 0.15 V
OL
V
(see Note B)
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
V
OH
- 0.15 V
OH
V
V
CC
/2
OL
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5
ns, tf ≤2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis
F. tPZL and tPZH are the same as ten
.
.
Figure 6. Test Circuit and Voltage Waveforms
8
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SCDS269C –MARCH 2009–REVISED APRIL 2010
PARAMETER MEASUREMENT INFORMATION
(Skew)
V
DD
Input Generator
V
SEL
50 Ω
50 Ω
V
G1
TEST CIRCUIT
DUT
V
×
2
DD
Input Generator
50 Ω
S1
Open
GND
R
L
V
V
O
I
C
L
(see Note A)
50 Ω
V
G2
R
L
V
V
S1
C
L
R
L
TEST
DD
SEL
t
1.5 V to 2 V
1.5 V to 2 V
Open
200 Ω
200 Ω
V
or GND
10 pF
10 pF
sk(o)
DD
t
Open
V
or GND
sk(p)
DD
V
DD
Data In at
Ax or Ay
V
0
/2
V
I
DD
t
t
PHLx
PLHx
V
OH
Data Out at
XB or XB
V
O
O
(V + V )/2
OH OL
V
V
1
2
DD
DD
V
OL
/2
Input
t
t
sk(o)
sk(o)
V
OH
V
Data Out at
YB orYB
t
t
PHL
PLH
(V + V )/2
OH OL
1
2
V
OH
V
OL
Output
(V + V )/2
OH OL
t
t
PLHy
PHLy
V
OL
t
= t
- t
PHL PLH
sk(p)
t
= t
- t
or t
- t
PHLy PHLx
sk(o)
PLHy
PLHx
VOLTAGE WAVEFORMS
OUTPUT SKEW (t
VOLTAGE WAVEFORMS
PULSE SKEW [t
)
]
sk(p)
sk(o)
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5
ns, tf ≤2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
Figure 7. Test Circuit and Voltage Waveforms
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PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
V
BIAS
P1
P2
V
CC
A
0
0B
1
DUT
SEL
V
SEL
Figure 8. Test Circuit for Frequency Response (BW)
Frequency response is measured at the output of the ON channel. For example, when VSEL = 0 V and A0 is the
input, the output is measured at 0B1. All unused analog I/O ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
10
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SCDS269C –MARCH 2009–REVISED APRIL 2010
PARAMETER MEASUREMENT INFORMATION (continued)
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
V
BIAS
P1
P2
V
CC
A
A
0B
0
1
R
L
= 50 Ω
1B
0B
1
1
2
1B
2B
2
1
DUT
A
A
2
R
L
= 50 Ω
3B
3
1
2B
3B
2
2
SEL
V
SEL
Figure 9. Test Circuit for Crosstalk (XTALK
)
Crosstalk is measured at the input of the nonadjacent ON channel. For example, when VSEL = 0 V and A1 is the
input, the output is measured at A3. All unused analog input (A) ports are connected to GND, and output (B)
ports are connected to GND through 50-Ω pulldown resistors.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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PARAMETER MEASUREMENT INFORMATION (continued)
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
V
BIAS
P1
P2
V
CC
A
A
0B
1B
0
1
R
L
= 50Ω
1
1
DUT
0B
1B
2
2
SEL
V
SEL
Figure 10. Test Circuit for Off Isolation (OIRR
)
OFF isolation is measured at the output of the OFF channel. For example, when VSEL = 0 V and A1 is the input,
the output is measured at 1B2. All unused analog input (A) ports are left open, and output (B) ports are
connected to GND through 50-Ω pulldown resistors.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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PACKAGE OPTION ADDENDUM
www.ti.com
17-Jul-2010
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TS2PCIE412RUAR
ACTIVE
WQFN
RUA
42
3000
TBD
Call TI
Call TI
Request Free Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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