TS3A4751PWR [TI]
0.9-ohm LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH; 0.9欧姆的低电压单电源四路SPST模拟开关
| 型号： | TS3A4751PWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 0.9-ohm LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH |
| 文件： | 总14页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
Power Routing
•
Low ON-State Resistance (ron)
Battery Powered Systems
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Communications Circuits
PCMCIA Cards
Cellular Phones
Modems
Hard Drives
– 0.9 Ω Max (3-V Supply)
– 1.5 Ω Max (1.8-V Supply)
ron Flatness: 0.4 Ω Max (3-V)
ron Matching
•
•
– 0.05 Ω Max (3-V Supply)
– 0.25 Ω Max (1.8-V Supply)
1.6-V to 3.6-V Single-Supply Operation
1.8-V CMOS Logic Compatible (3-V Supply)
•
•
•
TSSOP PACKAGE
(TOP VIEW)
High Current-Handling Capacity (100 mA
Continuous)
•
•
Fast Switching: tON = 14 ns, tOFF = 9 ns
ESD Protection Exceeds JESD-22
– 4000-V Human Body Model (A114-A)
– 300-V Machine Model (A115-A)
14
1
2
3
4
5
6
7
V+
NO1
COM1
NO2
13
12
11
10
9
IN1
IN4
COM2
IN2
NO4
COM4
COM3
NO3
– 1000-V Charged Device Model (C101)
IN3
8
GND
DESCRIPTION/ORDERING INFORMATION
The TS3A4751 is a low ON-state resistance (ron), low-voltage, quad, single-pole/single-throw (SPST) analog
switch that operates from a single 1.6-V to 3.6-V supply. This device has fast switching speeds, handles
rail-to-rail analog signals, and consumes very low quiescent power.
The digital input is 1.8-V CMOS compatible when using a single 3-V supply.
The TS3A4751 has four normally open (NO) switches. The TS3A4751 is available in a 14-pin thin shrink
small-outline package (TSSOP).
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
YC751
–40°C to 85°C
TSSOP – PWR Reel of 2000
TS3A4751PWR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
NO TO COM,
COM TO NO
IN
L
OFF
ON
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V+
Supply voltage range referenced to GND(2)
–0.3
4
V
VNO
VCOM Analog and digital voltage range
VIN
–0.3
V+ + 0.3
V
INO
On-state switch current
ICOM
VNO, VCOM = 0 to V+
–100
100
mA
mA
I+
Continuous current through V+ or GND
IGND
±100
Peak current pulsed at 1 ms, 10% duty cycle
COM, VI/O
±200
88
mA
°C/W
°C
(3)
θJA
TA
Package thermal impedance
Operating temperature range
Junction temperature
–40
–65
85
TJ
150
150
°C
Tstg
Storage temperature range
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Signals on COM or NO exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current rating.
(3) The package thermal impedance is measured in accordance with JESD 51-7.
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
Electrical Characteristics for 3-V Supply(1)(2)
V+ = 2.7 V to 3.6 V, TA = –40°C to 85°C, VIH = 1.4 V, VIL = 0.5 V (unless otherwise noted).
PARAMETER
Analog Switch
SYMBOL
TEST CONDITIONS
TA
MIN TYP(3)
MAX
UNIT
Analog signal range
VCOM, VNO
ron
0
V+
0.9
1.1
0.05
0.15
0.4
0.5
2
V
25°C
Full
0.7
V+ = 2.7 V, ICOM = –100 mA,
VNO = 1.5 V
ON-state resistance
Ω
25°C
Full
0.03
0.23
ON-state resistance match
between channels(4)
V+ = 2.7 V, ICOM = –100 mA,
VNO = 1.5 V
∆ron
Ω
Ω
25°C
Full
ON-state resistance
flatness(5)
V+ = 2.7 V, ICOM = –100 mA,
VNO = 1 V, 1.5 V, 2 V
ron(flat)
25°C
Full
–2
–18
–2
1
1
NO
V+ = 3.6 V, VCOM = 0.3 V, 3 V,
VNO = 3 V, 0.3 V
INO(OFF)
ICOM(OFF)
ICOM(ON)
nA
nA
nA
OFF leakage current(6)
18
25°C
Full
2
COM
V+ = 3.6 V, VCOM = 0.3 V, 3 V,
VNO = 3 V, 0.3 V
OFF leakage current(6)
–18
–2.5
–5
18
25°C
Full
0.01
2.5
5
COM
V+ = 3.6 V, VCOM = 0.3 V, 3 V,
VNO = 0.3 V, 3 V, or floating
ON leakage current(6)
Dynamic
25°C
Full
5
4
14
15
9
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
Turn-on time
tON
ns
25°C
Full
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
Turn-off time
tOFF
QC
ns
10
VGEN = 0, RGEN = 0, CL = 1 nF,
See Figure 15
Charge injection
25°C
3
pC
NO OFF capacitance
COM OFF capacitance
COM ON capacitance
Bandwidth
CNO(OFF)
CCOM(OFF)
CCOM(ON)
BW
f = 1 MHz, See Figure 16
f = 1 MHz, See Figure 16
f = 1 MHz, See Figure 16
RL = 50 Ω, Switch ON
25°C
25°C
25°C
25°C
23
20
pF
pF
43
pF
125
–40
–62
–73
–95
0.04
0.003
MHz
f = 10 MHz
RL = 50 Ω, CL = 5 pF,
See Figure 17
OFF isolation(7)
OISO
XTALK
THD
25°C
25°C
25°C
dB
dB
%
f = 1 MHz
f = 10 MHz
f = 1 MHz
RL = 32 Ω
RL = 600 Ω
RL = 50 Ω, CL = 5 pF,
See Figure 17
Crosstalk
f = 20 Hz to 20 kHz,
VCOM = 2 VP-P
Total harmonic distortion
Digital Control Inputs (IN1–IN4)
Input logic high
VIH
VIL
Full
Full
1.4
V
V
Input logic low
0.5
1
25°C
Full
0.5
Input leakage current
IIN
VI = 0 or V+
nA
–20
1.6
20
Supply
Power-supply range
V+
I+
3.6
0.075
0.75
V
25°C
Positive-supply current
V+ = 3.6 V, VIN = 0 or V+
µA
Full
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(2) Parts are tested at 85°C and specified by design and correlation over the full temperature range.
(3) Typical values are at V+ = 3 V, TA = 25°C.
(4) ∆ron = ron(max) – ron(min)
(5) Flatness is defined as the difference between the maximum and minimum value of ron as measured over the specified analog signal
ranges.
(6) Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at TA = 25°C.
(7) OFF isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to OFF switch
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
Electrical Characteristics for 1.8-V Supply(1)(2)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C, VIH = 1 V, VIL = 0.4 V (unless otherwise noted)
PARAMETER
Analog Switch
SYMBOL
TEST CONDITIONS
TA
MIN TYP(3)
MAX UNIT
Analog signal range
VCOM, VNO
ron
0
V+
1.5
2
V
25°C
Full
1
V+ = 1.8 V, ICOM = –10 mA,
VNO = 0.9 V
ON-state resistance
Ω
25°C
Full
0.09
0.7
0.15
0.25
0.9
1.5
1
ON-state resistance match
between channels(4)
V+ = 1.8 V, ICOM = –10 mA,
VNO = 0.9 V
∆ron
Ω
Ω
25°C
Full
ON-state resistance
flatness(5)
V+ = 1.8 V, ICOM = –10 mA,
0 ≤ VNO ≤ V+
ron(flat)
25°C
Full
–1
–10
–1
0.5
0.5
NO
V+ = 1.95 V, VCOM = 0.15 V, 1.65 V,
VNO = 1.8 V, 0.15 V
INO(OFF)
ICOM(OFF)
ICOM(ON)
nA
nA
nA
OFF leakage current(6)
10
1
25°C
Full
COM
V+ = 1.95 V, VCOM = 0.15 V, 1.65 V,
VNO = 1.65 V, 0.15 V
OFF leakage current(6)
–10
–1
10
1
25°C
Full
0.01
COM
V+ = 1.95 V, VCOM = 0.15 V, 1.65 V,
VNO = 0.15 V, 1.65 V, or floating
ON leakage current(6)
–3
3
Dynamic
25°C
Full
6
5
18
20
10
12
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
Turn-on time
tON
ns
25°C
Full
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
Turn-off time
tOFF
QC
ns
VGEN = 0, RGEN = 0, CL = 1 nF,
See Figure 15
Charge injection
25°C
3.2
pC
NO OFF capacitance
COM OFF capacitance
COM ON capacitance
Bandwidth
CNO(OFF)
CCOM(OFF)
CCOM(ON)
BW
f = 1 MHz, See Figure 16
f = 1 MHz, See Figure 16
f = 1 MHz, See Figure 16
RL = 50 Ω, Switch ON
25°C
25°C
25°C
25°C
23
20
pF
pF
43
pF
123
–61
–36
–95
–73
0.14
0.013
MHz
dB
f = 10 MHz
RL = 50 Ω, CL = 5 pF,
See Figure 17
OFF isolation(7)
OISO
XTALK
THD
25°C
25°C
25°C
f = 100 MHz
f = 10 MHz
f = 100 MHz
RL = 32 Ω
dB
%
RL = 50 Ω, CL = 5 pF,
See Figure 17
Crosstalk
f = 20 Hz to 20 kHz, VCOM
= 2 VP-P
Total harmonic distortion
RL = 600 Ω
Digital Control Inputs (IN1–IN4)
Input logic high
VIH
VIL
Full
Full
1
V
V
Input logic low
0.4
5
25°C
Full
0.1
Input leakage current
IIN
VI = 0 or V+
nA
–10
1.6
10
Supply
Power-supply range
V+
I+
3.6
0.05
0.5
V
25°C
Positive-supply current
VI = 0 or V+
µA
Full
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(2) Parts are tested at 85°C and specified by design and correlation over the full temperature range.
(3) Typical values are at TA = 25°C.
(4) ∆ron = ron(max) – ron(min)
(5) Flatness is defined as the difference between the maximum and minimum value of ron as measured over the specified analog signal
ranges.
(6) Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at TA = 25°C.
(7) OFF isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to OFF switch
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
TYPICAL PERFORMANCE
1.6
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
855C
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
255C
V
= 1.8 V
+
–405C
V
+
= 2.7 V
0.0
0.0
0.0
0.5
1.0
1.5
2.0
0.5
1.0
1.5
2.0
2.5
3.0
V
COM
(V)
V
COM
(V)
Figure 1. ron vs VCOM
Figure 2. ron vs VCOM (V+ = 1.8 V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
1000.00
100.00
10.00
NC/NO (OFF)
855C
255C
COM (ON)
–405C
0.0
0.0
1.00
−40°C
25°C
(°C)
85°C
0.5
1.0
1.5
(V)
2.0
2.5
3.0
V
COM
T
A
Figure 3. ron vs VCOM (V+ = 2.7 V)
Figure 4. ION and IOFF vs Temperature
(V+ = 3.6 V)
8
7
6
5
4
3
2
1
35
30
25
20
15
10
5
V = 3 V
+
t
ON
V = 1.8 V
+
t
OFF
0
1.6
0
0.0
2.0
2.4
2.8
3.2
3.6
4.0
0.5
1.0
1.5
V
2.0
(V)
2.5
3.0
3.5
V (V)
+
COM
Figure 5. QC vs VCOM
Figure 6. tON and tOFF vs Supply Voltage
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
TYPICAL PERFORMANCE (continued)
7
6
5
4
3
2
1
0
1000.000
100.000
10.000
1.000
855C
t
= 1.8 V
ON
255C
t
t
t
= 1.8 V
= 3 V
= 3 V
OFF
–405C
ON
0.100
OFF
0.010
0.001
−40°C
25°C
(°C)
85°C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T
A
V
+
(V)
Figure 7. tON and tOFF vs Temperature
Figure 8. ICC vs V+
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−2
−4
−6
−8
−10
−12
−14
0.1
1
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure 9. Gain vs Frequency
(V+ = 3 V)
Figure 10. OFF Isolation vs Frequency
(V+ = 3 V)
0.042
0.041
0.040
0.039
0.038
0.037
0.0040
0.0036
0.0032
0.0028
0.0024
0.0020
0.0016
0.0012
0.0008
0.0004
0
0
0
10
100
1K
10K
100K
10
100
1K
10K
100K
Frequency (kHz)
Frequency (kHz)
Figure 11. Total Harmonic Distortion vs Frequency
Figure 12. Total Harmonic Distortion vs Frequency
(RL = 32 Ω)
(RL = 600 Ω)
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
TYPICAL PERFORMANCE (continued)
0
−20
−40
−60
−80
−100
0
0.1
1
10
100
1000
Frequency (MHz)
Figure 13. Crosstalk vs Frequency (V+ = 3 V)
PIN DESCRIPTION
PIN NO.
NAME
DESCRIPTION
Normally open
1, 3, 8, 11
NO1, NO2, NO3, NO4
COM1, COM2, COM3,
COM4
2, 4, 9, 10
Common
Ground
7
13, 5, 6, 12
14
GND
IN1, IN2, IN3, IN4
V+
Logic control inputs
Positive supply voltage
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
APPLICATION INFORMATION
Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum
ratings because stresses beyond the listed ratings can cause permanent damage to the devices. Always
sequence V+ on first, followed by NO or COM.
Although it is not required, power-supply bypassing improves noise margin and prevents switching noise
propagation from the V+ supply to other components. A 0.1-µF capacitor, connected from V+ to GND, is
adequate for most applications.
Logic Inputs
The TS3A4751 logic inputs can be driven up to 3.6 V, regardless of the supply voltage. For example, with a
1.8-V supply, IN may be driven low to GND and high to 3.6 V. Driving IN rail to rail minimizes power
consumption.
Analog Signal Levels
Analog signals that range over the entire supply voltage (V+ to GND) can be passed with very little change in ron
(see Typical Operating Characteristics). The switches are bidirectional, so NO and COM can be used as either
inputs or outputs.
Layout
High-speed switches require proper layout and design procedures for optimum performance. Reduce stray
inductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are as close to the
device as possible. Use large ground planes where possible.
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TS3A4751
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
TEST CIRCUITS/TIMING DIAGRAMS
V+
V+
tR < 5 ns
tF < 5 ns
V
IH + 0.5 V
NO
VNO
50%
50%
IN
0
IN
VCOM
COM
VNO
90%
90%
VCOM
0
35 pF
50 W
GND
tON
tOFF
Figure 14. Switching Times
V+
V+
RGEN
NO
VGEN
VI
IN
VO
COM
GND
CL
1000 pF
V+
0
VI
VO
DVO
Figure 15. Charge Injection (QC)
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0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
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SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
TEST CIRCUITS/TIMING DIAGRAMS (continued)
V+
V+
NO
1-MHz
Capacitance
Analyzer
As
Required
IN
COM
GND
Figure 16. NO and COM Capacitance
0.1 mF
V+
Network
Analyzer
V+
VI
50 W
50 W
NO
(1)
VO
Ref
Meas
V+
IN
COM
GND
50 W 50 W
OFF isolation = 20 log VO/VI
Measurements are standardized against
short at socket terminals. OFF isolation is
measured between COM and OFF terminals
on each switch. Bandwidth is measured between
COM and ON terminals on each switch. Signal
direction through switch is reversed; worst
values are recorded.
(1)Add 50-W termination for
OFF isolation
Figure 17. OFF Isolation, Bandwidth, and Crosstalk
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0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
www.ti.com
SCDS227C–JULY 2006–REVISED SEPTEMBER 2006
TEST CIRCUITS/TIMING DIAGRAMS (continued)
Channel ON: COM to NO
V
V = V /2
f
C
R
= 50 pF
= 600 W
I
+
SOURCE
L
L
= V P-P
+
= 20 Hz to 20 kHz
SOURCE
V+/2
Audio Analyzer
NO
Signal
Source
600 W
COM
IN
(A)
C
L
600 W
-V+/2
A. CL includes probe and jig capacitance.
Figure 18. Total Harmonic Distortion (THD)
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PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2006
PACKAGING INFORMATION
Orderable Device
TS3A4751PWR
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TS3A4751PWRG4
TSSOP
PW
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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Addendum-Page 1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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