TS5A22364QDGSRQ1 [TI]
具有负信号处理功能的汽车类 0.65Ω、5V、2:1 (SPDT) 2 通道模拟开关 | DGS | 10 | -40 to 125;型号: | TS5A22364QDGSRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有负信号处理功能的汽车类 0.65Ω、5V、2:1 (SPDT) 2 通道模拟开关 | DGS | 10 | -40 to 125 开关 光电二极管 |
文件: | 总29页 (文件大小:1522K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TS5A22364-Q1
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
TS5A22364-Q1 具有负信号功能的 0.65Ω 双路 SPDT 模拟开关
1 特性
2 应用
1
•
•
•
适用于汽车电子 应用
•
•
•
•
车用信息娱乐
音频路由
指定的先断后合 (BBM) 开关
负信号摆幅功能:最大摆幅范围为 –2.75V 到
2.75V (VCC = 2.75V)
工业自动化
医疗成像
•
内部分流开关,可防止在切换电源时出现喀哒声和
噼啪声
3 说明
•
•
•
•
•
•
低导通状态电阻(0.65Ω 典型值)
低电荷注入
TS5A22364-Q1 是一款双通道单刀双掷 (SPDT) 模拟
开关,设计用于 2.3V 至 5.5V 电源。该器件 支持 负信
号摆幅,允许低于接地电平的信号通过开关,同时不发
生失真。此外,TS5A22364-Q1 还包含一个内部分流
开关,能够在常闭或常开引脚未连接至 COM 时使其电
容放电。此开关可降低在切换电源时出现的喀哒声和噼
啪声。先断后合特性可防止信号在跨路径传输时出现失
真。该器件同时拥有低导通电阻、出色的通道间导通状
态电阻匹配以及最小总谐波失真 (THD) 性能,是音频
应用的 理想选择。
出色的通道间导通状态电阻匹配
2.25V 至 5.5V 电源 (VCC
)
锁断性能达 100mA,符合 AEC Q100-004
静电放电 (ESD) 性能
–
通过 2500V 人体模型测试,符合 AEC Q100-
002
–
通过 1500V 带电器件模型测试,符合 AEC
Q100-011
器件信息(1)
器件型号
封装
封装尺寸(标称值)
TS5A22364-Q1
VSSOP (10)
3.00mm x 3.00mm
(1) 如需了解所有可用封装,请见数据表末尾的可订购产品附录。
LP38690 的
TS5A22364-Q1
OUT+
OUT-
NC1
NO1
Audio
Source 1
COM1
IN1
Input Select
8-ꢀ
Speaker
Shunt
Switch
IN2
NC2
NO2
COM2
OUT+
OUT-
Audio
Source 2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SCDS361
TS5A22364-Q1
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
www.ti.com.cn
目录
8.2 Functional Block Diagram ....................................... 16
8.3 Feature Description................................................. 16
8.4 Device Functional Modes........................................ 16
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
9.2 Typical Application ................................................. 17
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions ...................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics—2.5-V Supply ................. 5
6.6 Electrical Characteristics—3.3-V Supply ................. 6
6.7 Electrical Characteristics—5-V Supply .................... 7
6.8 Typical Characteristics.............................................. 9
Parameter Measurement Information ................ 12
Detailed Description ............................................ 16
8.1 Overview ................................................................. 16
9
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example ................................................... 20
12 器件和文档支持 ..................................................... 21
12.1 接收文档更新通知 ................................................. 21
12.2 社区资源................................................................ 21
12.3 商标....................................................................... 21
12.4 静电放电警告......................................................... 21
13 机械、封装和可订购信息....................................... 21
7
8
4 修订历史记录
Changes from Original (October 2014) to Revision A
Page
•
器件状态从产品预览改为量产数据.......................................................................................................................................... 1
2
Copyright © 2014–2016, Texas Instruments Incorporated
TS5A22364-Q1
www.ti.com.cn
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
5 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
VCC
NO1
1
2
3
4
5
10
9
NO2
COM2
NC2
IN2
COM1
NC1
8
7
IN1
6
GND
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
VCC
NO1
COM1
NC1
1
2
3
4
5
6
7
8
9
10
I
Supply power
I/O
I/O
I/O
I
Normally open (NO) signal path, switch 1
Common signal path, switch 1
Normally closed (NC) signal path, switch 1
Digital control pin to connect COM1 to NO1, switch 1
Ground
IN1
GND
IN2
—
I
Digital control pin to connect COM2 to NO2, switch 2
Normally closed (NC) signal path, switch 2
Common signal path, switch 2
NC2
I/O
I/O
I/O
COM2
NO2
Normally open (NO) signal path, switch 2
Copyright © 2014–2016, Texas Instruments Incorporated
3
TS5A22364-Q1
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
(2)
MIN
MAX
UNIT
VCC
Supply voltage(3)
–0.5
6
V
VNC
Analog voltage on NC1-NC2 pin(3) (4) (5)
Analog voltage on NO1-NO2 pin(3) (4) (5)
Analog voltage on COM1-COM2 pin(3) (4) (5)
VNO
VCOM
VCC – 6
–50
VCC + 0.5
V
VNC, VNO, VCOM < 0
or
VNC, VNO, VCOM > VCC
II/OK
Analog port diode input clamp current
50
mA
mA
INC
INO
ICOM
On-state switch continuous current
On-state switch peak current(6)
–150
–300
150
300
VNC, VNO, VCOM = 0 to VCC
IRSH
VIN
IIK
Off-state switch shunt resistor current
Digital input voltage
Digital input clamp current(3) (4)
–20
–0.5
–50
20
6.5
50
mA
V
VIN < 0
mA
ICC
IGND
Continuous current through VCC or GND
Storage temperature
–100
–65
100
150
mA
°C
Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) This value is limited to 5.5 V maximum.
(6) Pulse at 1-ms duration <10% duty cycle.
6.2 ESD Ratings
MIN
MAX
UNIT
Human body model (HBM), per AEC Q100-002(1)
–2500
2500
VESD
Electrostatic discharge
V
Charged device model (CDM), per
all pins
–1500
1500
AEC Q100-011
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
VNC
VNO
VCOM
VIN
Supply voltage
Signal path voltage
Digital control
2.3
VCC – 5.5
GND
5.5
VCC
VCC
V
V
V
4
Copyright © 2014–2016, Texas Instruments Incorporated
TS5A22364-Q1
www.ti.com.cn
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
6.4 Thermal Information
TS5A22364-Q1
THERMAL METRIC(1) (2)
DGS (VSSOP)
10 PINS
163.3
56.4
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
83.1
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
6.8
ψJB
81.8
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
6.5 Electrical Characteristics—2.5-V Supply
VCC = 2.3 V to 2.7 V, TA = –40°C to +125°C (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX UNIT
ANALOG SWITCH
VCOM
VNO
VNC
VCC
5.5
–
Analog signal
VCC
V
Ω
Ω
Ω
VNC or VNO = VCC, 1.5 V,
VCC – 5.5 V
ICOM = –100 mA
25°C
–40°C to +125°C
25°C
0.65
0.023
0.18
0.94
1.3
On-state
resistance
COM to NO or NC,
See Figure 14
Ron
2.7 V
2.7 V
2.7 V
On-state
resistance match
between channels
0.11
0.15
0.46
0.56
VNC or VNO = 1.5 V,
ICOM = –100 mA
COM to NO or NC,
See Figure 14
ΔRon
–40°C to +125°C
25°C
On-state
resistance
flatness
VNC or VNO = VCC, 1.5 V,
VCC – 5.5 V
ICOM = –100 mA
COM to NO or NC,
See Figure 14
Ron(flat)
–40°C to +125°C
Shunt switch
resistance
RSH
INO or INC = 10 mA
–40°C to +125°C
2.7 V
2.7 V
25
55
Ω
25°C
–200
200
On-state leakage
current
VNC and VNO = floating,
VCOM = VCC , VCC – 5.5 V
ICOM(ON)
See Figure 16
nA
–40°C to +125°C
–2500
2500
DIGITAL CONTROL INPUTS (IN)(2)
Input logic high
Input logic low
VIH
VIL
–40°C to +125°C
–40°C to +125°C
25°C
1.4
VCC
0.4
V
V
–250
–250
250
250
Input leakage
current
IIH, IIL
VIN = VCC or 0
2.7 V
2.5 V
nA
–40°C to +125°C
DYNAMIC
25°C
44
22
80
120
70
VCOM = VCC
,
CL = 35 pF,
See Figure 18
Turnon time
tON
ns
ns
2.3 V to
2.7 V
RL = 300 Ω
–40°C to +125°C
25°C
2.5 V
VCOM = VCC
,
CL = 35 pF,
See Figure 18
Turnoff time
tOFF
2.3 V to
2.7 V
RL = 300 Ω
–40°C to +125°C
70
Break-before-make
time
tBBM
QC
See Figure 19
25°C
25°C
2.5 V
2.5 V
1
7
ns
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 23
Charge injection
215
pC
On-State
NC, NO, COM
capacitance
VCOM = VCC or GND,
Switch ON, f = 10 MHz
CCOM(ON)
See Figure 17
25°C
2.5 V
370
pF
Digital input
capacitance
CI
VIN = VCC or GND
See Figure 17
See Figure 20
25°C
25°C
2.5 V
2.5 V
2.6
17
pF
Bandwidth
BW
RL = 50 Ω, –3 dB
MHz
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(2) All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. See the Implications of Slow or
Floating CMOS Inputs application report, SCBA004.
Copyright © 2014–2016, Texas Instruments Incorporated
5
TS5A22364-Q1
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
www.ti.com.cn
Electrical Characteristics—2.5-V Supply (continued)
VCC = 2.3 V to 2.7 V, TA = –40°C to +125°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX UNIT
f = 100 kHz,
See Figure 21
Off-state isolation
OISO
RL = 50 Ω
RL = 50 Ω
25°C
2.5 V
–66
dB
f = 100 kHz,
See Figure 22
Crosstalk
XTALK
25°C
25°C
2.5 V
2.5 V
–75
dB
%
f = 20 Hz to
20 kHz,
See Figure 24
Total harmonic
distortion
RL = 600 Ω,
CL = 35 pF
THD
0.01
SUPPLY
25°C
0.2
1.1
μA
VCOM and VIN = VCC or GND, VNC and VNO = floating
2.7 V
2.7 V
Positive
supply current
–40°C to +125°C
1.3
ICC
VCOM = VCC – 5.5 V, VIN = VCC or GND, VNC and VNO
= floating
–40°C to +125°C
3.3
μA
6.6 Electrical Characteristics—3.3-V Supply
VCC = 3 V to 3.6 V, TA = –40°C to +125°C (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP MAX UNIT
ANALOG SWITCH
VCOM
VNO
VNC
VCC
5.5
–
Analog signal
VCC
V
VNC or VNO ≤ VCC
1.5 V,
VCC – 5.5 V,
ICOM = –100 mA
,
25°C
–40°C to +125°C
25°C
0.61
0.024
0.12
0.87
0.97
0.13
0.13
0.46
0.5
On-state
resistance
COM to NO or NC,
See Figure 14
Ron
3 V
3 V
3 V
Ω
On-state
resistance match
between
channels
VNC or VNO = 1.5 V,
ICOM = –100 mA
COM to NO or NC,
See Figure 14
ΔRon
Ω
Ω
–40°C to +125°C
25°C
VNC or VNO ≤ VCC
,
On-state
resistance
flatness
1.5 V,
VCC – 5.5 V,
ICOM = –100 mA
COM to NO or NC,
See Figure 14
Ron(flat)
–40°C to +125°C
Shunt switch
resistance
INO or
INC = 10 mA
RSH
–40°C to +125°C
3 V
25
40
Ω
25°C
–200
200
On-state leakage
current
VNC and VNO = floating,
VCOM = VCC,VCC – 5.5 V
COM to NO or NC,
See Figure 16
ICOM(ON)
3.6 V
nA
–40°C to +125°C
–2500
2500
DIGITAL CONTROL INPUTS (IN)(2)
Input logic high
Input logic low
VIH
VIL
–40°C to +125°C
–40°C to +125°C
25°C
1.4
VCC
0.6
V
V
–250
–250
250
250
Input leakage
current
IIH, IIL
VIN = VCC or 0
3.6 V
3.3 V
nA
–40°C to +125°C
DYNAMIC
25°C
34
19
80
80
70
70
VCOM = VCC
,
CL = 35 pF,
See Figure 18
Turnon time
tON
ns
ns
3 V to 3.6
V
RL = 300 Ω
–40°C to +125°C
25°C
3.3 V
VCOM = VCC
,
CL = 35 pF,
See Figure 18
Turnoff time
tOFF
3 V to 3.6
V
RL = 300 Ω
–40°C to +125°C
Break-before-
make time
tBBM
QC
See Figure 19
25°C
25°C
3.3 V
3.3 V
1
7
ns
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 23
Charge injection
On-State
NC, NO, COM
capacitance
300
pC
VCOM = VCC or GND,
f = 10 MHz
CCOM(ON)
See Figure 17
25°C
3.3 V
370
pF
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(2) All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. See the Implications of Slow or
Floating CMOS Inputs application report, SCBA004.
6
Copyright © 2014–2016, Texas Instruments Incorporated
TS5A22364-Q1
www.ti.com.cn
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
Electrical Characteristics—3.3-V Supply (continued)
VCC = 3 V to 3.6 V, TA = –40°C to +125°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP MAX UNIT
Digital input
CI
VIN = VCC or GND
RL = 50 Ω, –3 dB
RL = 50 Ω
See Figure 17
25°C
3.3 V
2.6
17.5
–68
pF
MHz
dB
capacitance
Bandwidth
Switch ON,
See Figure 20
BW
25°C
25°C
25°C
25°C
3.3 V
3.3 V
3.3 V
3.3 V
f = 100 kHz,
See Figure 21
Off-state isolation
Crosstalk
OISO
XTALK
THD
f = 100 kHz,
See Figure 22
RL = 50 Ω
–76
dB
Total harmonic
distortion
RL = 600 Ω,
CL = 35 pF
f = 20 Hz to 20 kHz,
See Figure 24
0.008
%
SUPPLY
VCOM and VIN = VCC or
25°C
0.1
1.2
1.3
GND, VNC and VNO
floating
=
3.6 V
3.6 V
μA
μA
–40°C to +125°C
Positive
supply current
ICC
VCOM = VCC – 5.5 V, VIN
VCC or GND, VNC and VNO
= floating
=
–40°C to +125°C
3.4
6.7 Electrical Characteristics—5-V Supply(1)
VCC = 4.5 V to 5.5 V, TA = –40°C to +125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX UNIT
ANALOG SWITCH
VCOM
VNO, VNC
,
VCC –
5.5
Analog signal
VCC
V
VNC or VNO = VCC, 1.6 V,
VCC = –5.5 V,
ICOM = –100 mA
25°C
–40°C to +125°C
25°C
0.52
0.04
0.74
0.83
0.23
On-state
resistance
COM to NO or NC,
See Figure 14
Ron
4.5 V
4.5 V
4.5 V
Ω
On-state
resistance match
between
VNC or VNO = 1.6 V,
ICOM = –100 mA
COM to NO or NC,
See Figure 14
ΔRon
Ω
Ω
–40°C to +125°C
0.30
channels
On-state
resistance
flatness
VNC or VNO = VCC, 1.6 V,
VCC = –5.5 V,
ICOM = –100 mA
25°C
0.076
16
0.46
0.5
COM to NO or NC,
See Figure 14
Ron(flat)
–40°C to +125°C
Shunt switch
resistance
RSH
INO or INC = 10 mA
–40°C to +125°C
4.5 V
5.5 V
36
Ω
25°C
–200
200
On-state leakage
current
VNC and VNO = Floating,
VCOM = VCC, VCC – 5.5 V
ICOM(ON)
See Figure 16
nA
–40°C to +125°C
–2500
2500
DIGITAL CONTROL INPUTS (IN)(2)
Input logic high
Input logic low
VIH
VIL
–40°C to +125°C
–40°C to +125°C
25°C
2.4
VCC
0.8
V
V
–250
–250
250
250
Input leakage
current
IIH, IIL
VIN = VCC or 0
5.5 V
5 V
nA
–40°C to +125°C
DYNAMIC
25°C
27
13
80
80
70
70
VCOM = VCC
,
CL = 35 pF,
See Figure 18
Turnon time
tON
ns
ns
4.5 V to
5.5 V
RL = 300 Ω
–40°C to +125°C
25°C
5 V
VCOM = VCC
,
CL = 35 pF,
See Figure 18
Turnoff time
tOFF
4.5 V to
5.5 V
RL = 300 Ω
–40°C to +125°C
Break-before-
make time
VNC = VNO = VCC/2
RL = 300 Ω
C = 35 pF,
See Figure 19
tBBM
25°C
25°C
5 V
5 V
1
3.5
ns
VGEN = 0,
RGEN = 0
CL = 1L nF,
See Figure 23
Charge injection QC
500
pC
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(2) All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. See the Implications of Slow or
Floating CMOS Inputs application report, SCBA004.
Copyright © 2014–2016, Texas Instruments Incorporated
7
TS5A22364-Q1
ZHCSF59A –OCTOBER 2014–REVISED JULY 2016
www.ti.com.cn
Electrical Characteristics—5-V Supply(1) (continued)
VCC = 4.5 V to 5.5 V, TA = –40°C to +125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX UNIT
ON-State
CCOM(ON)
VCOM = VCC or GND
See Figure 17
25°C
5 V
370
pF
NC, NO, COM
capacitance
Digital input
capacitance
CI
VIN = VCC or GND
RL = 50 Ω
See Figure 17
See Figure 20
25°C
25°C
25°C
5 V
5 V
5 V
2.6
18.3
–70
pF
MHz
dB
Bandwidth
BW
f = 100 kHz,
See Figure 21
Off-state isolation OISO
RL = 50 Ω
f = 100 kHz,
See Figure 22
Crosstalk
XTALK
THD
RL = 50 Ω
25°C
25°C
5 V
5 V
–78
dB
%
Total harmonic
distortion
RL = 600 Ω,
CL = 35 pF
f = 20 Hz to 20 kHz,
See Figure 24
0.009
SUPPLY
25°C
0.2
1.3
VCOM and VIN = VCC or GND,
VNC or VNO = floating
–40°C to +125°C
3.5
Positive
supply current
ICC
5.5 V
μA
VCOM = VCC – 5.5 V, VIN
VCC or GND, VNC or VNO
floating
=
=
–40°C to +125°C
5
8
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6.8 Typical Characteristics
1.1
1
1.1
1
VCC = 2.3 V
VCC = 3 V
VCC = 4.5 V
TA = -40°C
TA = 25°C
TA = 85°C
TA = 125°C
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.9
0.8
0.7
0.6
0.5
0.4
0.3
-3.5
-2.5
-1.5
-0.5
0.5
1.5
2.5
3.5
4.5
-3 -2.4 -1.8 -1.2 -0.6
0
0.6 1.2 1.8 2.4
3
Voltage VCOM (V)
Voltage VCOM (V)
D001
D001
Figure 1. On-Resistance vs Voltage VCOM
Figure 2. On-Resistance vs Voltage VCOM (VCC = 2.3 V)
0.75
0.65
0.55
0.45
0.35
0.25
0.7
TA = -40°C
TA = 25°C
TA = 85°C
TA = 125°C
TA = -40°C
TA = 25°C
TA = 85°C
TA = 125°C
0.65
0.6
0.55
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
-3
-2
-1
0
1
2
3
4
-1
0
1
2
3
4
5
Voltage VCOM (V)
Voltage VCOM (V)
D001
D001
Figure 3. On-Resistance vs Voltage VCOM (VCC = 3 V)
Figure 4. On-Resistance vs Voltage VCOM (VCC = 4.5 V)
0
-1
0
-1
-2
-2
-3
-3
-4
-4
-5
-5
-6
-6
-7
-7
-8
-8
-9
-9
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
T = -40 C
T = 25 C
T = 125 C
-10
-11
-12
-10
-11
-12
1x105
4.01x107 8.01x107 1.201x108 1.601x108
Frequency (Hz)
2x108
1x105
4.01x107 8.01x107 1.201x108 1.601x108
Frequency (Hz)
2x108
D005
D006
Figure 5. Insertion Loss vs Frequency for Varying VCC
Figure 6. Insertion Loss vs Frequency for Varying
Temperature
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Typical Characteristics (continued)
0
-8
0
-8
-16
-24
-32
-40
-48
-56
-64
-72
-80
-16
-24
-32
-40
-48
-56
-64
-72
-80
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
T = -40 C
T = 25 C
T = 125 C
1x105
4.01x107 8.01x107 1.201x108 1.601x108
Frequency (Hz)
2x108
1x105
4.01x107 8.01x107 1.201x108 1.601x108
Frequency (Hz)
2x108
D007
D008
Figure 7. Off Isolation vs Frequency for Varying VCC
Figure 8. Off Isolation vs Frequency for Varying
Temperature
5
0
-10
-20
-20
-45
-30
-40
-50
-60
-70
-70
-80
-90
-95
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
T = -40 C
T = 25 C
T = 125 C
-100
-110
-120
-120
100000
2.01E+7
4.01E+7
6.01E+7
8.01E+7
1E+8
1x105
4.01x107 8.01x107 1.201x108 1.601x108
Frequency (Hz)
2x108
Frequency (Hz)
D009
D010
Figure 9. Crosstalk vs Frequency for Varying VCC
Figure 10. Crosstalk vs Frequency (VCC = 3.3 V)
500
400
300
200
100
0
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 5.5 V
-100
-200
5x100
6.005x103
1.2005x104
1.8005x104
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Frequency (Hz)
Voltage (V)
D012
D011
Figure 12. Total Harmonic Distortion vs Frequency
Figure 11. Charge Injection vs Voltage VCOM
10
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Typical Characteristics (continued)
2.25E-8
2E-8
1.75E-8
1.5E-8
1.25E-8
1E-8
7.5E-9
5E-9
2.5E-9
0
-2.5E-9
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Voltage (V)
D001
T = 25°C
VNC and VNO = Floating
VCOM and VIN = GND
Figure 13. Power-Supply Current vs Voltage
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7 Parameter Measurement Information
VCC
-
R
ꢀ
IN
++
Figure 14. On-State Resistance (Ron)
VCC
Off-State leakage current
Channel Off
VI = VIH or VIL
++
IN
+
Figure 15. Off-State Leakage Current (ICOM(OFF), INO(OFF)
)
VCC
On-state leakage current
Channel On
VI = VIH or VIL
IN
++
Figure 16. On-State Leakage Current
(ICOM(ON), INO(ON)
)
12
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Parameter Measurement Information (continued)
VCC
ë
bh
bh
/ꢀpꢀcitꢀnce
aeter
VBIAS = VCC or GND and
VI = VIH or VIL
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
/ha
/ha
.L!{
Figure 17. Capacitance
(CI, CCOM(OFF), CCOM(ON), CNO(OFF), CNO(ON)
)
VCC
R
C
L
VCOM
VCC
TEST
L
t
300 ꢀ
300 ꢀ
35 pF
35 pF
ON
VCC
OFF
IN
Logic
Input
(VI)
VCC
t
t
OFF
ON
90%
90%
Switch
Output(
VNO
)
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B. CL includes probe and jig capacitance.
Figure 18. Turnon (tON) and Turnoff time (tOFF
)
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Parameter Measurement Information (continued)
VCC
VNC
or
VNO
VCC
RPU
VCC
NC or NO
NC or NO
VOH
10%
10%
VNC or VNO = GND
RL = 1 kꢀ
RPU = 100 ꢀ
CL = 35 pF
A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
Figure 19. Break-Before-Make Time (tBBM
)
VCC
Channel ON:NO to COM
VI = VIH or VIL
50 ꢀ
Network Analyzer Setup
Source power = 0 dBm
(632-mV P-P at 50 ꢀ load)
DC Bias=350 mV
IN
50 ꢀ
+
Figure 20. Bandwidth (BW)
VCC
Channel OFF: NO to COM
VI = VIH or VIL
50 ꢀ
NetworkAnalyzerSetup
Source power = 0 dBm
(632-mV P-P at 50 Ω load)
DC bias = 350 mVꢀ
IN
50 ꢀ
+
Figure 21. Off Isolation (OISO
)
14
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Parameter Measurement Information (continued)
VCC
Channel ON: NC to COM
VNC
50 Ω
NCNO
Channel OFF: NO to COM
VI = VIH or VIL
VNO
NetworkAnalyzerSetup
50 Ω
Source power = 0 dBm
(632-mV P-P at 50 ꢀ load)
DC bias = 350 mV
50 Ω
IN
+
Figure 22. Crosstalk (XTALK
)
VCC
û
VCC
IN
x û
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B. CL includes probe and jig capacitance.
Figure 23. Charge Injection (QC)
Channel ON: COM to NO
VSOURCE = 0.5 V P-P
VI = VIH or VIL
fSOURCE = 20 Hz to 20 kHz CL = 35 pF
RL = 600 Ω
VCC
Audio Analyzer
NO
600 ꢀ
COM
IN
+
600 ꢀ
A. CL includes probe and jig capacitance.
Figure 24. Total Harmonic Distortion (THD)
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8 Detailed Description
8.1 Overview
The TS5A22364-Q1 is a 2-channel single-pole double-throw (SPDT) analog switch designed to operate from 2.3-
V to 5.5-V power supply. The device features negative signal swing capability that allows signals below ground to
pass through the switch without distortion. Additionally, the TS5A22364-Q1 includes an internal shunt switch,
which automatically discharges any capacitance at the NC or NO terminals when they are not connected to
COM. This reduces the audible click-and-pop noise when switching between two sources. The break-before-
make feature prevents signal distortion during the transferring of a signal from one path to another. Low On-state
resistance, excellent channel-to-channel On-state resistance matching, and minimal total harmonic distortion
(THD) performance are ideal for audio applications.
8.2 Functional Block Diagram
TS5A22364-Q1
OUT+
OUT-
NC1
NO1
Audio
Source 1
COM1
IN1
Input Select
8-ꢀ
Speaker
Shunt
Switch
IN2
NC2
NO2
COM2
OUT+
OUT-
Audio
Source 2
8.3 Feature Description
8.3.1 Click-and-Pop Reduction
The 50-Ω shunt switches on the TS5A22364-Q1 automatically discharge any capacitance at the NC or NO
terminals when they are not connected to COM. This reduces the audible click-and-pop sounds that occur when
switching between audio sources. Audible clicks and pops are caused when a step DC voltage is switched into
the speaker. By automatically discharging the side that is not connected, any residual DC voltage is removed,
thereby reducing the clicks and pops.
8.4 Device Functional Modes
Table 1 shows the function table for the TS5A22364-Q1.
Table 1. Function Table
NC TO COM,
COM TO NC
NO TO COM,
COM TO NO
IN
L
ON
OFF
ON
H
OFF
16
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Negative Signal Swing Capability
The TS5A22364-Q1 dual SPDT switches feature negative signal capability that allows signals below ground to
pass through without distortion. These analog switches operate from a single 2.3-V to 5.5-V supply. The input
and output signal swing of the device is dependant on the supply voltage VCC: the device can pass signals as
high as VCC and as low as VCC – 5.5 V, including signals below ground with minimal distortion. The Off state
signal path (either NC or NO) during the operation of the TS5A22364-Q1 cannot handle negative DC voltage.
Table 2 shows the input-output signal swing the user can get with different supply voltages.
Table 2. Input-Output Signal Swing
MINIMUM
(VNC, VNO, VCOM) =
VCC – 5.5
MAXIMUM
MINIMUM
MAXIMUM
SUPPLY
VOLTAGE,
VCC
(VNC, VNO, VCOM) = (VNC, VNO, VCOM) = (VNC, VNO, VCOM) =
VCC
VCC – 5.5
VCC
ON State signal path
OFF state signal path
5.5 V
4.2 V
3.3 V
3 V
0 V
5.5 V
4.2 V
3.3 V
3 V
0 V
0 V
0 V
0 V
0 V
5.5 V
4.2 V
3.3 V
3 V
–1.3 V
–2.2 V
–2.5 V
–3 V
2.5 V
2.5 V
2.5 V
9.2 Typical Application
The 50-Ω shunt switches on the TS5A22364-Q1 automatically discharge any capacitance at the NC or NO
terminals when they are unconnected to COM. This reduces audible click-and-pop sounds that occur when
switching between audio sources. Audible clicks and pops are caused when a step DC voltage is switched into
the speaker. By automatically discharging the side that is not connected, any residual DC voltage is removed,
thereby reducing the clicks and pops. See Figure 25.
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Typical Application (continued)
TS5A22364-Q1
OUT+
NC1
NO1
Audio
OUT-
Source 1
COM1
IN1
Input Select
8-ꢀ
Speaker
Shunt
Switch
IN2
NC2
NO2
COM2
OUT+
OUT-
Audio
Source 2
Figure 25. Shunt Switch Block Diagram
9.2.1 Design Requirements
Tie the digitally controlled input select pins IN1 and IN2 to VCC or GND to avoid unwanted switch states that
could result if the logic control pins are left floating.
9.2.2 Detailed Design Procedure
Select the appropriate supply voltage to cover the entire voltage swing of the signal passing through the switch
because the TS5A22364-Q1 operates from a single 2.3-V to 5.5-V supply and the input-output signal swing of
the device is dependant of the supply voltage VCC. The device passes signals as high as VCC and as low as
VCC – 5.5 V. Use Table 2 as a guide for selecting supply voltage based on the signal passing through the switch.
Limit the current through the shunt resistor so as not to exceed the ±20 mA.
Ensure that the device is powered up with a supply voltage on VCC before a voltage can be applied to the signal
paths NC and NO.
9.2.3 Application Curve
1.1
1
VCC = 2.3 V
VCC = 3 V
VCC = 4.5 V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
-3.5
-2.5
-1.5
-0.5
0.5
1.5
2.5
3.5
4.5
Voltage VCOM (V)
D001
Figure 26. On-Resistance vs Voltage VCOM
18
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10 Power Supply Recommendations
The TS5A22364-Q1 operates from a single 2.3-V to 5.5-V supply. The device must be powered up with a supply
voltage on VCC before a voltage can be applied to the signal paths NC and NO. It is recommended to include a
100 μs delay after VCC is at voltage before applying a signal on NC and NO paths.
It is also good practice to place a 0.1-μF bypass capacitor on the supply pin VCC to GND to smooth out lower
frequency noise to provide better load regulation across the frequency spectrum.
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11 Layout
11.1 Layout Guidelines
It is recommended to place a bypass capacitor as close to the supply pin VCC as possible to help smooth out
lower frequency noise to provide better load regulation across the frequency spectrum.
Minimize trace lengths and vias on the signal paths in order to preserve signal integrity.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane
VIA to GND
Bypass Capacitor
VCC
To System
To System
VCC
1
10
9
NO2
COM2
NC2
To System
NO1
2
To System
To System
To System
To System
To System
COM1
8
3
IN2
7
6
NC1
IN1
4
5
GND
Figure 27. Layout Example of TS5A22364-Q1
20
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12 器件和文档支持
12.1 接收文档更新通知
如需接收文档更新通知,请访问 ti.com 上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册后,即可每周定
期收到已更改的产品信息。有关更改的详细信息,请查阅已修订文档中包含的修订历史记录。
12.2 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损
伤。
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。要获得这份数据表的浏览器版本,请查阅左侧的导航栏。
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21
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IMPORTANT NOTICE
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Copyright © 2016, 德州仪器半导体技术(上海)有限公司
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TS5A22364QDGSRQ1
ACTIVE
VSSOP
DGS
10
2500 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
SJN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Jul-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TS5A22364QDGSRQ1 VSSOP
DGS
10
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Jul-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VSSOP DGS 10
SPQ
Length (mm) Width (mm) Height (mm)
366.0 364.0 50.0
TS5A22364QDGSRQ1
2500
Pack Materials-Page 2
PACKAGE OUTLINE
DGS0010A
VSSOP - 1.1 mm max height
S
C
A
L
E
3
.
2
0
0
SMALL OUTLINE PACKAGE
C
SEATING PLANE
0.1 C
5.05
4.75
TYP
PIN 1 ID
AREA
A
8X 0.5
10
1
3.1
2.9
NOTE 3
2X
2
5
6
0.27
0.17
10X
3.1
2.9
1.1 MAX
0.1
C A
B
B
NOTE 4
0.23
0.13
TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0.7
0.4
0 - 8
DETAIL A
TYPICAL
4221984/A 05/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187, variation BA.
www.ti.com
EXAMPLE BOARD LAYOUT
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (1.45)
(R0.05)
TYP
SYMM
10X (0.3)
1
5
10
SYMM
6
8X (0.5)
(4.4)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221984/A 05/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DGS0010A
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
10X (1.45)
SYMM
(R0.05) TYP
10X (0.3)
8X (0.5)
1
5
10
SYMM
6
(4.4)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221984/A 05/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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邮寄地址:上海市浦东新区世纪大道 1568 号中建大厦 32 楼,邮政编码:200122
Copyright © 2020 德州仪器半导体技术(上海)有限公司
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