TS5V330DRE4 [TI]
QUAD SPDT WIDE-BANDWIDTH VIDEO SWITCH WITH LOW ON-STATE RESISTANCE; 具有低导通电阻四路SPDT高带宽视频开关
| 型号： | TS5V330DRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUAD SPDT WIDE-BANDWIDTH VIDEO SWITCH WITH LOW ON-STATE RESISTANCE |
| 文件： | 总26页 (文件大小：906K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
QUAD SPDT WIDE-BANDWIDTH VIDEO SWITCH WITH LOW ON-STATE RESISTANCE
1
FEATURES
D, DBQ, OR PW PACKAGE
•
Low Differential Gain and Phase
(DG = 0.64%, DP = 0.1 Degrees Typ)
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
•
•
•
Wide Bandwidth (BW = 300 MHz Min)
Low Crosstalk (XTALK = –63 dB Typ)
VCC
EN
IN
S1A
S2A
DA
S1B
S2B
DB
S1D
S2D
DD
S1C
S2C
DC
Low Power Consumption
(ICC = 3 µA Max)
•
Bidirectional Data Flow With Near-Zero
Propagation Delay
•
•
•
Low ON-State Resistance (ron = 3 Ω Typ)
GND
VCC Operating Range From 4.5 V to 5.5 V
Ioff Supports Partial-Power-Down Mode
Operation
RGY PACKAGE
(TOP VIEW)
•
•
•
•
Data and Control Inputs Provide Undershoot
Clamp Diode
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
1
16
15
14
13
12
11
10
S1A
S2A
DA
S1B
S2B
DB
2
3
4
5
6
7
EN
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
S1D
S2D
DD
S1C
S2C
ESD Performance Tested Per JESD 22
–
1000-V Charged-Device Model (C101)
•
Suitable for Both RGB and Composite-Video
Switching
8
9
DESCRIPTION/ORDERING INFORMATION
The TS5V330 video switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (EN) input.
When EN is low, the switch is enabled and the D port is connected to the S port. When EN is high, the switch is
disabled and the high-impedance state exists between the D and S ports. The select (IN) input controls the data
path of the multiplexer/demultiplexer.
Low differential gain and phase make this switch ideal for composite and RGB video applications. This device
has wide bandwidth and low crosstalk, making it suitable for high-frequency applications as well.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging
current will not backflow through the device when it is powered down. This switch maintains isolation during
power off.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TS5V330
SCDS164D–MAY 2004–REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TS5V330RGYR
TS5V330D
TOP-SIDE MARKING
TE330
QFN – RGY
Tape and reel
Tube
SOIC – D
TS5V330
TE330
Tape and reel
Tape and reel
Tube
TS5V330DR
–40°C to 85°C
SSOP (QSOP) – DBQ
TSSOP – PW
TS5V330DBQR
TS5V330PW
TE330
Tape and reel
TS5V330PWR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, EN should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS
INPUT/OUTPUT
D
FUNCTION
EN
L
IN
L
S1
S2
Z
D port = S1 port
D port = S2 port
Disconnect
L
H
X
H
xxxx
PIN DESCRIPTION
PIN
S1, S2
D
DESCRIPTION
Analog video I/Os
Analog video I/Os
Select input
IN
EN
Switch-enable input
2
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Product Folder Link(s): TS5V330
TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
PARAMETER DEFINITIONS
PARAMETER
DESCRIPTION
Resistance between the D and S ports, with the switch in the ON state
Output leakage current measured at the D and S ports, with the switch in the OFF state
Short-circuit current measured at the I/O pins
ron
IOZ
IOS
VIN
VEN
CIN
COFF
CON
VIH
VIL
Vhys
VIK
VI
Voltage at IN
Voltage at EN
Capacitance at the control (EN, IN) inputs
Capacitance at the analog I/O port when the switch is OFF
Capacitance at the analog I/O port when the switch is ON
Minimum input voltage for logic high for the control (EN, IN) inputs
Minimum input voltage for logic low for the control (EN, IN) inputs
Hysteresis voltage at the control (EN, IN) inputs
I/O and control (EN, IN) inputs diode clamp voltage
Voltage applied to the D or S pins when D or S is the switch input
Voltage applied to the D or S pins when D or S is the switch output
Input high leakage current of the control (EN, IN) inputs
VO
IIH
IIL
Input low leakage current of the control (EN, IN) inputs
II
Current into the D or S pins when D or S is the switch input
Current into the D or S pins when D or S is the switch output
Output leakage current measured at the D or S ports, with VCC = 0
Propagation delay measured between 50% of the digital input to 90% of the analog output when switch is turned ON
Propagation delay measured between 50% of the digital input to 90% of the analog output when switch is turned OFF
Frequency response of the switch in the ON state measured at –3 dB
IO
Ioff
tON
tOFF
BW
Unwanted signal coupled from channel to channel. Measured in –dB. XTALK = 20 log VO/VI. This is a nonadjacent
crosstalk.
XTALK
OIRR
Off isolation is the resistance (measured in –dB) between the input and output with the switch OFF.
Magnitude variation between analog input and output pins when the switch is ON and the dc offset of composite-video
signal varies at the analog input pin. In the NTSC standard, the frequency of the video signal is 3.58 MHz, and dc offset
is from 0 to 0.714 V.
DG
DP
Phase variation between analog input and output pins when the switch is ON and the dc offset of composite-video signal
varies at the analog input pin. In the NTSC standard, the frequency of the video signal is 3.58 MHz, and dc offset is from
0 to 0.714 V.
ICC
Static power-supply current
ICCD
ΔICC
Variation of ICC for a change in frequency in the control (EN, IN) inputs
This is the increase in supply current for each control input that is at the specified voltage level, rather than VCC or GND.
Copyright © 2004–2009, Texas Instruments Incorporated
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TS5V330
SCDS164D–MAY 2004–REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
FUNCTIONAL DIAGRAM (POSITIVE LOGIC)
2
4
7
9
S1
D
A
A
B
3
S2
A
5
6
D
S1
S2
B
B
11
10
S1
S2
D
D
C
C
C
12
14
13
S1
S2
D
D
D
1
IN
Control
Logic
15
EN
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX UNIT
VCC Supply voltage range
7
7
V
VIN
VI/O Switch I/O voltage range(2)(3)(4)
IIK Control input clamp current
II/OK I/O port clamp current
Control input voltage range(2)(3)
V
7
V
VIN < 0
VI/O < 0
–50
–50
±128
±100
73
mA
mA
mA
mA
II/O
ON-state switch current(5)
Continuous current through VCC or GND
D package(6)
DBQ package(6)
PW package(6)
RGY package(7)
90
θJA
Package thermal impedance
Storage temperature range
°C/W
°C
108
39
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VI and VO are used to denote specific conditions for VI/O
(5) II and IO are used to denote specific conditions for II/O
.
.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
(7) The package thermal impedance is calculated in accordance with JESD 51-5.
4
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Product Folder Link(s): TS5V330
TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
Recommended Operating Conditions(1)
MIN
4
MAX UNIT
VCC
VIH
Supply voltage range
5.5
5.5
0.8
Vcc
85
V
V
High-level control input voltage range (EN, IN)
Low-level control input voltage range (EN, IN)
Analog I/O voltage range
2
VIL
0
V
VANALOG
TA
0
V
Operating free-air temperature range
–40
°C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range, VCC = 5 V ±10% (unless otherwise noted)
PARAMETER
TEST CONDITIONS(1)
MIN TYP(2) MAX
UNIT
V
VIK
EN, IN VCC = 4.5 V, IIN = –18 mA
–1.8
Vhys EN, IN
150
mV
µA
IIH
EN, IN VCC = 5.5 V, VIN and VEN = VCC
EN, IN VCC = 5.5 V, VIN and VEN = GND
±1
IIL
±1
µA
(3)
(4)
IOZ
IOS
Ioff
ICC
VCC = 5.5 V, VO = 0 to 5.5 V,
VCC = 5.5 V, VO = 0.5 VCC,
VI = 0,
Switch OFF
Switch ON
±1
µA
VI = 0,
50
mA
µA
VCC = 0 V,
VO = 0 to 5.5 V,
VI = 0
1
VCC = 5.5 V, II/O = 0,
Switch ON or OFF
3
µA
ΔICC EN, IN VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND
2.5
mA
ICCD
VEN = GND, VCC = 5.5 V, D and S ports open, VIN input switching 50% duty cycle
0.25 mA/MHz
VIN of VEN = 0,
f = 1 MHz
CIN
EN, IN
3.5
pF
D port
S port
6
4
COFF
CON
VI = 0,
f = 1 MHz,
Outputs open,
Switch OFF
pF
pF
VI = 0,
f = 1 MHz,
VI = 1 V,
VI = 2 V,
Outputs open,
IO = 13 mA,
IO = 26 mA,
Switch ON
RL = 75 Ω
RL = 75 Ω
14
3
7
(5)
ron
VCC = 4.5 V
Ω
7
10
(1) VI, VO, II, and IO refer to I/O pins.
(2) All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
(3) For I/O ports, IOZ includes the input leakage current.
(4) The IOS test is applicable to only one ON channel at a time. The duration of this test is less than 1 s.
(5) Measured by the voltage drop between the D and S terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (D or S) terminals.
Copyright © 2004–2009, Texas Instruments Incorporated
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TS5V330
SCDS164D–MAY 2004–REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 10%, RL = 75 Ω, CL = 20 pF
(unless otherwise noted) (see Figure 5)
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
TYP
MAX
UNIT
tON
S
S
D
D
2.5
1.1
6
6
ns
ns
tOFF
Dynamic Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 10% (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
(2)
DG
RL = 150 Ω,
RL = 150 Ω,
RL = 150 Ω,
RL = 150 Ω,
RL = 150 Ω,
f = 3.58 MHz,
See Figure 6
See Figure 6
0.64
%
Deg
MHz
dB
(2)
DP
f = 3.58 MHz,
See Figure 7
f = 10 MHz,
f = 10 MHz,
0.1
BW
XTALK
OIRR
300
–63
–60
RIN = 10 Ω,
See Figure 8
See Figure 9
dB
(1) All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
(2) DG and DP are expressed in absolute magnitude.
6
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
OPERATING CHARACTERISTICS
0
0
−1
−10
−20
−30
−40
−50
−60
−2
−3
Phase
−4
−5
Gain
−6
−7
1
10
100
1000
Frequency − MHz
Phase at −3-dB Frequency, 35 Degrees
Gain −3 dB at 460 MHz
Figure 1. Gain/Phase vs Frequency
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.00
−0.01
0.0
−0.1
−0.2
−0.3
Differential Phase
−0.4
−0.5
−0.6
−0.7
−0.8
−0.9
−1.0
Differential Gain
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
V
BIAS
− V
Differential Phase at 0.714, 0.056 Degrees
Differential Gain at 0.714, −0.63%
Figure 2. Differential Gain/Phase vs VBIAS
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TS5V330
SCDS164D–MAY 2004–REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
OPERATING CHARACTERISTICS
160
140
0
−10
−20
120
100
−30
−40
Phase
Off
80
60
40
20
0
−50
−60
−70
Isolation
−80
−90
1
100
10
1000
Frequency − MHz
Phase at 10 MHz, 88.5 Degrees
Off Isolation at 10 MHz, −60 dB
Figure 3. Off Isolation vs Frequency
250
200
150
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
Phase
100
50
0
Crosstalk
1
10
100
Frequency − Mhz
1000
Phase at 10 MHz, −90.4 Degrees
Crosstalk at 10 MHz, −63.9 dB
Figure 4. Crosstalk vs Frequency
8
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
PARAMETER MEASUREMENT INFORMATION
V
CC
Input Generator
V
IN
IN
50 Ω
50 Ω
V
G1
S1
DUT
EN
V
V
V
S1
O
D
C
L
S2
R
L
(see Note A)
S2
R
L
V
S1
V
S2
C
L
V
CC
TEST
5 V ± 0.5 V
5 V ± 0.5 V
75
75
20
20
GND
3 V
3 V
t
ON
GND
5 V ± 0.5 V
5 V ± 0.5 V
75
75
20
20
GND
3 V
3 V
t
OFF
GND
TEST CIRCUIT
50% 50%
Output
Control
(V
3 V
0 V
)
IN
t
ON
t
OFF
Analog Output
Waveform
V
OH
90%
90%
(V )
O
0 V
VOLTAGE WAVEFORMS
AND t TIMES
t
ON
OFF
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
C. The outputs are measured one at a time, with one transition per measurement.
Figure 5. Test Circuit and Voltage Waveforms
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TS5V330
SCDS164D–MAY 2004–REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
V
BIAS
BIAS
Network Analyzer
(HP8753ES)
Sawtooth
Waveform Generator
P1
P2
V
CC
S1
A
D
A
R
L
= 150 Ω
IN
DUT
V
IN
EN
V
EN
NOTE A: For additional information on measurement method, refer to the TI application report, Measuring Differential Gain and Phase, literature
number SLOA040.
Figure 6. Test Circuit for Differential Gain/Phase Measurement
Differential gain and phase are measured at the output of the ON channel. For example, when VIN = 0, VEN = 0,
and DA is the input, the output is measured at S1A.
HP8753ES Setup
Average = 20
RBW = 300 Hz
ST = 1.381 s
P1 = –7 dBM
CW frequency = 3.58 MHz
Sawtooth Waveform Generator Setup
VBIAS = 0 to 1 V
Frequency = 0.905 Hz
10
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TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
V
BIAS
P1
P2
V
CC
D
A
S1
A
R
L
= 150 Ω
IN
DUT
V
IN
EN
V
EN
Figure 7. Test Circuit for Frequency Response (BW)
Frequency response is measured at the output of the ON channel. For example, when VIN = 0, VEN = 0, and DA
is the input, the output is measured at S1A. All unused analog I/O ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 Hz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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TS5V330
SCDS164D–MAY 2004–REVISED JUNE 2009 .............................................................................................................................................................. www.ti.com
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
V
BIAS
P1
P2
V
CC
D
A
S1
A
(1)
IN
R = 150 Ω
L
50 Ω
V
IN
DUT
EN
V
EN
D
B
S1
B
R
IN
= 10 Ω
R = 150 Ω
L
(1) A 50-Ω termination resistor is needed for the network analyzer.
Figure 8. Test Circuit for Crosstalk (XTALK
)
Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VIN = 0, VEN = 0, and DA
is the input, the output is measured at S1B. All unused analog input (D) ports and output (S) ports are connected
to GND through 10-Ω and 50-Ω pulldown resistors, respectively.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
12
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Product Folder Link(s): TS5V330
TS5V330
www.ti.com .............................................................................................................................................................. SCDS164D–MAY 2004–REVISED JUNE 2009
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
V
BIAS
P1
P2
V
CC
D
A
S1
A
R
R
= 150 Ω
= 150 Ω
L
IN
DUT
V
IN
S2
A
EN
(1)
50 Ω
L
V
EN
(1) A 50-Ω termination resistor is needed for the network analyzer.
Figure 9. Test Circuit for Off Isolation (OIRR
)
Off isolation is measured at the output of the OFF channel. For example, when VIN = VCC, VEN = 0, and DA is the
input, the output is measured at S1A. All unused analog input (D) ports are left open, and output (S) ports are
connected to GND through 50-Ω pulldown resistors.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2009
PACKAGING INFORMATION
Orderable Device
TS5V330D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TS5V330DBQR
TS5V330DBQRE4
TS5V330DBQRG4
TS5V330DE4
SSOP/
QSOP
DBQ
DBQ
DBQ
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SSOP/
QSOP
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SSOP/
QSOP
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TS5V330DG4
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TS5V330DR
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TS5V330DRE4
TS5V330DRG4
TS5V330PW
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
VQFN
VQFN
PW
PW
PW
PW
PW
PW
RGY
RGY
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TS5V330PWE4
TS5V330PWG4
TS5V330PWR
TS5V330PWRE4
TS5V330PWRG4
TS5V330RGYR
TS5V330RGYRG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2009
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TS5V330DR
TS5V330PWR
TS5V330RGYR
SOIC
TSSOP
VQFN
D
16
16
16
2500
2000
3000
330.0
330.0
180.0
16.4
12.4
12.4
6.5
7.0
3.8
10.3
5.6
2.1
1.6
1.5
8.0
8.0
8.0
16.0
12.0
12.0
Q1
Q1
Q1
PW
RGY
4.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TS5V330DR
TS5V330PWR
TS5V330RGYR
SOIC
TSSOP
VQFN
D
16
16
16
2500
2000
3000
333.2
346.0
190.5
345.9
346.0
212.7
28.6
29.0
31.8
PW
RGY
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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