TSC2200 [TI]

具有 12 位 125kHz ADC 和键盘接口的可编程 4 线触摸屏控制器;
TSC2200
型号: TSC2200
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有 12 位 125kHz ADC 和键盘接口的可编程 4 线触摸屏控制器

控制器
文件: 总47页 (文件大小:2091K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TSC2200  
SBAS191F – FEBRUARY 2001 – REVISED APRIL 2004  
PDA ANALOG INTERFACE CIRCUIT  
FEATURES  
4-WIRE TOUCH SCREEN INTERFACE AND  
APPLICATIONS  
PERSONAL DIGITAL ASSISTANTS  
CELLULAR PHONES  
MP3 PLAYERS  
4-BY-4 KEYPAD INTERFACE  
RATIOMETRIC CONVERSION  
SINGLE 2.7V TO 3.6V SUPPLY  
SERIAL INTERFACE  
DESCRIPTION  
INTERNAL DETECTION OF SCREEN TOUCH  
The TSC2200 is a complete PDA analog interface circuit. It  
contains a complete 12-bit, Analog-to-Digital (A/D) resistive  
touch screen converter including drivers, the control to mea-  
sure touch pressure, keyboard controller, and an 8-bit Digital-  
to-Analog (D/A) converter output for LCD contrast control.  
The TSC2200 interfaces to the host controller through a  
standard SPI™ serial interface. The TSC2200 offers program-  
mable resolution and sampling rates from 8- to 12-bits and up  
to 125kHz to accommodate different screen sizes.  
AND KEYPAD  
PROGRAMMABLE 8-, 10-, OR 12-BIT  
RESOLUTION  
PROGRAMMABLE SAMPLING RATES  
DIRECT BATTERY MEASUREMENT (0.5V to 6V)  
ON-CHIP TEMPERATURE MEASUREMENT  
TOUCH-PRESSURE MEASUREMENT  
FULL POWER-DOWN CONTROL  
The TSC2200 also offers two battery-measurement inputs  
capable of reading battery voltages up to 6V, while operating  
at only 2.7V. It also has an on-chip temperature sensor  
capable of reading 0.3°C resolution. The TSC2200 is available  
in a TSSOP-28 and a QFN-32 package.  
TSSOP-28 AND QFN-32 PACKAGES  
SPI is a registered trademark of Motorola.  
US Patent No. 624639.  
C1 C2 C3 C4 R1 R2 R3 R4  
Keyboard Scanner  
and State Control  
MISO  
SS  
SCLK  
X+  
Clock  
X–  
Y+  
Y–  
Touch Panel  
Drivers  
Serial  
Interface  
and  
MOSI  
Control  
Logic  
Temp Sensor  
DAV  
A/D Converter  
PENIRQ  
KBIRQ  
MUX  
VBAT1  
Battery Monitor  
Battery Monitor  
VBAT2  
AUX1  
AUX2  
Internal 2.5V  
Reference  
VREF  
ARNG  
AOUT  
D/A Converter  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2001-2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
www.ti.com  
ABSOLUTE MAXIMUM RATINGS(1)  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
This integrated circuit can be damaged by ESD. Texas  
Instruments recommends that all integrated circuits be handled  
with appropriate precautions. Failure to observe proper han-  
dling and installation procedures can cause damage.  
VDD to GND ........................................................................ 0.3V to +6.0V  
VBAT Input Voltage to GND ............................................... 0.3V to +6.0V  
Analog Input Voltage to GND (except VBAT) ........... 0.3V to VDD + 0.3V  
Digital Input Voltage to GND ................................... 0.3V to VDD + 0.3V  
Operating Temperature Range ...................................... 40°C to +105°C  
Storage Temperature Range .........................................65°C to +150°C  
Junction Temperature (TJ Max) .................................................... +150°C  
TSSOP Package  
ESD damage can range from subtle performance degrada-  
tion to complete device failure. Precision integrated circuits  
may be more susceptible to damage because very small  
parametric changes could cause the device not to meet its  
published specifications.  
Power Dissipation .................................................... (TJ Max TA)/θJA  
θJA Thermal Impedance .......................................................... 90°C/W  
Lead Temperature, Soldering  
Vapor Phase (60s) ............................................................ +215°C  
Infrared (15s) ..................................................................... +220°C  
NOTE: (1) Stresses above those listed under Absolute Maximum Ratings”  
may cause permanent damage to the device. Exposure to absolute maximum  
conditions for extended periods may affect device reliability.  
INTEGRAL  
SPECIFIED  
LINEARITY  
PACKAGE  
TEMPERATURE  
RANGE  
PACKAGE  
MARKING  
ORDERING  
NUMBER  
TRANSPORT  
MEDIA, QUANTITY  
PRODUCT  
ERROR (LSB) PACKAGE-LEAD DESIGNATOR(1)  
TSC2200  
±2  
"
TSSOP-28  
PW  
"
40°C to +85°C  
TSC2200I  
TSC2200IPW  
TSC2200IPWR  
TSC2200IRHB  
TSC2200IRHBR  
Rails, 50  
"
"
QFN-32  
"
"
"
Tape and Reel, 2000  
Tubes, 72  
TSC2200  
±2  
RHB  
40°C to +85°C  
TSC2200I  
"
"
"
"
"
Tape and Reel, 2500  
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.  
TIMING CHARACTERISTICS(1)(2)  
At 40°C to +85°C, +VDD = +2.7V, VREF = +2.5V, unless otherwise noted.  
TSC2200  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
UNITS  
SCLK Period  
tsck  
tLead  
tLag  
ttd  
tsu  
thi  
tho  
ta  
tdis  
tv  
30  
15  
15  
30  
10  
10  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Enable Lead Time  
Enable Lag Time  
Sequential Transfer Delay  
Data Setup Time  
Data Hold Time (inputs)  
Data Hold Time (outputs)  
Slave Access Time  
Slave DOUT Disable Time  
Data Valid  
15  
15  
10  
30  
30  
Rise Time  
Fall Time  
tr  
tf  
NOTES: (1) All input signals are specified with tr = tf = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. (2) See timing diagram below.  
TIMING DIAGRAM  
All specifications typical at 40°C to +85°C, +VDD = +2.7V.  
SS  
ttd  
tLag  
tsck  
tLead  
tf  
tr  
twsck  
SCLK  
MISO  
twsck  
tv  
tho  
tdis  
MSB OUT  
thi  
BIT 6 ... 1  
BIT 6 ... 1  
LSB OUT  
LSB IN  
ta  
tsu  
MOSI  
MSB IN  
TSC2200  
2
www.ti.com  
SBAS191F  
ELECTRICAL CHARACTERISTICS  
At 40°C to +85°C, +VDD = +2.7V, internal VREF = +2.5V, conversion clock = 2MHz, and 12-bit mode, unless otherwise noted.  
TSC2200IPW  
TSC2200IRHB  
TYP  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
MIN  
MAX  
UNITS  
AUXILIARY ANALOG INPUT  
Input Voltage Range  
0
+VREF  
V
Input Capacitance  
Input Leakage Current  
25  
±1  
pF  
µA  
BATTERY MONITOR INPUT  
Input Voltage Range  
Input Capacitance  
Input Leakage Current  
Accuracy  
0.5  
6.0  
V
25  
±1  
pF  
µA  
%
3  
+3  
TEMPERATURE MEASUREMENT  
Temperature Range  
Temperature Resolution  
Accuracy  
40  
+85  
°C  
°C  
°C  
0.3  
±2  
A/D CONVERTER  
Resolution  
No Missing Codes  
Integral Linearity  
Offset Error  
Gain Error  
Noise  
Power-Supply Rejection  
Programmable: 8-, 10-, or 12-Bits  
12-Bit Resolution  
12  
Bits  
Bits  
11  
±2  
±6  
±6  
±3  
LSB  
LSB  
LSB  
µVrms  
dB  
Excluding Reference Error  
30  
80  
D/A CONVERTER  
Output Current Range  
Resolution  
Set by Resistor from ARNG to GND  
650  
500  
µA  
Bits  
LSB  
8
Integral Linearity  
±2  
VOLTAGE REFERENCE  
Voltage Range  
Internal 2.5V  
Internal 1.25V  
2.45  
1.225  
2.5  
1.25  
20  
2.55  
1.275  
1.285  
V
V
Reference Drift  
External Reference Input Range  
Current Drain  
ppm/°C  
V
µA  
1.0  
VDD  
20  
DIGITAL INPUT/OUTPUT  
Internal Clock Frequency  
Logic Family  
8
MHz  
CMOS  
Logic Levels:VIH  
IIH = +5µA  
IIL = +5µA  
IOH = 2 TTL Loads  
IOL = 2 TTL Loads  
0.7VDD  
0.3  
0.8VDD  
V
V
V
V
VIL  
VOH  
VOL  
0.3VDD  
0.4  
POWER-SUPPLY REQUIREMENTS  
Power-Supply Voltage, +VDD  
Quiescent Current  
Specified Performance  
See Note (1)  
2.7  
3.6  
2.3  
2.5  
V
1.25  
500  
mA  
µA  
µA  
See Note (2)  
Power-Down  
3
TEMPERATURE RANGE  
Specified Performance  
40  
+85  
°C  
Specifications same as TSC2200IPW.  
NOTES: (1) AUX1 conversion, no averaging, no REF power down, 50µs conversion. (2) AUX1 conversion, no averaging, external reference, 50µs conversion.  
TSC2200  
SBAS191F  
3
www.ti.com  
PIN CONFIGURATION  
Top View  
TSSOP  
Top View  
QFN  
+VDD  
X+  
1
2
3
4
5
6
7
8
9
28 AUX1  
27 AUX2  
26 ARNG  
25 AOUT  
24 PENIRQ  
23 MISO  
22 DAV  
21 MOSI  
20 SS  
Y+  
X–  
X–  
Y–  
1
2
3
4
5
6
7
8
24 NC  
Y–  
23 AOUT  
22 PENIRQ  
21 MISO  
20 DAV  
19 MOSI  
18 SS  
GND  
VBAT1  
VBAT2  
VREF  
GND  
VBAT1  
VBAT2  
VREF  
KBIRQ  
R1  
TSC2200  
TSC2200  
KBIRQ 10  
R1 11  
19 SCLK  
18 C4  
17 SCLK  
R2 12  
17 C3  
R3 13  
16 C2  
R4 14  
15 C1  
PIN DESCRIPTION  
PIN  
TSSOP  
QFN  
NAME DESCRIPTION  
1
29, 30  
31  
32  
1
VDD  
X+  
Power Supply  
X+ Position Input  
Y+ Position Input  
XPosition Input  
YPosition Input  
Ground  
2
3
Y+  
4
X–  
5
2
Y–  
6
3
GND  
VBAT1  
VBAT2  
VREF  
7
4
Battery Monitor Input 1  
8
5
Battery Monitor Input 2  
9
6
Voltage Reference Input/Output  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
7
KBIRQ Keyboard Interrupt (active LOW)  
8
R1  
R2  
Row 1  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
26  
27  
28  
9, 24, 25  
Row 2  
R3  
Row 3  
R4  
Row 4  
C1  
Column 1  
Column 2  
Column 3  
Column 4  
Serial Clock Input  
C2  
C3  
C4  
SCLK  
SS  
Slave Select Input (active LOW). Data will not be clocked in to MOSI unless SS is LOW. When SS is HIGH, MISO is high impedance.  
Serial Data Input. Data is clocked in at SCLK falling edge.  
MOSI  
DAV  
MISO  
Data Available (active LOW)  
Serial Data Output. Data is clocked out at SCLK falling edge. High impedance when SS is HIGH.  
PENIRQ Pen Interrupt  
AOUT  
Analog Output Current from D/A Converter  
ARNG D/A Converter Analog Output Range Set  
AUX2  
AUX1  
NC  
Auxiliary A/D Converter Input 2  
Auxiliary A/D Converter Input 1  
No Connection  
TSC2200  
4
www.ti.com  
SBAS191F  
TYPICAL CHARACTERISTICS  
At TA = +25°C, +VDD = +2.7V, conversion clock = 2MHz, 12-bit mode, and VREF = +2.5V, unless otherwise noted.  
POWER-DOWN SUPPLY CURRENT  
vs TEMPERATURE  
CONVERSION SUPPLY CURRENT vs TEMPERATURE  
1.86  
1.85  
1.84  
1.83  
1.82  
1.81  
1.80  
1.79  
1.78  
10  
8
6
4
2
0
60  
40  
20  
0
20  
40  
60  
80  
100  
40  
20  
0
20  
40  
60  
80  
100  
Temperature (°C)  
Temperature (°C)  
POWER-DOWN SUPPLY CURRENT vs  
SUPPLY VOLTAGE  
INTERNAL OSCILLATOR FREQUENCY vs VDD  
8.7  
8.6  
8.5  
8.4  
8.3  
8.2  
8.1  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0
2.5  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
Supply Voltage (V)  
VDD (V)  
CHANGE IN GAIN ERROR vs TEMPERATURE  
CHANGE IN OFFSET ERROR vs TEMPERATURE  
0.5  
0.4  
0.5  
0.4  
0.3  
0.3  
0.2  
0.2  
0.1  
0.1  
0
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.1  
0.2  
0.3  
0.4  
0.5  
60  
40  
20  
0
20  
40  
60  
80  
100  
60  
40  
20  
0
20  
40  
60  
80  
100  
Temperature (°C)  
Temperature (°C)  
TSC2200  
SBAS191F  
5
www.ti.com  
TYPICAL CHARACTERISTICS (Cont.)  
At TA = +25°C, +VDD = +2.7V, conversion clock = 2MHz, 12-bit mode, and VREF = +2.5V, unless otherwise noted.  
INTERNAL REFERENCE vs TEMPERATURE  
1.25V Reference  
INTERNAL REFERENCE vs VDD  
2.55  
2.54  
2.53  
2.52  
2.51  
2.50  
2.49  
2.48  
2.47  
2.46  
2.45  
1.275  
1.270  
1.265  
1.260  
1.255  
1.250  
1.245  
1.240  
1.235  
1.230  
1.225  
2.55  
2.54  
2.53  
2.52  
2.51  
2.50  
2.49  
2.48  
2.47  
2.46  
2.45  
1.275  
1.270  
1.265  
1.260  
1.255  
1.250  
1.245  
1.240  
1.235  
1.230  
1.225  
1.25V Reference  
2.5V Reference  
2.5V Reference  
60  
60  
2.5  
40  
20  
0
20  
40  
60  
80  
100  
2.5  
60  
60  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
100  
100  
Temperature (°C)  
VDD (V)  
INTERNAL OSCILLATOR FREQUENCY  
vs TEMPERATURE  
TOUCH SCREEN DRIVER ON-RESISTANCE  
vs TEMPERATURE  
8.8  
8.6  
8.4  
8.2  
8.0  
7.8  
7.6  
7.4  
8.0  
7.5  
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
40  
20  
0
20  
40  
60  
80  
100  
40  
20  
0
20  
40  
60  
80  
Temperature (°C)  
Temperature (°C)  
SWITCH-ON RESISTANCE vs VDD  
TEMP1 DIODE VOLTAGE vs TEMPERATURE  
800  
750  
700  
650  
600  
550  
500  
450  
400  
6.2  
6.1  
6.0  
5.9  
5.8  
5.7  
5.6  
5.5  
5.4  
5.3  
40  
20  
0
20  
40  
60  
80  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
Supply Voltage (V)  
Temperature (°C)  
TSC2200  
6
www.ti.com  
SBAS191F  
TYPICAL CHARACTERISTICS (Cont.)  
At TA = +25°C, +VDD = +2.7V, conversion clock = 2MHz, 12-bit mode, and VREF = +2.5V, unless otherwise noted.  
TEMP1 DIODE VOLTAGE vs SUPPLY VOLTAGE  
TEMP2 DIODE VOLTAGE vs TEMPERATURE  
900  
800  
700  
600  
500  
612.0  
611.8  
611.6  
611.4  
611.2  
611.0  
610.8  
610.6  
610.4  
610.2  
610.0  
60  
40  
20  
0
20  
40  
60  
80  
100  
2.5  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
VDD (V)  
Temperature (°C)  
TEMP2 DIODE VOLTAGE vs SUPPLY VOLTAGE  
DAC OUTPUT CURRENT vs TEMPERATURE  
1.00  
0.95  
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
0.60  
727.06  
727.04  
727.02  
727.00  
727.98  
727.96  
727.94  
727.92  
727.90  
2.5  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
60  
40  
20  
0
20  
40  
60  
80  
100  
VDD (V)  
Temperature (°C)  
DAC MAX CURRENT vs VDD  
0.895  
0.890  
0.885  
0.880  
0.875  
0.870  
0.865  
0.860  
0.855  
2.5  
2.7  
2.9  
3.1  
3.3  
3.5  
3.7  
VDD (V)  
TSC2200  
SBAS191F  
7
www.ti.com  
Communication to the TSC2200 is via a standard SPI serial  
interface. This interface requires that the Slave Select signal be  
driven LOW to communicate with the TSC2200. Data is then  
shifted into or out of the TSC2200 under control of the host  
microprocessor, which also provides the serial data clock.  
OVERVIEW  
The TSC2200 is an analog interface circuit for human inter-  
face devices. A register-based architecture eases integration  
with microprocessor-based systems through a standard SPI  
bus. All peripheral functions are controlled through the reg-  
isters and onboard state machines.  
Control of the TSC2200 and its functions is accomplished by  
writing to different registers in the TSC2200. A simple com-  
mand protocol is used to address the 16-bit registers. Reg-  
isters control the operation of the A/D converter, D/A con-  
verter, and keypad scanner.  
The TSC2200 consists of the following blocks (refer to the  
block diagram on the front page):  
Touch Screen Interface  
Keypad Interface  
The result of measurements made will be placed in the  
TSC2200s memory map and may be read by the host at any  
time. Three signals are available from the TSC2200 to indicate  
that data is available for the host to read. The DAV output  
indicates that an A/D conversion has completed and that data  
is available. The KBIRQ output indicates that a key on the  
keypad has been pressed. The PENIRQ output indicates that  
a touch has been detected on the touch screen. A typical  
application of the TSC2200 is shown in Figure 1.  
Battery Monitors  
Auxiliary Inputs  
Temperature Monitor  
Current Output D/A Converter  
+2.7V to +3.3V  
Voltage  
Regulator  
1µF  
+
LCD Contrast  
to  
0.1µF  
10µF  
TSC2200IPW  
(Optional)  
Auxiliary Input  
Auxiliary Input  
1
2
3
4
5
6
7
8
9
+VDD  
X+  
AUX1 28  
AUX2 27  
ARNG 26  
Y+  
Touch  
Screen  
25  
X–  
AOUT  
Pen Interrupt Request  
Serial Data Out  
Data Available  
Serial Data In  
Y–  
PENIRQ 24  
MISO 23  
DAV 22  
MOSI 21  
SS 20  
GND  
VBAT1  
VBAT2  
VREF  
Slave Select  
1µF  
+
to  
0.1µF  
Serial Clock  
10 KBIRQ  
11 R1  
SCLK 19  
C4 18  
10µF  
Keypad  
(Optional)  
RRNG  
12 R2  
C3 17  
13 R3  
C2 16  
14 R4  
C1 15  
Keyboard Interrupt Request  
Main  
Battery  
Secondary  
Battery  
FIGURE 1. Typical Circuit Configuration.  
8
TSC2200  
www.ti.com  
SBAS191F  
OPERATIONTOUCH SCREEN  
fore, the 8-bit resolution mode is recommended (however,  
calculations will be shown with the 12-bit resolution mode).  
There are several different ways of performing this measure-  
ment. The TSC2200 supports two methods. The first method  
requires knowing the X-plate resistance, measurement of the  
X-position, and two additional cross panel measurements (Z2  
and Z1) of the touch screen, as seen in Figure 3. Using  
Equation 1 will calculate the touch resistance:  
A resistive touch screen works by applying a voltage across  
a resistor network and measuring the change in resistance at  
a given point on the matrix where a screen is touched by an  
input stylus, pen, or finger. The change in the resistance ratio  
marks the location on the touch screen.  
The TSC2200 supports the resistive 4-wire configurations  
(see Figure 1). The circuit determines location in two coordi-  
nate pair dimensions, although a third dimension can be  
added for measuring pressure.  
X-Position Z2  
R
TOUCH = RX-Plate  
1  
(1)  
4096  
Z1  
THE 4-WIRE TOUCH SCREEN COORDINATE  
PAIR MEASUREMENT  
Measure X-Position  
X+  
Y+  
A 4-wire touch screen is constructed as shown in Figure 2.  
It consists of two transparent resistive layers separated by  
insulating spacers.  
Touch  
X-Position  
X–  
Conductive Bar  
Y–  
Transparent  
Conductor (ITO)  
Transparent  
Conductor (ITO)  
Bottom Side  
Measure Z1-Position  
Top Side  
Y+  
X+  
Y+  
X+  
Touch  
Z1-Position  
X–  
Y–  
Silver  
Ink  
X–  
Y+  
X+  
Y–  
Touch  
Insulating  
Material  
(Glass)  
Z2-Position  
ITO = Indium Tin Oxide  
X–  
Y–  
Measure Z2-Position  
FIGURE 2. 4-Wire Touch Screen Construction.  
FIGURE 3. Pressure Measurement.  
The 4-wire touch screen panel works by applying a voltage  
across the vertical or horizontal resistive network. The A/D  
converter converts the voltage measured at the point the  
panel is touched. A measurement of the Y-position of the  
pointing device is made by connecting the X+ input to a data  
converter chip, turning on the Y+ and Ydrivers, and  
digitizing the voltage seen at the X+ input. The voltage  
measured is determined by the voltage divider developed at  
the point of touch. For this measurement, the horizontal  
panel resistance in the X+ lead does not affect the conver-  
sion due to the high input impedance of the A/D converter.  
The second method requires knowing both the X-plate and  
Y-plate resistance, measurement of X-position and Y-posi-  
tion, and Z1. Using Equation 2 will also calculate the touch  
resistance:  
(2)  
X -Position 4096  
Y -Position  
RTOUCH = RX-Plate  
1 RY-Plate 1−  
4096  
Z1  
4096  
When the touch panel is pressed or touched, and the drivers  
to the panel are turned on, the voltage across the touch panel  
will often overshoot and then slowly settle (decay) down to a  
stable DC value. This is due to mechanical bouncing which  
is caused by vibration of the top layer sheet of the touch  
panel when the panel is pressed. This settling time must be  
accounted for, or else the converted value will be in error.  
Therefore, a delay must be introduced between the time the  
driver for a particular measurement is turned on, and the time  
measurement is made.  
Voltage is then applied to the other axis, and the A/D  
converter converts the voltage representing the X-position on  
the screen. This provides the X- and Y-coordinates to the  
associated processor.  
Measuring touch pressure (Z) can also be done with the  
TSC2200. To determine pen or finger touch, the pressure of  
the touchneeds to be determined. Generally, it is not  
necessary to have very high performance for this test, there-  
TSC2200  
SBAS191F  
9
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In some applications, external capacitors may be required  
across the touch screen for filtering noise picked up by the  
touch screen; i.e., noise generated by the LCD panel or  
back-light circuitry. The value of these capacitors will provide  
a low-pass filter to reduce the noise, but will cause an  
additional settling time requirement when the panel is touched.  
The TSC2200 touch screen interface can measure position (X  
and Y) and pressure (Z). Determination of these coordinates  
is possible under three different modes of the A/D converter:  
conversion controlled by the TSC2200, initiated by detection  
of a touch; conversion controlled by the TSC2200, initiated by  
the host responding to the PENIRQ signal; or conversion  
completely controlled by the host processor.  
Several solutions to this problem are available in the TSC2200.  
A programmable delay time is available that sets the delay  
between turning the drivers on and making a conversion.  
This is referred to as the Panel Voltage Stabilization time,  
and is used in some of the modes available in the TSC2200.  
In other modes, the TSC2200 can be commanded to turn on  
the drivers only without performing a conversion. Time can  
then be allowed before a conversion is started.  
A/D CONVERTER  
The analog inputs of the TSC2200 are shown in Figure 4. The  
analog inputs (X, Y, and Z touch panel coordinates, battery  
voltage monitors, chip temperature, and auxiliary inputs) are  
provided via a multiplexer to the Successive Approximation  
Register (SAR) A/D converter. The A/D converter architecture  
is based on capacitive redistribution architecture that inher-  
ently includes a sample-and-hold function.  
+VDD  
VREF  
TEMP1  
TEMP0  
X+  
X–  
Ref ON/OFF  
Y+  
+REF  
+IN  
Y–  
Converter  
IN  
2.5V  
REF  
Reference  
7.5k  
7.5kΩ  
VBAT1  
VBAT2  
2.5kΩ  
2.5kΩ  
Battery  
On  
Battery  
On  
AUX1  
AUX2  
GND  
FIGURE 4. Simplified Diagram of the Analog Input Section.  
TSC2200  
10  
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SBAS191F  
A unique configuration of low on-resistance switches allows  
an unselected A/D converter input channel to provide power  
and an accompanying pin to provide ground for driving the  
touch panel. By maintaining a differential input to the con-  
verter and a differential reference input architecture, it is  
possible to negate errors caused by the driver switch on-  
resistances.  
ing the conversions at lower resolutions reduces the amount of  
time it takes for the A/D converter to complete its conversion  
process, which lowers power consumption.  
Conversion Clock and Conversion Time  
The TSC2200 contains an internal 8MHz clock, which is used  
to drive the state machines inside the device that perform the  
many functions of the part. This clock is divided down to  
provide a clock to run the A/D converter. The division ratio for  
this clock is set in the A/D Converter Control Register. The  
ability to change the conversion clock rate allows the user to  
choose the optimal value for resolution, speed, and power. If  
the 8MHz clock is used directly, the A/D converter is limited to  
8-bit resolution; using higher resolutions at this speed will not  
result in accurate conversions. Using a 4MHz conversion  
clock is suitable for 10-bit resolution; 12-bit resolution requires  
that the conversion clock run at 1MHz or 2MHz.  
The A/D converter is controlled by an A/D Converter Control  
Register. Several modes of operation are possible, depend-  
ing upon the bits set in the control register. Channel selec-  
tion, scan operation, averaging, resolution, and conversion  
rate may all be programmed through this register. These  
modes are outlined in the sections below for each type of  
analog input. The results of conversions made are stored in  
the appropriate result register.  
Data Format  
The TSC2200 output data is in Straight Binary format, as  
shown in Figure 5. This figure shows the ideal output code for  
the given input voltage and does not include the effects of  
offset, gain, or noise.  
Regardless of the conversion clock speed, the internal clock  
will run nominally at 8MHz. The conversion time of the  
TSC2200 is dependent upon several functions. Although the  
conversion clock speed plays an important role in the time it  
takes for a conversion to complete, a certain number of  
internal clock cycles is needed for proper sampling of the  
signal. Moreover, additional times, such as the Panel Voltage  
Stabilization time, can add significantly to the time it takes to  
perform a conversion. Conversion time can vary depending  
upon the mode in which the TSC2200 is used. Throughout  
this data sheet, internal and conversion clock cycles will be  
used to describe the times that many functions take. In  
considering the total system design, these times must be  
taken into account by the user.  
(1)  
FS = Full-Scale Voltage = VREF  
1LSB = VREF(1)/4096  
1LSB  
11...111  
11...110  
11...101  
Touch Detect  
00...010  
00...001  
00...000  
The pen interrupt (PENIRQ) output function is detailed in  
Figure 6. While in the power-down mode, the Ydriver is ON  
and connected to GND and the PENIRQ output is connected  
to the X+ input. When the panel is touched, the X+ input is  
0V  
FS 1LSB  
Input Voltage(2) (V)  
NOTES: (1) Reference voltage at converter: +REF (REF). See Figure 4.  
(2) Input voltage at converter, after multiplexer: +IN (IN). See Figure 4.  
PENIRQ  
VDD  
VDD  
FIGURE 5. Ideal Input Voltages and Output Codes.  
TEMP1  
TEMP2  
50k  
Y+  
HIGH Except  
when TEMP1,  
Reference  
TEMP2 Activated  
TEMP  
DIODE  
The TSC2200 has an internal voltage reference that can be  
set to 1.25V or 2.5V, through the Reference Control Register.  
X+  
The internal reference voltage is only used in the single-  
ended mode for battery monitoring, temperature measure-  
ment, and for utilizing the auxiliary inputs. Optimal touch  
screen performance is achieved when using a ratiometric  
conversion, thus all touch screen measurements are done  
automatically in the differential mode. An external reference  
can also be applied to the VREF pin, and the internal refer-  
ence can be turned off.  
Y–  
ON  
Y+ or X+ Drivers On,  
or TEMP1, TEMP2  
Measurements Activated  
Variable Resolution  
FIGURE 6. PENIRQ Functional Block Diagram.  
The TSC2200 provides three different resolutions for the A/D  
converter: 8-, 10-, or 12-bits. Lower resolutions are often  
practical for measurements such as touch pressure. Perform-  
TSC2200  
SBAS191F  
11  
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pulled to ground through the touch screen and PENIRQ  
output goes LOW due to the current path through the panel  
to GND, initiating an interrupt to the processor. During the  
measurement cycles for the X- and Y-positions, the X+ input  
will be disconnected from the PENIRQ pull-down transistor to  
eliminate any leakage current from the pull-up resistor to flow  
through the touch screen, thus causing no errors.  
The idle state of the serial clock for the TSC2200 is LOW,  
which corresponds to a clock polarity setting of 0 (typical  
microprocessor SPI control bit CPOL = 0). The TSC2200  
interface is designed so that with a clock phase bit setting of  
1 (typical microprocessor SPI control bit CPHA = 1), the  
master begins driving its MOSI pin and the slave begins  
driving its MISO pin on the first serial clock edge. The SS pin  
should idle HIGH between transmissions. The TSC2200 will  
only interpret command words that are transmitted after the  
In modes where the TSC2200 needs to detect if the screen  
is still touched (for example, when doing a PENIRQ-initiated  
X, Y, and Z conversion), the TSC2200 must reset the drivers  
so that the 50kresistor is connected again. Due to the high  
value of this pull-up resistor, any capacitance on the touch  
screen inputs will cause a long delay time, and may prevent  
the detection from occurring correctly. To prevent this, the  
TSC2200 has a circuit that allows any screen capacitance to  
be precharged, so that the pull-up resistor does not have to  
be the only source for the charging current. The time allowed  
for this precharge, as well as the time needed to sense if the  
screen is still touched, can be set in the Configuration Control  
register.  
falling edge of SS  
.
TSC2200 COMMUNICATION PROTOCOL  
The TSC2200 is entirely controlled by registers. Reading and  
writing these registers is accomplished by the use of a 16-bit  
command, which is sent prior to the data for that register. The  
command is constructed as shown in Table I.  
The command word begins with an R/W bit, which specifies  
the direction of data flow on the serial bus. The following four  
bits specify the page of memory this command is directed to,  
as shown in Table II. The next six bits specify the register  
address on that page of memory to which the data is  
directed. The last five bits are reserved for future use.  
This illustrates the need to use the minimum capacitor values  
possible on the touch screen inputs. These capacitors may  
be needed to reduce noise, but too large a value will increase  
the needed precharge and sense times, as well as panel  
voltage stabilization time.  
PG3  
PG2  
PG1  
PG0  
PAGE ADDRESSED  
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DIGITAL INTERFACE  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
The TSC2200 communicates through a standard SPI bus.  
The SPI allows full-duplex, synchronous, serial communica-  
tion between a host processor (the master) and peripheral  
devices (slaves). The SPI master generates the synchroniz-  
ing clock and initiates transmissions. The SPI slave devices  
depend on a master to start and synchronize transmissions.  
A transmission begins when initiated by a master SPI. The  
byte from the master SPI begins shifting in on the slave  
MOSI pin under the control of the master serial clock. As the  
byte shifts in on the MOSI pin, a byte shifts out on the MISO  
pin to the master shift register.  
TABLE II. Page Addressing.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12  
BIT 11 BIT 10  
BIT 9  
BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
R/W PG3 PG2 PG1  
PG0  
ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0  
X
X
X
X
X
TABLE I. TSC2200 Command Word.  
TSC2200  
12  
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SBAS191F  
To read all the first page of memory, for example, the host  
processor must send the TSC2200 the command 8000Hthis  
specifies a read operation beginning at Page 0, Address 0. The  
processor can then start clocking data out of the TSC2200. The  
TSC2200 will automatically increment its address pointer to the  
end of the page; if the host processor continues clocking data  
out past the end of a page, the TSC2200 will simply send back  
the value FFFFH.  
PAGE 0: DATA REGISTERS  
PAGE 1: CONTROL REGISTERS  
ADDR  
REGISTER  
ADDR  
REGISTER  
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
1A  
1B  
1C  
1D  
1E  
1F  
X
Y
Z1  
Z2  
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
1A  
1B  
1C  
1D  
1E  
1F  
ADC  
KEY  
DACCTL  
REF  
RESET  
KPDATA  
BAT1  
BAT2  
AUX1  
AUX2  
CONFIG  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
KPMASK  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Likewise, writing to Page 1 of memory would consist of the  
processor writing the command 0800H, which would specify a  
write operation, with PG0 set to 1, and all the ADDR bits set  
to 0. This would result in the address pointer pointing at the  
first location in memory on Page 1. See the TSC2200 Memory  
Map section for details of register locations. Figure 7 shows an  
example of a complete data transaction between the host  
processor and the TSC2200.  
TEMP1  
TEMP2  
DAC  
Reserved  
Reserved  
Reserved  
Reserved  
ZERO  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
TSC2200 MEMORY MAP  
The TSC2200 has several 16-bit registers that allow control of  
the device as well as provide a location for results from the  
TSC2200 to be stored until read by the host microprocessor.  
These registers are separated into two pages of memory in the  
TSC2200: a Data page (Page 0) and a Control page (Page 1).  
The memory map is shown in Table III.  
TABLE III. TSC2200 Memory Map.  
Write Operation  
SS  
Read Operation  
SCLK  
MOSI  
MISO  
Command Word  
Data  
Command Word  
Data  
Data  
FIGURE 7. Write and Read Operation of TSC2200 Interface.  
TSC2200  
SBAS191F  
13  
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the TSC2200, bits in control registers may refer to slightly  
different functions depending upon if you are reading the  
register or writing to it. A summary of all registers and bit  
locations is shown in Table IV.  
TSC2200 CONTROL REGISTERS  
This section will describe each of the registers that were  
shown in the memory map of Table III. The registers are  
grouped according to the function they control. Note that in  
RESET  
VALUE  
ADDR REGISTER  
PAGE  
(HEX)  
NAME  
D15 D14  
D13 D12 D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
(HEX)  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
1A  
1B  
1C  
1D  
1E  
1F  
00  
01  
02  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
0D  
0E  
0F  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
1A  
1B  
1C  
1D  
1E  
1F  
X
Y
Z1  
Z2  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R11  
R11  
R11  
R11  
R10  
R10  
R10  
R10  
K10  
R10  
R10  
R10  
R10  
R10  
R10  
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R9  
R9  
R9  
R9  
K9  
R9  
R9  
R9  
R9  
R9  
R9  
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R8  
R8  
R8  
R8  
K8  
R8  
R8  
R8  
R8  
R8  
R8  
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R7  
R7  
R7  
R7  
K7  
R7  
R7  
R7  
R7  
R7  
R7  
D7  
1
1
1
1
0
1
1
1
1
R6  
R6  
R6  
R6  
K6  
R6  
R6  
R6  
R6  
R6  
R6  
D6  
1
1
1
1
0
1
1
1
1
R5  
R5  
R5  
R5  
K5  
R5  
R5  
R5  
R5  
R5  
R5  
D5  
1
1
1
1
0
1
1
1
1
R4  
R4  
R4  
R4  
K4  
R4  
R4  
R4  
R4  
R4  
R4  
D4  
1
1
1
1
0
1
1
1
1
R3  
R3  
R3  
R3  
K3  
R3  
R3  
R3  
R3  
R3  
R3  
D3  
1
1
1
1
0
1
1
1
1
R2  
R2  
R2  
R2  
K2  
R2  
R2  
R2  
R2  
R2  
R2  
D2  
1
1
1
1
0
1
1
1
1
R1  
R1  
R1  
R1  
K1  
R1  
R1  
R1  
R1  
R1  
R1  
D1  
1
1
1
1
0
1
1
1
1
R0  
R0  
R0  
R0  
K0  
R0  
R0  
R0  
R0  
R0  
R0  
D0  
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
x
X
0
0000  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
0000  
007F  
FFFF  
FFFF  
FFFF  
FFFF  
0000  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
4000  
4000  
8000  
0002  
FFFF  
FFC0  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
0000  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
FFFF  
KPDATA  
BAT1  
BAT2  
AUX1  
AUX2  
TEMP1  
TEMP2  
DAC  
Reserved  
Reserved  
Reserved  
Reserved  
ZERO  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
ADC  
K15 K14  
K13 K12 K11  
0
0
0
0
0
0
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R11  
R11  
R11  
R11  
R11  
R11  
X
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
PSM STS AD3 AD2 AD1 AD0 RS1 RS0 AV1 AV0 CL1 CL0 PV2 PV1 PV0  
STC SCS DB2 DB1 DB0  
DPD  
X
1
1
1
1
1
1
1
1
1
1
1
1
KEY  
DACCTL  
REF  
X
0
X
0
1
1
1
1
1
1
1
1
1
1
1
X
0
X
1
1
1
1
1
1
1
1
1
1
1
1
X
0
X
1
1
1
1
1
1
1
1
1
1
1
1
M8  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
0
X
X
1
1
1
1
1
1
1
1
1
1
1
M7  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
0
X
X
X
0
X
X
X
0
INT  
X
X
0
X
0
X
0
0
X
0
1
1
1
1
1
1
1
1
1
1
1
0
X
1
1
1
1
1
1
1
1
1
1
1
1
0
X
1
1
1
1
1
1
1
1
1
1
1
1
0
X
1
1
1
1
1
1
1
1
1
1
1
1
DL1 DL0 PND RFV  
X
RESET  
X
X
X
CONFIG  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
KPMASK  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
DAVB PR2 PR1 PR0 SN2 SN1 SN0  
1
1
1
1
1
1
1
1
1
1
M6  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M5  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M4  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M3  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M2  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M1  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M0  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
M15 M14 M13 M12 M11 M10 M9  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NOTE: X = Dont Care.  
TABLE IV. Register Summary for TSC2200.  
TSC2200  
14  
www.ti.com  
SBAS191F  
TSC2200 A/D CONVERTER CONTROL REGISTER  
(PAGE 1, ADDRESS 00H)  
lifted or the process is stopped. Continuous scans or conver-  
sions can be stopped by writing a 1 to this bit. This will  
immediately halt a conversion (even if the pen is still down)  
and cause the A/D converter to power down. The default  
state is continuous conversions, but if this bit is read after a  
reset or power-up, it will read 1.  
The A/D converter in the TSC2200 is shared between all the  
different functions. A control register determines which input  
is selected, as well as other options. The result of the  
conversion is placed in one of the result registers in Page 0  
of memory, depending upon the function selected.  
STS  
The A/D Converter Control Register controls several aspects  
of the A/D converter. The register is formatted as shown in  
Table VI.  
READ/WRITE VALUE  
DESCRIPTION  
Read  
Read  
Write  
Write  
0
1
0
1
Converter is Busy  
Conversions are Complete, Data is Available  
Normal Operation  
Bit 15: PSMPen Status/Control Mode. Reading this bit  
allows the host to determine if the screen is touched. Writing  
to this bit determines the mode used to read coordinates:  
host controlled, or under control of the TSC2200 responding  
to a screen touch. When reading, the PENSTS bit indicates  
if the pen is down or not. When writing to this register, this bit  
determines if the TSC2200 controls the reading of coordi-  
nates, or if the coordinate conversions are host-controlled.  
The default state is host-controlled conversions (0).  
Stop Conversion and Power Down  
TABLE VII. STS Bit Operation.  
Bits [13:10]: AD3AD0A/D Converter Function Select.  
These bits control which input is to be converted, and what  
mode the converter is placed in. These bits are the same  
whether reading or writing. A complete listing of how these  
bits are used is shown in Table VIII.  
Bits[9:8]: RS1, RS0Resolution Control. The A/D converter  
resolution is specified with these bits. A description of these  
bits is shown in Table IX. These bits are the same whether  
reading or writing.  
PSM  
READ/WRITE  
VALUE  
DESCRIPTION  
Read  
Read  
Write  
Write  
0
1
0
1
No Screen Touch Detected  
Screen Touch Detected  
Conversions Controlled by Host  
Conversions Controlled by TSC2200  
RS1  
RS0  
FUNCTION  
TABLE V. PSM Bit Operation.  
0
0
1
1
0
1
0
1
12-Bit Resolution. Power up and reset default.  
8-Bit Resolution  
Bit 14: STSA/D Converter Status. When reading, this bit  
indicates if the converter is busy, or if conversions are  
complete and data is available. Writing a 0 to this bit will  
cause touch screen scans to continue until either the pen is  
10-Bit Resolution  
12-Bit Resolution  
TABLE IX. A/D Converter Resolution Control.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
AD0 RS1 RS0  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
PSM STS AD3 AD2 AD1  
AV1  
AV0  
CL1  
CL0  
PV2  
PV1  
PV0  
X
TABLE VI. A/D Converter Control Register.  
A/D3  
A/D2  
A/D1  
A/D0  
FUNCTION  
Invalid. No registers will be updated. This is the default state after a reset.  
0
0
0
0
0
0
0
1
Touch screen scan function: X and Y coordinates converted and the results returned to the X and Y data registers.  
Scan continues until either the pen is lifted or a stop bit is sent.  
0
0
1
0
Touch screen scan function: X, Y, Z1, and Z2 coordinates converted and the results returned to the X, Y, Z1, and Z2  
data registers. Scan continues until either the pen is lifted or a stop bit is sent.  
0
0
0
0
0
1
1
1
1
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
Touch screen scan function: X coordinate converted and the results returned to the X data register.  
Touch screen scan function: Y coordinate converted and the results returned to the Y data register.  
Touch screen scan function: Z1 and Z2 coordinates converted and the results returned to the Z1 and Z2 data registers.  
Battery Input 1 converted and the results returned to the BAT1 data register.  
Battery Input 2 converted and the results returned to the BAT2 data register.  
Auxiliary Input 1 converted and the results returned to the AUX1 data register.  
Auxiliary Input 2 converted and the results returned to the AUX2 data register.  
A temperature measurement is made and the results returned to the temperature measurement 1 data register.  
Port scan function: Battery Input 1, Battery Input 2, Auxiliary Input 1, and Auxiliary Input measurements are made  
and the results returned to the appropriate data registers.  
1
1
0
0
A differential temperature measurement is made and the results returned to the temperature measurement 2 data  
register.  
1
1
1
1
1
1
0
1
1
1
0
1
Turn on X+, Xdrivers.  
Turn on Y+, Ydrivers.  
Turn on Y+, Xdrivers.  
TABLE VIII. A/D Converter Function Select.  
TSC2200  
SBAS191F  
15  
www.ti.com  
Bits[7:6]: AV1, AV0Converter Averaging Control. These  
two bits allow you to specify the number of averages the  
converter will perform, as shown in Table X. Note that when  
averaging is used, the STS bit and the DAV output will  
indicate that the converter is busy until all conversions  
necessary for the averaging are complete. The default state  
for these bits is 00, selecting no averaging. These bits are the  
same whether reading or writing.  
D/A CONVERTER CONTROL REGISTER  
(PAGE 1, ADDRESS 02H)  
The single bit in this register controls the power down control  
of the onboard D/A converter. This register is formatted as  
shown in Table XIII.  
Bit 15: DPDD/A Converter Power Down. This bit controls  
whether the D/A converter is powered up and operational, or  
powered down. If the D/A converter is powered down, the  
AOUT pin will neither sink nor source current.  
AV1  
AV0  
FUNCTION  
0
0
1
1
0
1
0
1
None  
DPD  
4 Data Averages  
8 Data Averages  
16 Data Averages  
VALUE  
DESCRIPTION  
0
1
D/A Converter is Powered and Operational  
D/A Converter is Powered Down  
TABLE X. A/D Conversion Averaging Control.  
TABLE XIV. DPD Bit Operation.  
Bits[5:4]: CL1, CL0Conversion Clock Control. These two  
bits specify the internal clock rate which the A/D converter uses  
when performing a single conversion, as shown in Table XI.  
These bits are the same whether reading or writing.  
REFERENCE REGISTER  
(PAGE 1, ADDRESS 03H)  
The TSC2200 has a register to control the operation of the  
internal reference. This register is formatted as shown in  
Table XV.  
CL1  
CL0  
FUNCTION  
0
0
1
1
0
1
0
1
8MHz Internal Clock Rate8-Bit Resolution Only  
4MHz Internal Clock Rate10-Bit Resolution Only  
2MHz Internal Clock Rate  
Bit 4: INTInternal Reference Mode. If this bit is written to a  
1, the TSC2200 will use its internal reference; if this bit is a  
zero, the part will assume an external reference is being  
supplied. The default state for this bit is to select an external  
reference (0). This bit is the same whether reading or writing.  
1MHz Internal Clock Rate  
TABLE XI. A/D Converter Clock Control.  
Bits [3:1]: PV2 PV0Panel Voltage Stabilization Time  
control. These bits allow you to specify a delay time from the  
time a pen touch is detected to the time a conversion is  
started. This allows you to select the appropriate settling time  
for the touch panel used. Table XII shows the settings of  
these bits. The default state is 000, indicating a 0ms stabili-  
zation time. These bits are the same whether reading or  
writing.  
INT  
VALUE  
DESCRIPTION  
0
1
External Reference Selected  
Internal Reference Selected  
TABLE XVI. INT Bit Operation.  
Bits [3:2]: DL1, DL0Reference Power-Up Delay. When  
the internal reference is powered up, a finite amount of time  
is required for the reference to settle. If measurements are  
made before the reference has settled, these measurements  
will be in error. These bits allow for a delay time for measure-  
ments to be made after the reference powers up, thereby  
assuring that the reference has settled. Longer delays will be  
necessary depending upon the capacitance present at the  
REF pin (see Typical Characteristics).  
Bit 0: This bit is not used, and is a dont carewhen writing.  
It will always read as a zero.  
PV2  
PV1  
PV0  
FUNCTION  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0µs Stabilization Time  
100µs Stabilization Time  
500µs Stabilization Time  
1ms Stabilization Time  
5ms Stabilization Time  
10ms Stabilization Time  
50ms Stabilization Time  
100ms Stabilization Time  
See Table XVII for the delays. The default state for these bits  
is 00, selecting a 0µs delay. These bits are the same whether  
reading or writing.  
TABLE XII. Panel Voltage Stabilization Time Control.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
DPD  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
TABLE XIII. D/A Converter Control Register.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
X
X
X
X
X
X
X
X
X
X
X
INT  
DL1  
DL0  
PDN  
RFV  
TABLE XV. Reference Register.  
TSC2200  
16  
www.ti.com  
SBAS191F  
the register(s) updated by the conversion have been read.  
When all updated data has been read by the host, the DAV  
pin and this bit will return to a logic 1 (HIGH).  
DL1  
DL0  
DELAY TIME  
0
0
1
1
0
1
0
1
0µs  
100µs  
500µs  
1000µs  
DAVB  
TABLE XVII. Reference Power-Up Delay Settings.  
VALUE  
DESCRIPTION  
0
Data from A/D conversion is available. This will stay at 0  
until the host has read all updated registers.  
No new data is available.  
Bit 1: PDNReference Power Down. If a 1 is written to this  
bit, the internal reference will be powered down between  
conversions. If this bit is a zero, the internal reference will be  
powered at all times. The default state is to power down the  
internal reference, so this bit will be a 1. This bit is the same  
whether reading or writing.  
1
TABLE XXII. PDN Bit Operation.  
Bits [5:3]: PRE[2:0]Precharge Time Selection. These bits  
set the amount of time allowed for precharging any pin  
capacitance on the touch screen prior to sensing if a screen  
touch is happening.  
PDN  
VALUE  
DESCRIPTION  
PRE[2:0]  
0
1
Internal Reference is Powered at All Times  
Internal Reference is Powered Down Between Conversions  
PRE2  
PRE1  
PRE0  
TIME  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
20µs  
84µs  
276µs  
340µs  
1.044ms  
1.108ms  
1.300ms  
1.364ms  
TABLE XVIII. PDN Bit Operation.  
Note that the PDN bit, in concert with the INT bit, creates a  
few possibilities for reference behavior. These are detailed in  
Table XIX.  
TABLE XXIII. Precharge Times.  
INT  
PDN  
REFERENCE BEHAVIOR  
0
0
0
1
External Reference Used, Internal Reference Powered Down  
External Reference Used, Interenal Reference Powered Down  
Bits [2:0]: SNS[2:0]Sense Time Selection. These bits set  
the amount of time the TSC2200 will wait to sense a screen  
1
1
0
1
Internal Reference Used, Always Powered Up  
touch between coordinate axis conversions in PENIRQ  
controlled mode.  
-
Internal Reference Used, Will Power Up During Conversions  
and Then Power Down  
TABLE XIX. Reference Behavior Possibilities.  
SNS[2:0]  
SNS2  
SNS1  
SNS0  
TIME  
Bit 0: RFVReference Voltage control. This bit selects the  
internal reference voltage, either 1.25V or 2.5V. The default  
value is 1.25V. This bit is the same whether reading or writing.  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
32µs  
96µs  
544µs  
608µs  
2.080ms  
2.144ms  
2.592ms  
2.656ms  
RFV  
VALUE  
DESCRIPTION  
0
1
1.25V Reference Voltage  
2.5V Reference Voltage  
TABLE XXIV. Sense Times.  
TABLE XX. RFV Bit Operation.  
TSC2200 KEYPAD REGISTERS  
TSC2200 CONFIGURATION CONTROL REGISTER  
(PAGE 1, ADDRESS 05H)  
The Keypad scanner hardware in the TSC2200 is controlled  
by two registers: the Keypad Control register and the Keypad  
Mask register. The Keypad Control register controls general  
keypad functions such as scanning and de-bouncing, whereas  
the Keypad Mask register allows certain keys to be masked  
from being detected at all.  
This control register controls the configuration of the precharge  
and sense times for the touch detect circuit. The register is  
formatted as shown in Table XXI.  
Bit 6: DAVB = Data Available. This bit mirrors the operation  
of the DAV pin. When any conversion is complete, the DAV  
pin and this bit will be a logic 0 (LOW). It will stay LOW until  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
X
X
X
X
X
X
X
X
X
X
PRE2  
PRE1  
PRE0  
SNS2  
SNS1  
SNS0  
TABLE XXI. Configuration Control Register.  
TSC2200  
SBAS191F  
17  
www.ti.com  
KEYPAD CONTROL REGISTER  
(PAGE 1, ADDRESS 01H)  
KEYPAD MASK REGISTER  
(PAGE 1, ADDRESS 10H)  
The Keypad Control register is formatted as shown in Table XXV.  
The Keypad Mask register is formatted as shown in Table XXIX.  
This is the same format as used in the Keypad Data register  
(Page 0, Address 04H). Each bit in these registers represents  
one key on the keypad. In the Mask register, if a bit is set (1),  
then that key will not be detected in keyboard scans. Pressing  
that key on the keypad will also not cause a KBIRQ, if the bit is  
set. If the bit is cleared (0), the corresponding key will be  
detected. A 16-key keypad is mapped into the Keypad Mask  
(and Keypad Data) register, as shown in Table XXX. The default  
value for this register is 0000H, detecting all key presses.  
Bit 15: STC = Keyboard Status. This bit reflects the opera-  
tion of the KBIRQ pin, with inverted logic. This bit will go  
HIGH when a key is pressed and de-bounced. The default  
value for this bit is zero.  
STC  
VALUE  
DESCRIPTION  
0
1
No Keys Are Pressed  
Keys Pressed and De-Bounced  
TABLE XXVI. STC Bit Operation.  
C1  
C2  
C3  
C4  
R1  
R2  
R3  
R4  
K0  
K4  
K8  
K1  
K5  
K9  
K2  
K6  
K10  
K14  
K3  
K7  
K11  
K15  
Bit 14: SCS = Keyboard Scan Status. When reading, this bit  
indicates if the scanner or de-bouncer is busy or if scans are  
complete and data is available. Writing a zero to this bit will  
cause keyboard scans to continue until either the key is lifted  
or the process is stopped. Continuous scans can be stopped  
by writing a 1 to this bit. This will immediately halt a conver-  
sion (even if a key is still down). The default value for this bit  
when read is 1.  
K12  
K13  
TABLE XXX. Keypad to Key Bit Mapping.  
The result of a keypad scan will appear in the Keypad Data  
register. Each bit will be set in this register, corresponding to  
the key(s) actually pressed. For example, if only KEY1 was  
pressed on a particular scan, the data in the register would  
read as 0002H; however, if keys 6, 8, and 13 were all pressed  
simultaneously on that scan, the data would read as 2140H.  
SCS  
READ/WRITE  
VALUE  
DESCRIPTION  
Read  
Read  
Write  
Write  
0
1
0
1
Scanner or De-Bouncer Busy  
Scans are Complete, Data is Available  
Normal Operation  
Multiple keys may be pressed simultaneously, and will generally  
be decoded correctly by the keypad scan circuitry. However,  
keys that land on three corners of a rectangle may cause a false  
reading of a key on the fourth corner of the rectangle. For  
example, if 0, 3, and 11 were pressed simultaneously, the  
KEY0, KEY3, and KEY11 bits will be set, but the KEY8 bit will  
also be set. Thus, when considering using multiple-key combi-  
nations in an application, try to avoid combinations that put  
three keys on the corners of a rectangle.  
Stop Scans  
TABLE XXVII. SCS Bit Operation.  
Bits [13:11]: KBDB2-KBDB0 = Keyboard De-Bounce Con-  
trol. These bits set the length of the de-bounce time for the  
keypad, as shown in Table XXVIII. The default setting is a  
2ms de-bounce time (000).  
RESET REGISTER  
(PAGE 1, ADDRESS 04H)  
KBDB2  
KBDB1  
KBDB0  
FUNCTION  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
De-Bounce: 2ms  
De-Bounce: 10ms  
De-Bounce: 20ms  
De-Bounce: 50ms  
De-Bounce: 60ms  
De-Bounce: 80ms  
De-Bounce: 100ms  
De-Bounce: 120ms  
The TSC2200 has a special register, the RESET register, which  
allows a software reset of the device. Writing the code BBXXH,  
as shown in Table XXXI, to this register will cause the TSC2200  
to reset all its registers to their default, power-up values.  
Writing any other values to this register will do nothing.  
Reading this register or any reserved register will result in  
reading back all 1s, or FFFFH.  
TABLE XXVIII. Keypad De-Bounce Control.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
STC SCS DB2 DB1 DB0  
X
X
X
X
X
X
X
X
X
X
X
TABLE XXV. Keypad Control Register.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
M10 M9 M8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
M15  
M14  
M13  
M12  
M11  
M7  
M6  
M5  
M4  
M3  
M2  
M1  
M0  
TABLE XXIX. Keypad Mask Register.  
TSC2200  
18  
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SBAS191F  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
1
0
1
1
1
0
1
1
X
X
X
X
X
X
X
X
TABLE XXXI. Reset Register.  
ZERO REGISTER  
(PAGE 0, ADDRESS 10H)  
TSC2200 DATA REGISTERS  
The data registers of the TSC2200 hold data results from  
conversions or keypad scans, or the value of the D/A converter  
output current. All of these registers default to 0000H upon  
reset, except the D/A converter register, which is set to 0080H,  
representing the midscale output of the D/A converter.  
This is a reserved data register, but instead of reading all 1s  
(FFFFH), when read will return all 0s (0000H).  
OPERATIONTOUCH SCREEN MEASUREMENTS  
As noted previously in the discussion of the A/D converter,  
several operating modes can be used, which allow great  
flexibility for the host processor. These different modes will  
now be examined.  
X, Y, Z1, Z2, BAT1, BAT2, AUX1, AUX2, TEMP1,  
AND TEMP2 REGISTERS  
The results of all A/D conversions are placed in the appro-  
priate data register (see Tables III and VIII). The data format  
of the result word, R, of these registers is right-justified, as  
shown in Table XXXII.  
Conversion Controlled by TSC2200 Initiated at  
Touch Detect  
In this mode, the TSC2200 will detect when the touch panel is  
touched and cause the PENIRQ line to go LOW. At the same  
time, the TSC2200 will start up its internal clock. It will then turn  
on the Y-drivers, and after a programmed Panel Voltage  
Stabilization time, power up the A/D converter and convert the  
Y-coordinate. If averaging is selected, several conversions  
may take place; when data averaging is complete, the Y-  
coordinate result will be stored in the Y-register.  
KEYPAD DATA REGISTER  
(PAGE 0, ADDRESS 04H)  
The Keypad Data register (Page 0, Address 04H) is format-  
ted as shown in Table XXXIII.  
This is the same format as used in the Keypad Mask register  
(Page 1, Address 10H). Each bit in these registers represents  
one key on the keypad. A 16-key keypad is mapped into the  
Keypad Data register, see Table XXIX.  
If the screen is still touched at this time, the X-drivers will be  
enabled, and the process will repeat, but instead measuring  
the X-coordinate and storing the result in the X-register.  
If only X- and Y-coordinates are to be measured, then the  
conversion process is complete. See Figure 8 for a flowchart  
for this process. The time it takes to go through this process  
depends upon the selected resolution, internal conversion  
clock rate, averaging selected, panel voltage stabilization  
time, and precharge and sense times.  
D/A CONVERTER DATA REGISTER  
(PAGE 0, ADDRESS 0BH)  
The data to be written to the D/A converter is written into the  
D/A converter data register, which is formatted as shown in  
Table XXXIV.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
R10 R9 R8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
0
0
0
0
R11  
R7  
R6  
R5  
R4  
R3  
R2  
R1  
R0  
MSB  
LSB  
TABLE XXXII. Result Data Format.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
K10 K9 K8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
K15  
K14  
K13  
K12  
K11  
K7  
K6  
K5  
K4  
K3  
K2  
K1  
K0  
TABLE XXXIII. Keypad Data Register.  
MSB  
LSB  
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11  
BIT 10 BIT 9 BIT 8  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
X
X
X
X
X
X
X
X
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
TABLE XXXIV. D/A Converter Register.  
TSC2200  
SBAS191F  
19  
www.ti.com  
The time needed to get a complete X/Y-coordinate reading  
can be calculated by:  
NBITS = Number of Bits of Resolution (see Table IX)  
fCONV = A/D Converter Clock Frequency (see Table XI)  
(3)  
If the pressure of the touch is also to be measured, the  
process will continue in the same way, but measuring the Z1  
and Z2 values, and placing them in the Z1 and Z2 registers  
(see Figure 9). As before, this process time depends upon  
the settings described above. The time for a complete X, Y,  
Z1, and Z2 coordinate reading is given by:  
1
tCOORDINATE = 2.5µs + 2 tPVS + tPRE + tSNS + 2N  
NBITS  
+ 4.4µs  
(
)
AVG  
fCONV  
where,  
tCOORDINATE = Time to Complete X/Y-Coordinate Reading  
tPVS = Panel Voltage Stabilization time (see Table XII)  
tPRE = Precharge time (see Table XXII)  
(4)  
1
tCOORDINATE = 4.75µs + 3 tPVS + tPRE + tSNS + 4N  
NBITS  
+ 4.4µs  
(
)
AVG  
tSNS = Sense time (see Table XXIII)  
fCONV  
NAVG = Number of Averages (see Table X); for no averag-  
ing, NAVG = 1  
Touch Screen Scan  
Screen  
Touch  
X and Y  
Turn On Drivers: X+, X–  
PENIRQ Initiated  
Issue Interrupt  
PENIRQ  
No  
Is Panel Voltage  
Stabilization Done  
No  
Go to Host-Controlled  
Conversion  
Is PSM = 1  
Yes  
Power Up A/D Converter  
Yes  
Start Clock  
Convert Y-Coordinates  
Turn On Drivers: Y+, Y–  
No  
No  
Is Panel Voltage  
Stabilization Done  
Is Data  
Averaging Done  
Yes  
Yes  
Store Y-Coordinates in  
Y-Register  
Power Up A/D Converter  
Convert X-Coordinates  
Power Down A/D Converter  
Issue Data Available  
Is Data  
No  
Averaging Done  
Yes  
Is Screen  
Touched  
Yes  
Store X-Coordinates in  
X-Register  
No  
Power Down A/D Converter  
Turn Off Clock  
Turn Off Clock  
Reset PENIRQ and  
Scan Trigger  
Reset PENIRQ and  
Scan Trigger  
Is Screen  
Touched  
No  
Done  
Done  
Yes  
FIGURE 8. X- and Y-Coordinate Touch Screen Scan, Initiated by Touch.  
TSC2200  
20  
www.ti.com  
SBAS191F  
Turn On Drivers: Y+, X–  
Touch Screen Scan  
X, Y, and Z  
PENIRQ Initiated  
No  
Is Panel Voltage  
Stabilization Done  
Screen  
Touch  
Yes  
Turn On Drivers: X+, X–  
Issue Interrupt  
PENIRQ  
Power Up A/D Converter  
No  
Is Panel Voltage  
Stabilization Done  
Convert Z1-Coordinates  
No  
Go to Host-Controlled  
Conversion  
Is PSM = 1  
Yes  
Yes  
No  
Is Data  
Averaging Done  
Power Up A/D Converter  
Start Clock  
Yes  
Turn On Drivers: Y+, Y–  
Convert Y-Coordinates  
Store Z1-Coordinates  
in Z1-Register  
No  
Is Panel Voltage  
Stabilization Done  
No  
Is Data  
Averaging Done  
Convert Z2-Coordinates  
Yes  
Yes  
Power Up A/D Converter  
No  
Is Data  
Averaging Done  
Store Y-Coordinates  
in Y-Register  
Convert X-Coordinates  
Yes  
Power Down A/D Converter  
Turn Off Clock  
Store Z2-Coordinates  
in Z2-Register  
No  
Is Data  
Averaging Done  
Reset PENIRQ and  
Scan Trigger  
Is Screen  
Touched  
Power Down A/D Converter  
Issue Data Available  
Yes  
Done  
Store X-Coordinates in  
X-Register  
Power Down A/D Converter  
Turn Off Clock  
Yes  
Is Screen  
Touched  
Reset PENIRQ and  
Scan Trigger  
No  
No  
Is Screen  
Touched  
Turn Off Clock  
Done  
Yes  
Reset PENIRQ and  
Scan Trigger  
Done  
FIGURE 9. X- Y- and Z-Coordinate Touch Screen Scan, Initiated by Touch.  
TSC2200  
SBAS191F  
21  
www.ti.com  
Conversion Controlled by TSC2200 Initiated By  
Host Responding to PENIRQ  
scan functions. The conversion process then proceeds as  
described above, and as outlined in Figures 10 through 14.  
The main difference between this mode and the previous  
mode is that the host, not the TSC2200, decides when the  
touch screen scan begins.  
In this mode, the TSC2200 will detect when the touch panel is  
touched and cause the PENIRQ line to go LOW. The host will  
recognize the interrupt request, and then write to the A/D  
Converter Control register to select one of the touch screen  
Screen  
Touch  
Touch Screen Scan  
X and Y  
Host Initiated  
Issue Interrupt  
PENIRQ  
No  
Go to Host-Controlled  
Is PSM = 1  
Conversion  
Done  
Host Writes A/D  
Converter  
Turn On Drivers: X+, X–  
Control Register  
Reset PENIRQ  
Start Clock  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
Turn On Drivers: Y+, Y–  
Convert Y-Coordinates  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
No  
Is Data  
Averaging Done  
Power Up A/D Converter  
Yes  
Convert X-Coordinates  
Store Y-Coordinates  
in Y-Register  
Is Data  
Averaging Done  
No  
Power Down A/D Converter  
Issue Data Available  
Yes  
Store X-Coordinates in  
X-Register  
Is Screen  
Touched  
Yes  
Power Down A/D Converter  
Turn Off Clock  
No  
Is Screen  
Touched  
Turn Off Clock  
No  
Reset PENIRQ and  
Scan Trigger  
Done  
Done  
Yes  
FIGURE 10. X- and Y-Coordinate Touch Screen Scan, Initiated by Host.  
TSC2200  
22  
www.ti.com  
SBAS191F  
Screen  
Touch  
Touch Screen Scan  
X, Y, and Z  
Turn On Drivers: Y+, X–  
Host Initiated  
Issue Interrupt  
PENIRQ  
No  
Is Panel Voltage  
Stabilization Done  
No  
Go to Host-Controlled  
Conversion  
Is PSM = 1  
Turn On Drivers: X+, X–  
Yes  
Power Up A/D Converter  
Done  
No  
Is Panel Voltage  
Stabilization Done  
Host Writes A/D  
Converter  
Convert Z1-Coordinates  
Control Register  
Yes  
Reset PENIRQ  
Start Clock  
Power Up A/D Converter  
No  
Is Data  
Averaging Done  
Convert Y-Coordinates  
Yes  
Store Z1-Coordinates  
in Z1-Register  
Turn On Drivers: Y+, Y–  
No  
Is Data  
Averaging Done  
Convert Z2-Coordinates  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
Store Y-Coordinates  
in Y-Register  
Yes  
No  
Is Data  
Averaging Done  
Power Up A/D Converter  
Power Down A/D Converter  
Yes  
Turn Off Clock  
Convert X-Coordinates  
Store Z2-Coordinates  
in Z2-Register  
Reset PENIRQ and  
Scan Trigger  
Is Screen  
Touched  
No  
Is Data  
Averaging Done  
No  
Power Down A/D Converter  
Issue Data Available  
Done  
Yes  
Yes  
Store X-Coordinates in  
X-Register  
Is Screen  
Touched  
Yes  
Power Down A/D Converter  
Turn Off Clock  
No  
Is Screen  
Touched  
Turn Off Clock  
No  
Reset PENIRQ and  
Scan Trigger  
Done  
Done  
Yes  
FIGURE 11. X-, Y-, and Z-Coordinate Touch Screen Scan, Initiated by Host.  
TSC2200  
SBAS191F  
23  
www.ti.com  
Screen  
Touch  
Touch Screen Scan  
X-Coordinate  
Host Initiated  
Issue Interrupt  
PENIRQ  
No  
Go to Host-Controlled  
Is PSM = 1  
Convert X-Coordinates  
Conversion  
Done  
No  
Is Data  
Averaging Done  
Host Writes A/D  
Converter  
Control Register  
Yes  
Reset PENIRQ  
Store X-Coordinates  
in X-Register  
No  
Power Down A/D Converter  
Issue Data Available  
Start Clock  
Are Drivers On  
Yes  
Turn On Drivers: Y+, Y–  
Turn Off Clock  
Done  
Start Clock  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
FIGURE 12. X-Coordinate Reading Initiated by Host.  
24  
TSC2200  
www.ti.com  
SBAS191F  
Screen  
Touch  
Touch Screen Scan  
Y-Coordinate  
Issue Interrupt  
PENIRQ  
Host Initiated  
No  
Go to Host-Controlled  
Is PSM = 1  
Store Y-Coordinates  
in Y-Register  
Conversion  
Done  
Power Down A/D Converter  
Issue Data Available  
Host Writes A/D  
Converter  
Control Register  
Reset PENIRQ  
Turn Off Clock  
Done  
No  
Start Clock  
Are Drivers On  
Yes  
Turn On Drivers: X+, X–  
Start Clock  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
Convert Y-Coordinates  
No  
Is Data  
Averaging Done  
Yes  
FIGURE 13. Y-Coordinate Reading Initiated by Host.  
TSC2200  
SBAS191F  
25  
www.ti.com  
Screen  
Touch  
Touch Screen Scan  
Z-Coordinate  
Issue Interrupt  
PENIRQ  
Host Initiated  
No  
Go to Host-Controlled  
Is PSM = 1  
Conversion  
Convert Z2-Coordinates  
Done  
Host Writes A/D  
Converter  
Control Register  
Is Data  
Averaging Done  
No  
Reset PENIRQ  
Are Drivers On  
Yes  
Store Z2-Coordinates  
in Z2-Register  
No  
Start Clock  
Power Down A/D Converter  
Issue Data Available  
Turn Off Clock  
Done  
Turn On Drivers: Y+, X–  
Yes  
Start Clock  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
Convert Z1-Coordinates  
Is Data  
No  
Averaging Done  
Yes  
Store Z1-Coordinates  
in Z1-Register  
FIGURE 14. Z-Coordinate Reading Initiated by Host.  
26  
TSC2200  
www.ti.com  
SBAS191F  
Conversion Controlled by the Host  
The process is then repeated for Y- and Z-coordinates. The  
processes are outlined in Figures 15 through 17.  
In this mode, the TSC2200 will detect when the touch panel  
is touched and cause the PENIRQ line to go LOW. The host  
will recognize the interrupt request. Instead of starting a  
sequence in the TSC2200 which then reads each coordinate  
in turn, the host now must control all aspects of the conver-  
sion. Generally, upon receiving the interrupt request, the host  
will turn on the Y-drivers. After waiting for the settling time,  
the host will then address the TSC2200 again, this time  
requesting an X-coordinate conversion.  
The time needed to convert any single coordinate under host  
control (not including the time needed to send the command  
over the SPI bus) is given by:  
(5)  
1
tCOORDINATE = 2.125µs + tPVS + NAVG NBITS  
+ 4.4µs  
fCONV  
Host-Controlled  
X-Coordinate  
Host Writes A/D  
Converter-  
Control Register  
Screen  
Touch  
Issue Interrupt  
PENIRQ  
No  
Start Clock  
Are Drivers On  
No  
Go to Host-Controlled  
Conversion  
Yes  
Is PSM = 1  
Turn On Drivers: Y+, Y–  
Start Clock  
Done  
Host Writes A/D  
Converter  
Control Register  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
Convert X-Coordinates  
No  
Reset PENIRQ  
Turn On Drivers: Y+, Y–  
Done  
No  
Is Data  
Averaging Done  
Yes  
Store X-Coordinates  
in X-Register  
Power Down A/D Converter  
Issue Data Available  
Turn Off Clock  
Done  
FIGURE 15. X-Coordinate Reading Controlled by Host.  
TSC2200  
SBAS191F  
27  
www.ti.com  
Host-Controlled  
Y-Coordinate  
Host Writes A/D  
Converter  
Control Register  
Screen  
Touch  
Issue Interrupt  
PENIRQ  
No  
Start Clock  
Are Drivers On  
No  
Go to Host-Controlled  
Conversion  
Yes  
Is PSM = 1  
Turn On Drivers: X+, X–  
Start Clock  
Done  
Host Writes A/D  
Converter  
Control Register  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
Convert Y-Coordinate  
No  
Reset PENIRQ  
Turn On Drivers: X+, X–  
Done  
No  
Is Data  
Averaging Done  
Yes  
Store Y-Coordinates  
in Y-Register  
Power Down A/D Converter  
Issue Data Available  
Turn Off Clock  
Done  
FIGURE 16. Y-Coordinate Reading Controlled by Host.  
28  
TSC2200  
www.ti.com  
SBAS191F  
Screen  
Touch  
Host-Controlled  
Z-Coordinate  
Issue Interrupt  
PENIRQ  
No  
Convert Z2-Coordinates  
Go to Host-Controlled  
Is PSM = 1  
Conversion  
Done  
No  
Is Data  
Averaging Done  
Host Writes A/D  
Converter  
Control Register  
Yes  
Reset PENIRQ  
Turn On Drivers: Y+, X–  
Done  
Store Z2-Coordinates  
in Z2-Register  
Power Down A/D Converter  
Issue Data Available  
Host Writes A/D  
Converter  
Control Register  
Turn Off Clock  
Done  
Reset PENIRQ  
No  
Is Data  
Averaging Done  
Start Clock  
Turn On Drivers: Y+, X–  
Yes  
Start Clock  
No  
Is Panel Voltage  
Stabilization Done  
Yes  
Power Up A/D Converter  
Convert Z1-Coordinates  
No  
Is Data  
Averaging Done  
Yes  
Store Z1-Coordinates  
in Z1-Register  
FIGURE 17. Z-Coordinate Reading Controlled by Host.  
TSC2200  
SBAS191F  
29  
www.ti.com  
OPERATIONTEMPERATURE MEASUREMENT  
Host Writes  
A/D Converter  
Control Register  
In some applications, such as battery recharging, a measure-  
ment of ambient temperature is required. The temperature  
measurement technique used in the TSC2200 relies on the  
characteristics of a semiconductor junction operating at a  
fixed current level. The forward diode voltage (VBE) has a  
well-defined characteristic versus temperature. The ambient  
temperature can be predicted in applications by knowing the  
25°C value of the VBE voltage and then monitoring the delta  
of that voltage as the temperature changes.  
Temperature Input 1  
Start Clock  
Power Up Reference  
Power Up  
A/D Converter  
Power Down  
A/D Converter  
The TSC2200 offers two modes of temperature measurement.  
The first mode requires calibration at a known temperature, but  
only requires a single reading to predict the ambient tempera-  
ture. A diode, shown in Figure 18, is used during this measure-  
ment cycle. This voltage is typically 600mV at +25°C with a  
20µA current through it. The absolute value of this diode voltage  
can vary by a few millivolts; the temperature coefficient (TC) of  
this voltage is very consistent at 2.1mV/°C. During the final test  
of the end product, the diode voltage would be stored at a  
known room temperature, in system memory, for calibration  
purposes by the user. The result is an equivalent temperature  
measurement resolution of 0.3°C/LSB. This measurement of  
what is referred to as Temperature 1 is illustrated in Figure 19.  
Convert  
Temperature Input 1  
Power Down Reference  
Issue Data Available  
Is Data  
Averaging Done  
No  
Turn Off Clock  
Done  
Yes  
Store Temperature  
Input 1 in TEMP1  
Register  
FIGURE 19. Single Temperature Measurement Mode.  
X+  
A/D  
MUX  
Converter  
Host Writes  
A/D Converter  
Control Register  
Temperature Input 2  
Start Clock  
Temperature Select  
TEMP0 TEMP1  
Power Up Reference  
FIGURE 18. Functional Block Diagram of Temperature  
Measurement Mode.  
Power Up  
A/D Converter  
Power Down  
A/D Converter  
The second mode does not require a test temperature  
calibration, but uses a two-measurement (differential) method  
to eliminate the need for absolute temperature calibration  
and for achieving 2°C/LSB accuracy. This mode requires a  
second conversion with a 91 times larger current. The  
voltage difference between the first (TEMP1) and second  
(TEMP2) conversion, using 91 times the bias current, will be  
represented by kT/q ln (N), where N is the current  
ratio = 91, k = Boltzmanns constant (1.38054 10-23  
electrons volts/degrees Kelvin), q = the electron charge  
(1.602189 10-19 °C), and T = the temperature in degrees  
Kelvin. This method can provide much improved absolute  
temperature measurement, but less resolution of 2°C/LSB.  
The resultant equation for solving for °K is:  
Convert  
Temperature Input 2  
Power Down Reference  
Issue Data Available  
Is Data  
Averaging Done  
No  
Turn Off Clock  
Done  
Yes  
Store Temperature  
Input 2 in TEMP2  
Register  
q V  
FIGURE 20. Additional Temperature Measurement for Differential  
Temperature Reading.  
°K =  
(6)  
k ln(N)  
where,  
V = V I V I  
in mV  
(
)
(
)
( )  
91  
1
°K = 2.573V°K/mV  
°C = 2.573 • ∆V mV 273°K  
(
)
Figure 20 shows the Temperature 2 measurement.  
TSC2200  
30  
www.ti.com  
SBAS191F  
OPERATIONBATTERY MEASUREMENT  
Host Writes  
A/D Converter  
Control Register  
An added feature of the TSC2200 is the ability to monitor the  
battery voltage on the other side of a voltage regulator  
(DC/DC converter), as shown in Figure 21. The battery  
voltage can vary from 0.5V to 6V while maintaining the  
voltage to the TSC2200 at 2.7V, 3.3V, etc. The input voltage  
(VBAT1 or VBAT2 ) is divided down by 4 so that a 6.0V battery  
voltage is represented as 1.5V to the A/D converter. This  
simplifies the multiplexer and control logic. In order to mini-  
mize the power consumption, the divider is only ON during  
the sampling of the battery input.  
Battery Input 1  
Start Clock  
Power Up Reference  
Power Up  
A/D Converter  
Power Down  
A/D Converter  
Convert  
Battery Input 1  
Power Down Reference  
Issue Data Available  
2.7V  
DC/DC  
Converter  
Battery  
0.5V  
to  
+
Is Data  
Averaging Done  
No  
6.0V  
VDD  
Turn Off Clock  
Done  
Yes  
Store Battery Input 1  
in BAT1 Register  
0.125V to 1.5V  
VBAT  
7.5k  
2.5kΩ  
FIGURE 22. VBAT1 Measurement Process.  
Host Writes  
A/D Converter  
Control Register  
Battery Input 2  
Start Clock  
FIGURE 21. Battery Measurement Functional Block Diagram.  
Power Up Reference  
Flowcharts that detail the process of making a battery input  
reading are shown in Figures 22 and 23.  
Power Up  
A/D Converter  
Power Down  
A/D Converter  
The time needed to make temperature, auxiliary, or battery  
measurements is given by:  
(7)  
Convert  
Battery Input 2  
Power Down Reference  
Issue Data Available  
1
tREADING = 2.625µs + tREF + NAVG NBITS  
+ 4.4µs  
fCONV  
where tREF is the reference delay time as given in Table XVII.  
Is Data  
Averaging Done  
No  
Turn Off Clock  
Done  
Yes  
Store Battery Input 2  
in BAT2 Register  
FIGURE 23. VBAT2 Measurement Process.  
TSC2200  
SBAS191F  
31  
www.ti.com  
OPERATIONAUXILIARY MEASUREMENT  
OPERATIONPORT SCAN  
The two auxiliary voltage inputs can be measured in much  
the same way as the battery inputs, as shown in Figures 24  
and 25. Applications might include external temperature  
sensing, ambient light monitoring for controlling the back-  
light, or sensing the current drawn from the battery.  
If making measurements of all the analog inputs (except the  
touch screen) is desired on a periodic basis, the Port Scan  
mode can be used. This mode causes the TSC2200 to  
sample and convert both battery inputs and both auxiliary  
inputs. At the end of this cycle, the battery and auxiliary result  
registers will contain the latest values. Thus, with one write  
to the TSC2200, the host can cause four different measure-  
ments to be made.  
Host Writes  
A/D Converter  
The flowchart for this process is shown in Figure 26. The time  
needed to make a complete port scan is given by:  
Control Register  
Auxiliary Input 1  
Start Clock  
1
tREADING = 7.5µs+ tREF+ 4NAVG NBITS  
+ 4.4µs  
(8)  
fCONV  
Power Up Reference  
Power Up  
A/D Converter  
Port Scan  
Power Down  
A/D Converter  
Convert  
Auxiliary Input 1  
Convert  
Auxiliary Input 1  
Host Writes  
A/D Converter  
Control Register  
Power Down Reference  
Is Data  
Averaging Done  
No  
Issue Data Available  
Start Clock  
Is Data  
No  
Averaging Done  
Turn Off Clock  
Done  
Power Up Reference  
Yes  
Yes  
Store Auxiliary Input 1  
in AUX1 Register  
Power Up  
A/D Converter  
Store Auxiliary Input 1  
in AUX1 Register  
Convert  
Battery Input 1  
FIGURE 24. AUX1 Measurement Process.  
Convert  
Auxiliary Input 2  
Host Writes  
A/D Converter  
Control Register  
Is Data  
Averaging Done  
No  
Is Data  
Averaging Done  
No  
Auxiliary Input 2  
Yes  
Start Clock  
Yes  
Store Battery Input 1  
in BAT1 Register  
Power Up Reference  
Store Auxiliary Input 2  
in AUX2 Register  
Power Up  
Convert  
A/D Converter  
Battery Input 2  
Power Down  
Power Down  
A/D Converter  
A/D Converter  
Convert  
Auxiliary Input 2  
Power Down Reference  
Issue Data Available  
Is Data  
Averaging Done  
No  
Power Down Reference  
Is Data  
Averaging Done  
No  
Issue Data Available  
Yes  
Store Battery Input 2  
in BAT2 Register  
Turn Off Clock  
Done  
Turn Off Clock  
Done  
Yes  
Store Auxiliary Input 2  
in AUX2 Register  
FIGURE 26. Port Scan Mode.  
FIGURE 25. AUX2 Measurement Process.  
TSC2200  
32  
www.ti.com  
SBAS191F  
OPERATIOND/A CONVERTER  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
The TSC2200 has an onboard 8-bit D/A converter, config-  
ured as shown in Figure 27. This configuration yields a  
current sink (AOUT) controlled by the value of a resistor  
connected between the ARNG pin and ground. The D/A  
converter has a control register that controls whether or not  
the converter is powered up. The 8-bit data is written to the  
D/A converter through the D/A converter data register.  
V+  
10k  
100k  
1M  
10M  
100M  
R1  
ARNG Resistor ()  
VBIAS  
R2  
FIGURE 28. D/A Converter Output Current Range versus  
RRNG Resistor Value.  
AOUT  
D/A Converter  
8 Bits  
For example, consider an LCD that has a contrast control  
voltage VBIAS that can range from 2V to 4V, which draws  
400µA when used, and an available +5V supply. Note that  
this is higher than the TSC2200 supply voltage, but it is within  
the absolute maximum ratings.  
ARNG  
RRNG  
The maximum VBIAS voltage is 4V, and this occurs when the  
D/A converter current is 0, so only the 400µA load current  
I
LOAD will be flowing from 5V to VBIAS. This means 1V will be  
dropped across R1, so R1 = 1V/400µA = 2.5k.  
FIGURE 27. D/A Converter Configuration.  
The minimum VBIAS is 2V, which occurs when the D/A  
converter current is at its full scale value, IMAX. In this case,  
5V 2V = 3V will be dropped across R1, so the current  
through R1 will be 3V/2.5K = 1.2mA. This current is  
IMAX + ILOAD = IMAX + 400uA, so IMAX must be set to 800µA.  
Looking at Figure 28, this means that RRNG should be  
around 1M.  
This circuit is designed for flexibility in the output voltage at the  
VBIAS point shown in Figure 27 to accommodate the widely  
varying requirements for LCD contrast control bias. V+ can be  
a higher voltage than the supply voltage for the TSC2200. The  
only restriction is that the voltage on the AOUT pin can never go  
above the absolute maximum ratings for the device, and  
should stay above 1.5V for linear operation.  
Since the voltage at the AOUT pin should not go below 1.5V,  
this limits the voltage at the bottom of R2 to be 1.5V minimum;  
this occurs when the D/A converter is providing its maximum  
current, IMAX. In this case, IMAX + ILOAD flows through R1, and  
IMAX flows through R2. Thus,  
The D/A converter has an output sink range that is limited to  
1mA. This range can be adjusted by changing the value of  
RRNG shown in Figure 27. As this D/A converter is not  
designed to be a precision device, the actual output current  
range can vary as much as ±20%. Furthermore, the current  
output will change due to variations in temperature; the D/A  
converter has a temperature coefficient of approximately  
2µA/°C. To set the full-scale current, RRNG can be deter-  
mined from the graph shown in Figure 28.  
R2IMAX + R1(IMAX + ILOAD) = 5V 1.5V = 3.5V  
(8)  
We already have found R1 = 2.5k, IMAX = 800µA,  
ILOAD = 400µA, so we can solve this for R2 and find that it  
should be 625.  
TSC2200  
SBAS191F  
33  
www.ti.com  
In the previous example, when the D/A converter current is  
zero, the voltage on the AOUT pin will rise above the TSC2200  
supply voltage. This is not a problem, however, since V+ was  
within the absolute maximum ratings of the TSC2200, so no  
special precautions are necessary. Many LCD displays re-  
quire voltages much higher than the absolute maximum  
ratings of the TSC2200. In this case, the addition of an NPN  
transistor, as shown in Figure 29, will protect the AOUT pin  
from damage.  
OPERATIONKEYPAD INTERFACE  
The TSC2200 contains a keypad interface that is suitable for  
use with matrix keypads up to 4-by-4 keys. A control register,  
the Keypad Control Register, is used to set the scan rate for  
the keypad and de-bounce times. There is also a Keypad  
Mask register which allows certain keys to be masked from  
being read or causing the TSC2200 to detect a key press.  
The results of keyboard scans are placed in the Keypad Data  
register.  
When a key press is detected, the TSC2200 automatically  
scans the keypad and de-bounces the key press. It will then  
drive the KBIRQ LOW. All keys pressed at the time of the  
scan will then be reflected in the Keypad Data Register. This  
mode is shown in Figure 30.  
V+  
R1  
VBIAS  
R2  
VSUPPLY  
Keypad Scan  
KBIRQ Initiated  
AOUT  
Keypad Touch  
D/A Converter  
8 Bits  
Read KPDATA  
Register  
Start Clock  
ARNG  
RRNG  
Scan and De-Bounce  
Keys  
Reset KBIRQ  
Store Keypad Scan  
Results in KPData Register  
FIGURE 29. D/A Converter Circuit when Using V+ Higher  
than VSUPPLY  
.
Issue Interrupt KBIRQ  
Turn Off Clock  
Done  
FIGURE 30. Keypad Scan Initiated by Keypress.  
TSC2200  
34  
www.ti.com  
SBAS191F  
The TSC2200 architecture offers no inherent rejection of  
noise or voltage variation in regards to using an external  
reference input. This is of particular concern when the  
reference input is tied to the power supply. Any noise and  
ripple from the supply will appear directly in the digital  
results. While high-frequency noise can be filtered out,  
voltage variation due to line frequency (50Hz or 60Hz) can  
be difficult to remove.  
LAYOUT  
The following layout suggestions should provide optimum  
performance from the TSC2200. However, many portable  
applications have conflicting requirements concerning power,  
cost, size, and weight. In general, most portable devices  
have fairly cleanpower and grounds because most of the  
internal components are very low power. This situation would  
mean less bypassing for the converters power and less  
concern regarding grounding. Still, each situation is unique  
and the following suggestions should be reviewed carefully.  
The GND pin should be connected to a clean ground point.  
In many cases, this will be the analogground. Avoid  
connections that are too near the grounding point of a  
microcontroller or digital signal processor. If needed, run a  
ground trace directly from the converter to the power-supply  
entry or battery-connection point. The ideal layout will in-  
clude an analog ground plane dedicated to the converter and  
associated analog circuitry.  
For optimum performance, care should be taken with the  
physical layout of the TSC2200 circuitry. The basic SAR  
architecture is sensitive to glitches or sudden changes on the  
power supply, reference, ground connections, and digital  
inputs that occur just prior to latching the output of the analog  
comparator. Therefore, during any single conversion for an  
n-bitSAR converter, there are n windowsin which large  
external transient voltages can easily affect the conversion  
result. Such glitches might originate from switching power  
supplies, nearby digital logic, and high power devices. The  
degree of error in the digital output depends on the reference  
voltage, layout, and the exact timing of the external event.  
The error can change if the external event changes in time  
with respect to the SCL input.  
In the specific case of use with a resistive touch screen, care  
should be taken with the connection between the converter  
and the touch screen. Since resistive touch screens have  
fairly low resistance, the interconnection should be as short  
and robust as possible. Loose connections can be a source  
of error when the contact resistance changes with flexing or  
vibrations.  
As indicated previously, noise can be a major source of error  
in touch screen applications (e.g., applications that require a  
back-lit LCD panel). This EMI noise can be coupled through  
the LCD panel to the touch screen and cause flickeringof  
the converted data. Several things can be done to reduce  
this error, such as utilizing a touch screen with a bottom-side  
metal layer connected to ground. This will couple the major-  
ity of noise to ground. Additionally, filtering capacitors, from  
Y+, Y, X+, and Xto ground, can also help. Note, however,  
that the use of these capacitors will increase screen settling  
time and require longer panel voltage stabilization times, as  
well as increased precharge and sense times for the PENIRQ  
circuitry of the TSC2200.  
With this in mind, power to the TSC2200 should be clean and  
well bypassed. A 0.1µF ceramic bypass capacitor should be  
placed as close to the device as possible. A 1µF to 10µF  
capacitor may also be needed if the impedance of the  
connection between +VDD and the power supply is HIGH.  
A bypass capacitor is generally not needed because the  
reference is buffered by an internal op amp. If an external  
reference voltage originates from an op amp, make sure that  
it can drive any bypass capacitor that is used without oscil-  
lation.  
TSC2200  
SBAS191F  
35  
www.ti.com  
PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Oct-2022  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TSC2200IPW  
TSC2200IPWR  
TSC2200IRHB  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
VQFN  
PW  
PW  
28  
28  
32  
50  
RoHS & Green  
NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-2-260C-1 YEAR  
-40 to 85  
-40 to 85  
-40 to 85  
TSC2200I  
Samples  
Samples  
Samples  
2000 RoHS & Green  
73 RoHS & Green  
3000 RoHS & Green  
NIPDAU  
NIPDAU  
TSC2200I  
RHB  
TSC  
2200I  
TSC2200IRHBR  
ACTIVE  
VQFN  
RHB  
32  
NIPDAU  
Level-2-260C-1 YEAR  
-40 to 85  
TSC  
2200I  
Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
14-Oct-2022  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TSC2200IPWR  
TSC2200IRHBR  
TSSOP  
VQFN  
PW  
28  
32  
2000  
3000  
330.0  
330.0  
16.4  
12.4  
6.9  
5.3  
10.2  
5.3  
1.8  
1.5  
12.0  
8.0  
16.0  
12.0  
Q1  
Q2  
RHB  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TSC2200IPWR  
TSC2200IRHBR  
TSSOP  
VQFN  
PW  
28  
32  
2000  
3000  
350.0  
350.0  
350.0  
350.0  
43.0  
43.0  
RHB  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
TSC2200IPW  
TSC2200IRHB  
PW  
TSSOP  
VQFN  
28  
32  
50  
73  
530  
381  
10.2  
6.73  
3600  
2286  
3.5  
0
RHB  
Pack Materials-Page 3  
GENERIC PACKAGE VIEW  
RHB 32  
5 x 5, 0.5 mm pitch  
VQFN - 1 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
Images above are just a representation of the package family, actual package may vary.  
Refer to the product data sheet for package details.  
4224745/A  
www.ti.com  
PACKAGE OUTLINE  
RHB0032E  
VQFN - 1 mm max height  
S
C
A
L
E
3
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD  
5.1  
4.9  
B
A
PIN 1 INDEX AREA  
(0.1)  
5.1  
4.9  
SIDE WALL DETAIL  
20.000  
OPTIONAL METAL THICKNESS  
C
1 MAX  
SEATING PLANE  
0.08 C  
0.05  
0.00  
2X 3.5  
(0.2) TYP  
3.45 0.1  
9
EXPOSED  
THERMAL PAD  
16  
28X 0.5  
8
17  
SEE SIDE WALL  
DETAIL  
2X  
SYMM  
33  
3.5  
0.3  
0.2  
32X  
24  
0.1  
C A B  
C
1
0.05  
32  
25  
PIN 1 ID  
(OPTIONAL)  
SYMM  
0.5  
0.3  
32X  
4223442/B 08/2019  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
RHB0032E  
VQFN - 1 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(
3.45)  
SYMM  
32  
25  
32X (0.6)  
1
24  
32X (0.25)  
(1.475)  
28X (0.5)  
33  
SYMM  
(4.8)  
(
0.2) TYP  
VIA  
8
17  
(R0.05)  
TYP  
9
16  
(1.475)  
(4.8)  
LAND PATTERN EXAMPLE  
SCALE:18X  
0.07 MIN  
ALL AROUND  
0.07 MAX  
ALL AROUND  
SOLDER MASK  
OPENING  
METAL  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4223442/B 08/2019  
NOTES: (continued)  
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature  
number SLUA271 (www.ti.com/lit/slua271).  
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown  
on this view. It is recommended that vias under paste be filled, plugged or tented.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
RHB0032E  
VQFN - 1 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
4X ( 1.49)  
(0.845)  
(R0.05) TYP  
32  
25  
32X (0.6)  
1
24  
32X (0.25)  
28X (0.5)  
(0.845)  
SYMM  
33  
(4.8)  
17  
8
METAL  
TYP  
16  
9
SYMM  
(4.8)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
EXPOSED PAD 33:  
75% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE  
SCALE:20X  
4223442/B 08/2019  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2022, Texas Instruments Incorporated  

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