TUSB322IRWBR [TI]

支持 VCONN 的 USB Type-C 配置通道逻辑和端口控制 | RWB | 12 | -40 to 85;
TUSB322IRWBR
型号: TUSB322IRWBR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

支持 VCONN 的 USB Type-C 配置通道逻辑和端口控制 | RWB | 12 | -40 to 85

接口集成电路
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TUSB322I  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
TUSB322I USB Type-C™配置通道逻辑和端口控制(支持 VCONN)  
1 特性  
2 应用  
1
USB Type-C™规范 1.1  
向后兼容 USB Type-C 规范 1.0  
支持高达 3A 的电流通告和检测  
模式配置  
主机、设备、双角色端口 应用  
移动电话  
平板电脑和笔记本电脑  
USB 外设  
仅主机 - 下行端口 (DFP)/源设备(仅限 I2C 模  
式)  
仅器件 上行端口 (UFP)/接收设备(仅限 I2C  
模式)  
3 说明  
TUSB322I 器件可在 USB Type-C 端口上实现 Type-C  
生态系统所需的配置通道 (CC) 逻辑。TUSB322I 器件  
使用 CC 引脚来确定端口的连接状态和电缆方向,以  
及进行角色检测和 Type-C 电流模式控制。TUSB322I  
器件可配置为下行端口 (DFP)、上行端口 (UFP) 或双  
角色端口 (DRP),因此成为任何应用的理想选择。  
双角色端口 – DRP  
通道配置 (CC)  
V
USB 端口连接检测  
电缆方向检测  
角色检测  
根据 Type-C 规范,TUSB322I 器件会交替配置为  
DFP UFPCC 逻辑块通过监视 CC1 CC2 引脚  
上的上拉或下拉电阻,以确定何时连接了 USB 端口、  
电缆的方向以及检测到的角色。CC 逻辑根据检测到的  
角色来确定 Type-C 电流模式为默认、中等还是高。该  
逻辑通过实施 VBUS 检测来确定端口在 UFP DRP  
模式下是否连接成功。当检测到有源电缆  
Type-C 电流模式(默认、中等和高)+u  
BUS 检测  
I2C GPIO 控制  
针对有源电缆提供 VCONN 支持  
外部开关电缆检测与  
方向控制  
通过 I2C 实现角色配置控制  
电源电压:4.5V 5.5V  
低电流消耗  
时,TUSB322I 将为 VCONN 供电。  
该器件能够在宽电源范围内工作,并且具有较低功耗。  
TUSB322I 器件可在工业级温度范围内工作。  
工业温度范围:–40°C 85°C  
器件信息(1)  
器件型号  
TUSB322I  
封装  
封装尺寸(标称值)  
X2QFN (12)  
1.60mm x 1.60mm  
(1) 如需了解所有可用封装,请参阅产品说明书末尾的可订购产品  
附录。  
空白  
简化原理图  
VDD  
示例 应用  
VCONN  
VBUS  
Detection  
VBUS_DET  
CC Logic  
for Mode  
Configuration  
and Detection  
CC1  
CC2  
EN_N  
ADDR  
DIR  
ID  
SDA/OUT1  
SCL/OUT2  
Controller  
INT_N/OUT3  
GND  
Copyright © 2016, Texas Instruments Incorporated  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLLSEO5  
 
 
 
TUSB322I  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
www.ti.com.cn  
目录  
7.5 Programming........................................................... 15  
7.6 Register Maps......................................................... 16  
Application and Implementation ........................ 20  
8.1 Application Information............................................ 20  
8.2 Typical Application .................................................. 20  
8.3 Initialization Set Up ................................................ 27  
Power Supply Recommendations...................... 27  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 ESD Ratings.............................................................. 4  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Electrical Characteristics........................................... 5  
6.6 Timing Requirements................................................ 6  
6.7 Switching Characteristics.......................................... 7  
Detailed Description .............................................. 8  
7.1 Overview ................................................................... 8  
7.2 Functional Block Diagram ......................................... 8  
7.3 Feature Description................................................... 8  
7.4 Device Functional Modes........................................ 13  
8
9
10 Layout................................................................... 27  
10.1 Layout Guidelines ................................................. 27  
10.2 Layout Example .................................................... 27  
11 器件和文档支持 ..................................................... 28  
11.1 文档支持................................................................ 28  
11.2 接收文档更新通知 ................................................. 28  
11.3 社区资源................................................................ 28  
11.4 ....................................................................... 28  
11.5 静电放电警告......................................................... 28  
11.6 Glossary................................................................ 28  
12 机械、封装和可订购信息....................................... 28  
7
4 修订历史记录  
注:之前版本的页码可能与当前版本有所不同。  
Changes from Revision B (September 2016) to Revision C  
Page  
Changed RVBUS values From: MIN = 891, TYP = 900, MAX = 909 KΩ To: MIN = 855, TYP = 887, MAX = 920 KΩ ........... 6  
Changes from Revision A (May 2016) to Revision B  
Page  
Changed pins CC1 and CC2 values From: MIN = –0.3 MAX = VDD + 0.3 To: MIN –0.3 MAX = 6 in the Absolute  
Maximum Ratings................................................................................................................................................................... 4  
Changes from Original (October 2015) to Revision A  
Page  
Added Shutdown current consumption to Electrical Characteristics table. ............................................................................ 5  
2
Copyright © 2015–2017, Texas Instruments Incorporated  
 
TUSB322I  
www.ti.com.cn  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
5 Pin Configuration and Functions  
RWB Package  
12-Pin X2QFN  
Top View  
1
2
VBUS_DET  
3
12  
VDD  
DIR  
4
5
6
11  
10  
9
EN_N  
GND  
ID  
ADDR  
INT_N/OUT3  
7
8
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
CC1  
NO.  
1
I/O  
I/O  
Type-C configuration channel signal 1  
Type-C configuration channel signal 2  
CC2  
2
5-V to 28-V VBUS input voltage. VBUS detection determines UFP attachment. One 900-kΩ  
external resistor required between system VBUS and VBUS_DET pin.  
VBUS_DET  
3
4
I
DIR of plug. The open drain output indicates the detected plug orientation: Type-C plug  
position 2 (H); Type-C plug position 1 (L).  
DIR  
O
Tri-level input pin to indicate I2C address or GPIO mode:  
H - I2C is enabled and I2C 7-bit address is 0x67.  
NC - GPIO mode (I2C is disabled)  
ADDR  
5
I
L - I2C is enabled and I2C 7-bit address is 0x47.  
ADDR pin should be pulled up to VDD if high configuration is desired  
The INT_N/OUT3 is a dual-function pin. When used as the INT_N, the pin is an open drain  
output in I2C control mode and is an active low interrupt signal for indicating changes in I2C  
registers. When used as OUT3, the pin is in audio accessory detect in GPIO mode: no  
detection (H), audio accessory connection detected (L).  
The SDA/OUT1 is a dual-function pin. When I2C is enabled (ADDR pin is high or low), this  
pin is the I2C communication data signal. When in GPIO mode (ADDR pin is NC), this pin is  
an open drain output for communicating Type-C current mode detect when the TUSB322I  
device is in UFP mode: default current mode detected (H); medium or high current mode  
detected (L).  
INT_N/OUT3  
SDA/OUT1  
6
7
O
I/O  
The SCL/OUT2 is a dual function pin. When I2C is enabled (ADDR pin is high or low), this  
pin is the I2C communication clock signal. When in GPIO mode (ADDR pin is NC), this pin is  
an open drain output for communicating Type-C current mode detect when the TUSB322I  
device is in UFP mode: default or medium current mode detected (H); high current mode  
detected (L).  
SCL/OUT2  
ID  
8
9
I/O  
O
Open drain output; asserted low when the CC pins detect device attachment when port is a  
source (DFP), or dual-role (DRP) acting as source (DFP).  
GND  
EN_N  
VDD  
10  
11  
12  
G
I
Ground  
EN_N. Active low enable.  
Positive supply voltage  
P
Copyright © 2015–2017, Texas Instruments Incorporated  
3
TUSB322I  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
www.ti.com.cn  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–65  
MAX  
UNIT  
Supply voltage  
Control pins  
VDD  
6
V
ADDR, ID, DIR, INT_N/OUT3, EN_N  
CC1, CC2  
VDD + 0.3  
6
VDD + 0.3  
4
V
SDA/OUT1, SCL/OUT2  
VBUS_DET  
Storage temperature, Tstg  
150  
°C  
(1) Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods can affect device reliability.  
6.2 ESD Ratings  
VALUE  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
±3000  
V(ESD)  
Electrostatic discharge  
V
Charged-device model (CDM), per JEDEC specification JESD22-  
C101(2)  
±1500  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
4.5  
4
NOM  
MAX  
5.5  
UNIT  
V
VDD  
Supply voltage  
5
5
VBUS  
System VBUS voltage  
28  
V
DC voltage range for control lines: ADDR, ID, DIR, INT_N/OUT3, SDA/OUT1,  
SCL/OUT2, EN_N, CC1, and CC2.  
0
5.5  
V
VCONTR  
OL  
DC voltage range for VBUSDET  
0
4.75  
–40  
4
5.5  
85  
V
V
VCONN Supply for active cable (With VDD at 5 V)  
TA Operating free-air temperature  
TUSB322I  
25  
°C  
6.4 Thermal Information  
TUSB322I  
RWB (X2QFN)  
12 PINS  
169.3  
THERMAL METRIC(1)  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
68.1  
83.4  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
2.2  
ψJB  
83.4  
RθJC(bot)  
N/A  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and C Package Thermal Metrics application  
report, SPRA953.  
4
Copyright © 2015–2017, Texas Instruments Incorporated  
 
TUSB322I  
www.ti.com.cn  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
6.5 Electrical Characteristics  
over operating free-air temperature range (unless otherwise noted)  
TEST  
CONDITIONS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
Power Consumption  
Leakage current when VDD is supplied but the device is  
ISHUTDOWN_UFP  
0.04  
70  
µA  
µA  
µA  
not enabled. (VDD = 5 V, EN_N = H)  
Current consumption in unattached mode when port is  
IUNATTACHED_UFP  
unconnected and waiting for connection. (VDD = 5 V, ADDR  
= NC, MODE_SELECT = 2'b01)  
Current consumption in active mode. (VDD = 5 V, ADDR =  
NC, MODE_SELECT = 2'b01)  
IACTIVE_UFP  
70  
CC1 and CC2 Pins  
RCC_DB  
Pulldown resistor when in dead-battery mode.  
Pulldown resistor when in UFP or DRP mode.  
4.1  
4.6  
5.1  
5.1  
6.1  
5.6  
kΩ  
kΩ  
RCC_D  
Voltage level range for detecting a DFP attach when  
configured as a UFP and DFP is advertising default current  
source capability.  
VUFP_CC_USB  
0.25  
0.7  
0.61  
1.16  
2.04  
1.64  
1.64  
2.74  
0.25  
0.45  
0.84  
V
V
V
V
V
V
V
V
V
Voltage level range for detecting a DFP attach when  
configured as a UFP and DFP is advertising medium (1.5  
A) current source capability.  
VUFP_CC_MED  
Voltage level range for detecting a DFP attach when  
configured as a UFP and DFP is advertising high (3 A)  
current source capability.  
VUFP_CC_HIGH  
1.31  
1.51  
1.51  
2.46  
0.15  
0.35  
0.76  
Voltage threshold for detecting a UFP attach when  
configured as a DFP and advertising default current source  
capability.  
VTH_DFP_CC_USB  
VTH_DFP_CC_MED  
VTH_DFP_CC_HIGH  
VTH_AC_CC_USB  
VTH_AC_CC_MED  
VTH_AC_CC_HIGH  
1.6  
1.6  
2.6  
0.2  
0.4  
0.8  
Voltage threshold for detecting a UFP attach when  
configured as a DFP and advertising medium current (1.5  
A) source capability.  
Voltage threshold for detecting a UFP attach when  
configured as a DFP and advertising high current (3.0 A)  
source capability.  
Voltage threshold for detecting a active cable attach when  
configured as a DFP and advertising default current  
source.  
Voltage threshold for detecting a active cable attach when  
configured as a DFP and advertising medium current (1.5  
A) source.  
Voltage threshold for detecting a active cable attach when  
configured as a DFP and advertising high current (3.0 A)  
source.  
Default mode pullup current source when operating in DFP  
or DRP mode.  
ICC_DEFAULT_P  
ICC_MED_P  
64  
166  
304  
80  
180  
330  
96  
194  
356  
µA  
µA  
µA  
Medium (1.5 A) mode pullup current source when  
operating in DFP or DRP mode.  
High (3 A) mode pullup current source when operating in  
DFP or DRP mode.(1)  
ICC_HIGH_P  
Control Pins: EN_N, ADDR, INT/OUT3, DIR, ID  
VIL  
VIM  
VIH  
IIH  
Low-level control signal input voltage, (EN_N, ADDR)  
0.4  
0.56 × VDD  
VDD  
V
V
Mid-level control signal input voltage (ADDR)  
High-level control signal input voltage (EN_N, ADDR)  
High-level input current  
0.28 × VDD  
VDD – 0.3  
–20  
V
20  
µA  
µA  
IIL  
Low-level input current  
–10  
10  
VDD = 0 V; ID = 5  
V
IID_LEAKAGE  
Current leakage on ID pin.  
10  
µA  
REN_N  
Rpu  
Internal pull-up resistance for EN_N.  
Internal pullup resistance (ADDR)  
Internal pulldown resistance (ADDR)  
1.1  
588  
1.1  
MΩ  
kΩ  
Rpd  
MΩ  
Low-level signal output voltage (open-drain) (INT_N/OUT3,  
ID)  
VOL  
IOL = –1.6 mA  
0.4  
V
(1) VDD must be 3.5 V or greater to advertise 3 A current.  
Copyright © 2015–2017, Texas Instruments Incorporated  
5
TUSB322I  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
www.ti.com.cn  
Electrical Characteristics (continued)  
over operating free-air temperature range (unless otherwise noted)  
TEST  
CONDITIONS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
External pullup resistor on open drain IOs (INT_N/OUT3,  
ID)  
Rp_ODext  
Rp_TLext  
200  
4.7  
kΩ  
kΩ  
Tri-level input external pullup resistor (ADDR)  
(2)  
I2C - SDA/OUT1, SCL/OUT2 can operate from 1.8 or 3.3 V (±10%) when ADDR pin is low or high.  
Supply range for I2C (SDA/OUT1, SCL/OUT2)  
VDD_I2C  
1.65  
1.05  
1.8  
3.6  
V
V
V
V
VIH  
VIL  
High-level signal voltage  
Low-level signal voltage  
0.4  
0.4  
VOL  
Low-level signal output voltage (open drain)  
IOL = –1.6 mA  
VBUS_DET IO Pins (Connected to System VBUS signal)  
VBUS_THR  
RVBUS  
VBUS threshold range  
2.95  
855  
3.3  
887  
95  
3.8  
V
External resistor between VBUS and VBUS_DET pin  
Internal pulldown resistance for VBUS_DET  
920  
KΩ  
KΩ  
RVBUS_PD  
DIR pin (Open Drain IO)  
VOL  
Low-level signal output voltage  
IOL = –1.6 mA  
0.4  
V
VCONN  
RON  
On resistance of the VCONN power FET  
Voltage tolerance on VCONN power FET  
Voltage to pass through VCONN power FET  
1.25  
5.5  
Ω
V
V
VTOL  
VPASS  
5.5  
VCONN current limit; VCONN is disconnected above the  
value  
IVCONN  
CBULK  
225  
10  
300  
375  
200  
mA  
uF  
Bulk capacitance on VCONN; placed on VDD supply  
(2) When using 3.3 V for I2C, customer must ensure VDD is above 3.0 V at all times.  
6.6 Timing Requirements  
MIN  
NOM  
MAX  
UNIT  
I2C (SDA, SCL)  
tSU:DAT  
tHD;DAT  
tSU:STA  
tHD:STA  
tSU:STO  
tVD;DAT  
tVD;ACK  
tBUF  
Data setup time  
100  
10  
ns  
ns  
µs  
µs  
µs  
µs  
µs  
µs  
kHz  
ns  
ns  
pF  
pF  
Data hold time  
Set-up time, SCL to start condition  
Hold time, (repeated) start condition to SCL  
Set up time for stop condition  
0.6  
0.6  
0.6  
Data valid time  
0.9  
0.9  
Data valid acknowledge time  
Bus free time between a stop and start condition  
SCL clock frequency; I2C mode for local I2C control  
Rise time of both SDA and SCL signals  
Fall time of both SDA and SCL signals  
1.3  
fSCL  
400  
300  
300  
400  
100  
tr  
tf  
CBUS_100KHZ Total capacitive load for each bus line when operating at 100 KHz  
CBUS_400KHZ Total capacitive load for each bus line when operating at 400 KHz.  
6
Copyright © 2015–2017, Texas Instruments Incorporated  
TUSB322I  
www.ti.com.cn  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
6.7 Switching Characteristics  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP MAX  
UNIT  
ms  
Power on default of CC1 and CC2 voltage debounce  
tCCCB_DEFAULT  
DEBOUNCE register = 2'b00  
168  
2
time  
Debounce of VBUS_DET pin after valid VBUS_THR  
tDRP_DUTY_CY Power-on default of percentage of time DRP advertises DRP_DUTY_CYCLE register  
tVBUS_DB  
ms  
30%  
DFP during a TDRP  
= 2'b00  
CLE  
The period TUSB322I in DFP mode completes a DFP to  
UFP and back advertisement.  
Time from EN_N low and VDD active to I2C access  
available  
tDRP  
50  
26  
75  
49  
100  
ms  
tI2C_EN  
100  
95  
ms  
ms  
tSOFT_RESET  
Soft reset duration  
VBUS  
VBUS_THR  
TVBUS_DB  
0V  
Figure 1. VBUS Detect and Debounce  
Copyright © 2015–2017, Texas Instruments Incorporated  
7
TUSB322I  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
www.ti.com.cn  
7 Detailed Description  
7.1 Overview  
The USB Type-C ecosystem operates around a small form factor connector and cable that is flippable and  
reversible. Due to the nature of the connector, a scheme is required to determine the connector orientation.  
Additional schemes are required to determine when a USB port is attached and the acting role of the USB port  
(DFP, UFP, DRP), as well as to communicate Type-C current capabilities. These schemes are implemented over  
the CC pins according to the USB Type-C specifications. The TUSB322I device provides Configuration Channel  
(CC) logic for determining USB port attach and detach, role detection, cable orientation, and Type-C current  
mode. The TUSB322I device also contains several features such as VCONN sourcing, USB3.1 mux direction  
control, mode configuration, and low standby current, all of which make the TUSB322I device ideal for source or  
sinks in USB2.0 or USB3.1 applications.  
7.2 Functional Block Diagram  
VDD  
VCONN  
CC1  
ADDR  
Connection  
and  
Cable  
Digital Controller  
CSR  
EN_N  
Detection  
I2C  
SDA/OUT1  
SCL/OUT2  
CC2  
DIR_CTRL  
DIR Logic  
DIR  
GND  
900K 1ꢀ  
Copyright © 2016, Texas Instruments Incorporated  
7.3 Feature Description  
7.3.1 Cables, Adapters, and Direct Connect Devices  
Type-C Specification 1.1 defines several cables, plugs, and receptacles to be used to attach ports. The  
TUSB322I device supports all cables, receptacles, and plugs. The TUSB322I device does not support any USB  
feature which requires USB Power Delivery communications over CC lines, such as e-marking or alternate  
mode.  
8
Copyright © 2015–2017, Texas Instruments Incorporated  
TUSB322I  
www.ti.com.cn  
ZHCSES9C OCTOBER 2015REVISED MAY 2017  
Feature Description (continued)  
7.3.1.1 USB Type-C Receptacles and Plugs  
Below is list of Type-C receptacles and plugs supported by the TUSB322I device:  
USB Type-C receptacle for USB2.0 and USB3.1 and full-featured platforms and devices  
USB full-featured Type-C plug  
USB2.0 Type-C plug  
7.3.1.2 USB Type-C Cables  
Below is a list of Type-C cables types supported by the TUSB322I device:  
USB full-featured Type-C cable with USB3.1 full-featured plug  
USB2.0 Type-C cable with USB2.0 plug  
Captive cable with either a USB full-featured plug or USB2.0 plug  
7.3.1.3 Legacy Cables and Adapters  
The TUSB322I device supports legacy cable adapters as defined by the Type-C Specification. The cable adapter  
must correspond to the mode configuration of the TUSB322I device.  
To System VBUS detection  
VBUS  
9ꢁꢁKΩ 1ꢀ  
Rp (56k 5ꢀ%  
VBUS_DET  
TUSB322  
CC  
CC  
Rd (5.1k 1ꢁꢀ%  
Legacy Host Adapter  
Copyright © 2ꢁ16, Texas Instruments Incorporated  
Figure 2. Legacy Adapter Implementation Circuit  
7.3.1.4 Direct Connect Devices  
The TUSB322I device supports the attaching and detaching of a direct-connect device.  
7.3.1.5 Audio Adapters  
Additionally, the TUSB322I device supports audio adapters for audio accessory mode, including:  
Passive Audio Adapter  
Charge Through Audio Adapter  
7.3.2 Port Role Configuration  
The TUSB322I default operation is dual-role port (DRP). The TUSB322I will always default to DRP operation  
anytime EN_N is asserted from high to low or I2C_SOFT_RESET bit is set. But the TUSB322I can be configured  
as DFP-only or UFP-only through changing the default state of the MODE_SELECT register. DFP-only and UFP-  
only mode is not available in GPIO mode. Table 1 lists the supported features in each mode:  
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Feature Description (continued)  
Table 1. Supported Features for the TUSB322I Device by Mode  
SUPPORTED  
FEATURES  
DFP-Only  
Yes  
UFP-Only  
Yes  
DFP  
Yes  
Yes  
Yes  
Port attach and  
detach  
Cable orientation  
(through I2C)  
Yes  
Yes  
Cable orientation  
through DIR pin  
Yes  
Yes  
Current advertisement  
Current detection  
Yes  
Yes (DFP)  
Yes (UFP)  
Yes  
Accessory modes  
(audio and debug)  
Yes  
Yes  
Yes  
Active cable detection  
Try.SRC  
Yes  
Yes (DFP)  
Yes (DFP)  
Yes (UFP)  
Yes (DFP)  
Yes  
Try.SNK  
VCONN  
I2C / GPIO  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Legacy cables  
VBUS detection  
Yes  
Yes (UFP)  
7.3.2.1 Downstream Facing Port (DFP) - Source  
The TUSB322I device can be configured as a DFP-only device by changing the MODE_SELECT register default  
setting. In DFP mode, the TUSB322I device constantly presents Rps on both CC. In DFP mode, the TUSB322I  
device initially advertises default USB Type-C current. The Type-C current can be adjusted through I2C if the  
system is required to increase the amount advertised. The TUSB322I device adjusts the Rps to match the  
desired Type-C current advertisement. As a DFP, the TUSB322I monitors the voltage level on CC pins looking  
for the Rd termination of a UFP. When a UFP is detected and TUSB322I is in the Attached.SRC state, the  
TUSB322I will supply VCONN on the CC pin that has Ra.  
The following list describes the steps for enabling DFP-only.  
1. Write a 1'b1 to DISABLE_TERM register (address 0x0A bit 0)  
2. Write a 2'b10 to MODE_SELECT register (address 0x0A bits 5:4)  
3. Write a 1'b0 to DISABLE_TERM register (address 0x0A bit 0)  
When configured as a DFP, the TUSB322I can operate with older USB Type-C 1.0 devices except for a USB  
Type-C 1.0 DRP device. The TUSB322I cannot operate with a USB Type-C 1.0 DRP device. The limitation is a  
result of a backwards compatibility problem between USB Type-C 1.1 DFP and a USB Type-C 1.0 DRP.  
7.3.2.2 Upstream Facing Port (UFP) - Sink  
The TUSB322I device can be configured as a UFP-only by changing the MODE_SELECT register default  
setting. In UFP mode, the TUSB322I device constantly presents pulldown resistors (Rd) on both CC pins. The  
TUSB322I device monitors the CC pins for the voltage level corresponding to the Type-C mode current  
advertisement by the connected DFP. The TUSB322I device debounces the CC pins and wait for VBUS detection  
before successfully attaching. As a UFP, the TUSB322I device detects and communicates the advertised current  
level of the DFP to the system through the I2C CURRENT_MODE_DETECT register once in the Attached.SNK  
state.  
Steps for enabling UFP-only:  
1. Write a 1'b1 to DISABLE_TERM register (address 0x0A bit 0).  
2. Write a 2'b01 to MODE_SELECT register (address 0x0A bits 5:4)  
3. Write a 1'b0 to DISABLE_TERM register (address 0x0A bit 0).  
10  
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7.3.2.3 Dual Role Port (DRP)  
The TUSB322I default operation is a dual-role port controller. As a DRP, the TUSB322I can operate as a UFP  
(sink) or a DFP (source). In DFP mode, the TUSB322I toggles between presenting as a DFP (Rp on both CC  
pins) and presenting as a UFP (Rd on both CC pins).  
When presenting as a DFP, the TUSB322I monitors the voltage level on the CC pins looking for the Rd  
termination of a UFP. When a UFP is detected and TUSB322I is in the Attached.SRC state, the TUSB322I will  
pull the ID pin low to indicate to the system the port is attached to a sink (UFP). Additionally, when a UFP is  
detected, the TUSB322I will supply VCONN on the unconnected CC pin if Ra is also detected. In DFP mode, the  
TUSB322I will initially advertise default USB Type-C current. The Type-C Current can be adjusted through I2C if  
the system wishes to increase the amount advertised. TUSB322I will adjust the Rps to match the desired Type-C  
Current advertisement. In GPIO mode, the TUSB322I will only advertise default Type C current.  
When presenting as a UFP, the TUSB322I monitors the CC pins for the voltage level corresponding to the Type-  
C mode current advertisement by the connected DFP. The TUSB322I will debounce the CC pins and wait for  
VBUS detection before successfully attaching. As a UFP, the TUSB322I will detect and communicate the DFP’s  
advertised current level to the system through the OUT1 and OUT2 GPIOs (if in GPIO mode) or through the I2C  
CURRENT_MODE_DETECT register once in the Attached.SNK state.  
The TUSB322I supports two optional Type-C DRP features called Try.SRC and Try.SNK. Products supporting  
dual-role functionality can have a requirement to be a source (DFP) or a sink (UFP) when connected to another  
dual-role capable product. For example, a dual-role capable notebook can be used as a source when connected  
to a tablet, or a cell phone could be a sink when connected to a notebook or tablet. When standard DRP  
products (products which don’t support either Try.SRC or Try.SNK) are connected together, the role (UFP or  
DFP) outcome is not predetermined. These two optional DRP features provide a means for dual-role capable  
products to connect to another dual-role capable product in the role desired. Try.SRC and Try.SNK are only  
available when TUSB322I is configured in I2C mode. When operating in GPIO mode, the TUSB322I will always  
operate as a standard DRP.  
The Try.SRC feature of the TUSB322I device provides a means for a DRP product to connect as a DFP when  
connected to another DRP product that doesn’t implement Try.SRC. When two products which implement  
Try.SRC are connected together, the role outcome of either UFP or DFP is the same as a standard DRP.  
Try.SRC is enabled by changing I2C register SOURCE_PREF to 2’b11. Once the register is changed to 2’b11,  
the TUSB322I will always attempt to connect as a DFP when attached to another DRP capable device.  
7.3.3 Type-C Current Mode  
When a valid cable detection and attach have been completed, the DFP has the option to advertise the level of  
Type-C current a UFP can sink. The default current advertisement for the TUSB322I device is 500 mA (for  
USB2.0) or 900 mA (for USB3.1). If a higher level of current is available, the I2C registers can be written to  
provide medium current at 1.5 A or high current at 3 A. When the CURRENT_MODE_ADVERTISE register has  
been written to advertise higher than default current, the DFP adjusts the Rps for the specified current level. If a  
DFP advertises 3 A, it ensures that the VDD of the TUSB322I device is 3.5 V or greater. Table 2 lists the Type-C  
current advertisements in GPIO an I2C modes.  
Table 2. Type-C Current Advertisement for GPIO and I2C Modes  
GPIO MODE (ADDR PIN IN NC)  
I2C MODE (ADDR PIN H, L)  
TYPE-C CURRENT  
UFP IN DRP MODE  
DFP IN DRP MODE  
UFP  
DFP  
500 mA  
(USB2.0)  
900 mA  
(USB3.1)  
I2C register default is 500  
or 900 mA  
Default  
Only advertisement  
N/A  
Current mode detected  
and output through OUT1  
/ OUT2  
Current mode detected  
and read through I2C  
register  
Medium - 1.5 A  
Advertisement selected  
through writing I2C  
register  
High - 3 A  
7.3.4 Accessory Support  
The TUSB322I device supports audio and debug accessories in UFP, DFP mode and DRP mode. Audio and  
debug accessory support is provided through reading of I2C registers. Audio accessory is also supported through  
GPIO mode with INT_N/OUT3 pin (audio accessory is detected when INT_N/OUT3 pin is low).  
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7.3.4.1 Audio Accessory  
Audio accessory mode is supported through two types of adapters. First, the passive audio adapter can be used  
to convert the Type-C connector into an audio port. To effectively detect the passive audio adapter, the  
TUSB322I device must detect a resistance that is less than Ra on both of the CC pins.  
Secondly, a charge through audio adapter can be used. The primary difference between a passive and charge  
through adapter is that the charge through adapter supplies 500 mA of current over VBUS. The charge through  
adapter contains a receptacle and a plug. The plug acts as a DFP and supplies VBUS when the plug detects a  
connection.  
When the TUSB322I device is configured in GPIO mode, OUT3 pin determines if an audio accessory is  
connected. When an audio accessory is detected, the OUT3 pin is pulled low.  
7.3.4.2 Debug Accessory  
Debug is an additional state supported by USB Type-C. The specification does not define a specific user  
scenario for this state, but the end user could use debug accessory mode to enter a test state for production  
specific to the application. Charge through debug accessory is not supported by TUSB322I when in DRP or UFP  
mode. The TUSB322I when configured as a DFP-only or as a DRP acting as a DFP will detect a debug  
accessory which presents Rd on both CC1 and CC2 pins. The TUSB322I will set ACCESSORY_CONNECTED  
register to 3'b110 to indicate a UFP debug accessory. The TUSB322I when configured as a UFP-only or as a  
DRP acting as a UFP will detect a debug accessory which presents Rp on both CC1 and CC2 pins. The  
TUSB322I will set ACCESSORY_CONNECTED register to 3b'111 to indicate a DFP debug accessory.  
7.3.5 I2C and GPIO Control  
The TUSB322I device can be configured for I2C communication or GPIO outputs using the ADDR pin. The  
ADDR pin is a tri-level control pin. When the ADDR pin is left floating (NC), the TUSB322I device is in GPIO  
output mode. When the ADDR pin is pulled high or pulled low, the TUSB322I device is in I2C mode.  
All outputs for the TUSB322I device are open drain configuration.  
The OUT1 and OUT2 pins are used to output the Type-C current mode when in GPIO mode. Additionally, the  
OUT3 pin is used to communicate the audio accessory mode in GPIO mode. Table 3 lists the output pin settings.  
See for more information on the pins and their uses.  
Table 3. Simplified Operation for OUT1 and OUT2  
OUT1  
OUT2  
DESCRIPTION  
H
H
L
H
L
Default current in unattached state  
Default current in attached state  
Medium current (1.5 A) in attached state  
High current (3.0 A) in attached state  
H
L
L
When operating in I2C mode, the TUSB322I device uses the SCL and SDA lines for clock and data and the  
INT_N pin to communicate a change in I2C registers, or an interrupt, to the system. The INT_N pin is pulled low  
when the TUSB322I device updates the registers with new information. The INT_N pin is open drain. The  
INTERRUPT_STATUS register will be set when the INT_N pin is pulled low. To clear the INTERRUPT_STATUS  
register, the end user writes to I2C.  
When operating in GPIO mode, the OUT3 pin is used in place of the INT_N pin to determine if an audio  
accessory is detected and attached. The OUT3 pin is pulled low when an audio accessory is detected.  
NOTE  
When using the 3.3-V supply for I2C, the end user must ensure that the VDD is 3 V and  
above. Otherwise the I2C can back power the device.  
7.3.6 VBUS Detection  
The TUSB322I device supports VBUS detection according to the Type-C Specification. VBUS detection is used to  
determine the attachment and detachment of a UFP and to determine the entering and exiting of accessary  
modes. VBUS detection is also used to successfully resolve the role in DRP mode.  
12  
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The system VBUS voltage must be routed through a 900-kΩ resistor to the VBUS_DET pin on the TUSB322I  
device.  
7.3.7 Cable Orientation and External MUX Control  
The TUSB322I device has the ability to control an external/discrete MUX using the DIR pin. The TUSB322I  
detects the cable orientation by monitoring the voltage on the CC pins. When a voltage level within the proper  
threshold is detected on CC1, the DIR pin is pulled low. When a voltage level within the proper threshold is  
detected on CC2, the DIR is pulled high. The DIR pin is an open drain output. The I2C communicates the cable  
orientation status for the TUSB322I device.  
7.3.8 VCONN Support for Active Cables  
The TUSB322I device supplies VCONN to active cables when configured in DFP mode or in DRP acting as a  
DFP mode. VCONN is provided only when the unconnected CC pin is terminated to a resistance, Ra, and after a  
UFP is detected and the Attached.SRC state is entered. When in DFP mode or in DRP acting as a DFP mode, a  
5-V source must be connected to the VDD pin of the TUSB322I device after Attached.SRC. VCONN is supplied  
from VDD through a low resistance power FET out to the unconnected CC pin. VCONN is removed when a  
detach event is detected and the active cable is removed.  
7.4 Device Functional Modes  
The TUSB322I device has four functional modes. Table 4 lists these modes:  
Table 4. USB Type-C States According to TUSB322I Functional Modes  
MODES  
GENERAL BEHAVIOR  
MODE  
STATES(1)  
Unattached.SNK  
UFP-Only  
AttachWait.SNK  
Toggle Unattached.SNK Unattached.SRC  
AttachedWait.SRC or AttachedWait.SNK  
Unattached.SRC  
USB port unattached. ID, PORT  
operational. I2C on.  
Unattached  
DRP  
DFP-Only  
AttachWait.SRC  
Attached.SNK  
UFP-Only  
DRP  
Audio Accessory  
Debug Accessory  
Attached.SNK  
Attached.SRC  
USB port attached. All GPIOs  
operational. I2C on.  
Active  
Audio accessory  
Debug accessory  
Attached.SRC  
DFP-Only  
Audio accessory  
Debug accessory  
No operation.  
VDD not available.  
Dead battery  
Shutdown  
DRP  
DRP  
Default device state to UFP/SNK with Rd.  
Default device state to UFP/SNK with Rd.  
No operation.  
VDD available and EN_N pin high  
(1) Required; not in sequential order.  
7.4.1 Unattached Mode  
Unattached mode is the primary mode of operation for the TUSB322I device, because a USB port can be  
unattached for a lengthy period of time. In unattached mode, VDD is available, and all IOs and I2C are  
operational. After the TUSB322I device is powered up, the part enters unattached mode until a successful attach  
has been determined. Initially, right after power up, the TUSB322I device comes up as an Unattached.SNK. The  
TUSB322I device toggles between the UFP and the DFP if configured as a DRP.  
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7.4.2 Active Mode  
Active mode is defined as the port being attached. In active mode, all GPIOs are operational, and I2C is read /  
write (R/W). When in active mode, the TUSB322I device communicates to the AP that the USB port is attached.  
This communication happens through the ID pin if TUSB322I is configured as a DFP or DRP connect as source.  
If TUSB322I is configured as a UFP or a DRP connected as a sink, the OUT1/OUT2 and INT_N/OUT3 pins are  
used. The TUSB322I device exits active mode under the following conditions:  
Cable unplug  
VBUS removal if attached as a UFP  
Dead battery; system battery or supply is removed  
EN_N is floated or pulled high.  
7.4.3 Shutdown Mode  
Shutdown mode for TUSB322I is defined as follows:  
Supply voltage available and EN_N pin is high or floating.  
EN_N pin has internal pullup resistor  
The TUSB322I device is off, but still maintains the Rd on the CC pins.  
7.4.4 Dead Battery Mode  
During dead battery mode, VDD is not available. CC pins always default to pulldown resistors in dead battery  
mode. Dead battery mode means:  
TUSB322I in UFP with 5.1 kΩ ± 20% Rd; cable connected and providing charge  
TUSB322I in UFP with 5.1 kΩ ± 20% Rd; nothing connected (application could be off or have a discharged  
battery)  
NOTE  
When VDD is off, the TUSB322I non-failsafe pins (DIR, VBUS_DET, ADDR, OUT[3:1] pins)  
could back-drive the TUSB322I device if not handled properly. When necessary to pull  
these pins up, TI recommends pulling up DIR, ADDR, and INT_N/OUT3 to the device’s  
VDD supply. The VBUS_DET must be pulled up to VBUS through a 900-kΩ resistor.  
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7.5 Programming  
For further programmability, the TUSB322I device can be controlled using I2C. The TUSB322I device local I2C  
interface is available for reading/writing after TI2C_EN when the device is powered up. The SCL and SDA terminals  
are used for I2C clock and I2C data respectively. If I2C is the preferred method of control, the ADDR pin must be  
set accordingly.  
Table 5. TUSB322I I2C Addresses  
TUSB322I I2C Target Address  
ADDR pin  
Bit 7 (MSB)  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0 (W/R)  
H
L
1
1
1
0
0
0
0
0
1
1
1
1
1
1
0/1  
0/1  
The following procedure should be followed to write to TUSB322I I2C registers:  
1. The master initiates a write operation by generating a start condition (S), followed by the TUSB322I 7-bit  
address and a zero-value R/W bit to indicate a write cycle  
2. The TUSB322I device acknowledges the address cycle  
3. The master presents the sub-address (I2C register within the TUSB322I device) to be written, consisting of  
one byte of data, MSB-first  
4. The TUSB322I device acknowledges the sub-address cycle  
5. The master presents the first byte of data to be written to the I2C register  
6. The TUSB322I device acknowledges the byte transfer  
7. The master can continue presenting additional bytes of data to be written, with each byte transfer completing  
with an acknowledge from the TUSB322I device  
8. The master terminates the write operation by generating a stop condition (P)  
The following procedure should be followed to read the TUSB322I I2C registers:  
1. The master initiates a read operation by generating a start condition (S), followed by the TUSB322I 7-bit  
address and a one-value R/W bit to indicate a read cycle  
2. The TUSB322I device acknowledges the address cycle  
3. The TUSB322I device transmits the contents of the memory registers MSB-first starting at register 00h or last  
read sub-address+1. If a write to the T I2C register occurred prior to the read, then the TUSB322I device  
starts at the sub-address specified in the write.  
4. The TUSB322I device waits for either an acknowledge (ACK) or a not-acknowledge (NACK) from the master  
after each byte transfer; the I2C master acknowledges reception of each data byte transfer  
5. If an ACK is received, the TUSB322I device transmits the next byte of data  
6. The master terminates the read operation by generating a stop condition (P)  
The following procedure should be followed for setting a starting sub-address for I2C reads:  
1. The master initiates a write operation by generating a start condition (S), followed by the TUSB322I 7-bit  
address and a zero-value R/W bit to indicate a read cycle  
2. The TUSB322I device acknowledges the address cycle  
3. The master presents the sub-address (I2C register within the TUSB322I device) to be read, consisting of one  
byte of data, MSB-first  
4. The TUSB322I device acknowledges the sub-address cycle  
5. The master terminates the read operation by generating a stop condition (P)  
NOTE  
If no sub-addressing is included for the read procedure, then the reads start at register  
offset 00h and continue byte-by-byte through the registers until the I2C master terminates  
the read operation. If a I2C address write occurred prior to the read, then the reads start at  
the sub-address specified by the address write.  
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7.6 Register Maps  
7.6.1 CSR Registers  
Table 6. CSR Registers  
Offset  
Reset  
Register Name  
Section  
[0x00, 0x54, 0x55, 0x53,  
0x42, 0x33, 0x32, 0x32]  
0x07 through 0x00  
Device Identification  
Device Identification Register  
0x08  
0x09  
0x0A  
0xA0  
0x00  
0x20  
0x00  
0x02  
Connection Status  
Connection Status and Control  
General Control  
Connection Status Register  
Connection Status and Control Register  
General Control Register  
Device Revision  
Device Revision Register  
7.6.1.1 Device Identification Register (offset = 0x07 through 0x00) [reset = 0x00, 0x54, 0x55, 0x53, 0x42,  
0x33, 0x32, 0x32]  
Figure 3. Device Identification Register  
7
6
5
4
3
2
1
0
DEVICE_ID  
R-0  
LEGEND: R = Read only; -n = value after reset  
Table 7. Device Identification Register Field Descriptions  
Bit  
Field  
Type  
Reset  
Description  
For the TUSB322I device these fields return a string of ASCII  
characters returning TUSB322I  
Addresses 0x07 - 0x00 = {0x00, 0x54, 0x55, 0x53, 0x42, 0x33,  
0x32, 0x32}  
7-0  
DEVICE_ID  
R
7.6.1.2 Connection Status Register (offset = 0x08) [reset = 0x00]  
Figure 4. Connection Status Register  
7
6
5
4
3
2
1
0
CURRENT_MODE_ADVERTISE  
CURRENT_MODE_DETECT  
ACCESSORY_CONNECTED  
ACTIVE_CABL  
E_DETECTION  
RW  
RU  
RU  
RU  
LEGEND: R/W = Read/Write; R/U = Read/Update  
Table 8. Connection Status Register Field Descriptions  
Bit  
Field  
Type  
Reset  
Description  
2'b00  
These bits are programmed by the application to raise the  
current advertisement from default.  
00 – Default (500 mA / 900 mA) initial value at startup  
7-6  
CURRENT_MODE_ADVERTISE  
R
01 – Mid (1.5 A)  
10 – High (3 A)  
11 – Reserved  
2'b00  
These bits are set when a UFP determines the Type-C Current  
mode.  
00 – Default (value at start up)  
01 – Medium  
5-4  
CURRENT_MODE_DETECT  
RU  
10 – Charge through accessory – 500 mA  
11 – High  
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Table 8. Connection Status Register Field Descriptions (continued)  
Bit  
Field  
Type  
Reset  
Description  
2'b00  
These bits are read by the application to determine if an  
accessory was attached.  
000 – No accessory attached (default)  
001 – Reserved  
010 – Reserved  
011 – Reserved  
3-1  
ACCESSORY_CONNECTED  
RU  
100 – Audio accessory  
101 – Audio charged thru accessory  
110 – Debug accessory when TUSB322I is connected as a  
DFP.  
111 – Debug accessory when TUSB322I is connected as a  
UFP.  
1'b0  
This flag indicates that an active cable has been plugged into  
the Type-C connector. When this field is set, an active cable is  
detected.  
0
ACTIVE_CABLE_DETECTION  
RU  
7.6.1.3 Connection Status and Control Register (offset = 0x09) [reset = 0x20]  
Figure 5. Connection Status and Control Register  
7
6
5
4
3
2
1
0
ATTACHED_STATE  
CABLE_DIR  
INTERRUPT_S VCONN_FAUL  
DRP_DUTY_CYCLE  
DISABLE_UFP  
_ACCESSORY  
TATUS  
T
RU  
RU  
RCU  
RCU  
RW  
RW  
LEGEND: R/W = Read/Write; R/U = Read/Update; R/C/U = Read/Clear/Update  
Table 9. Connection Status and Control Register Field Descriptions  
Bit  
Field  
Type  
Reset  
Description  
2'b00  
This is an additional method to communicate attach other than  
the ID pin. These bits can be read by the application to  
determine what was attached.  
00 – Not attached (default)  
01 – Attached.SRC (DFP)  
10 – Attached.SNK (UFP)  
11 – Attached to an accessory  
7-6  
ATTACHED_STATE  
RU  
1'b1  
1'b0  
Cable orientation. The application can read these bits for cable  
orientation information.  
5
4
3
CABLE_DIR  
RU  
0 – CC1  
1 – CC2 (default)  
The INT pin is pulled low whenever a CSR changes. When a  
CSR change has occurred this bit should be held at 1 until the  
application clears it.  
INTERRUPT_STATUS  
VCONN_FAULT  
RCU  
RCU  
0 – Clear  
1 – Interrupt (When INT_N is pulled low, this bit will be 1.  
This bit is 1 whenever any CSR are changed)  
1'b0  
VCONN_FAULT Bit is set whenever a VCONN over-current limit  
is triggered.  
0 - No fault. (default)  
1 - Interrupt (INT_N is asserted low)  
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Table 9. Connection Status and Control Register Field Descriptions (continued)  
Bit  
Field  
Type  
Reset  
Description  
2'b00  
Percentage of time that a DRP advertises DFP during tDRP  
00 – 30% (default)  
01 – 40%  
2-1  
DRP_DUTY_CYCLE  
RW  
10 – 50%  
11 – 60%  
1'b0  
Setting this field will disable UFP accessory support.  
0 – UFP accessory support enabled (Default)  
1 – UFP accessory support disabled  
0
DISABLE_UFP_ACCESSORY  
RW  
7.6.1.4 General Control Register (offset = 0x0A) [reset = 0x00]  
Figure 6. General Control Register  
7
6
5
4
3
2
1
0
DEBOUNCE  
RW  
MODE_SELECT  
I2C_SOFT_RE  
SET  
SOURCE_PREF  
DISABLE_TER  
M
RW  
RSU  
RW  
RW  
LEGEND: R/W = Read/Write; R/S/U = Read/Set/Update  
Table 10. General Control Register Field Descriptions  
Bit  
Field  
Type  
Reset  
Description  
2'b00  
The nominal amount of time the TUSB322I device debounces  
the voltages on the CC pins.  
00 – 168ms (default)  
01 – 118ms  
7-6  
DEBOUNCE  
RW  
10 – 134ms  
11 – 152ms  
2'b00  
This register can be written to set the TUSB322I device mode  
operation. The ADDR pin must be set to I2C mode.  
00 – DRP mode (start from unattached.SNK) (default)  
01 – UFP mode (unattached.SNK)  
5-4  
MODE_SELECT  
I2C_SOFT_RESET  
SOURCE_PREF  
RW  
RSU  
RW  
10 – DFP mode(unattached.SRC)  
11 – DRP mode(start from unattached.SNK)  
1'b0  
This register resets the digital logic. The bit is self-clearing. A  
write of 1 starts the reset. The following registers can be  
affected after setting this bit:  
CURRENT_MODE_DETECT  
ACTIVE_CABLE_DETECTION  
ACCESSORY_CONNECTED  
ATTACHED_STATE  
3
CABLE_DIR  
2'b00  
This field controls the TUSB322I behavior when configured as a  
DRP.  
00 – Standard DRP (default)  
01 – DRP will perform Try.SNK  
10 – Reserved  
2-1  
11 – DRP will perform Try.SRC  
18  
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Table 10. General Control Register Field Descriptions (continued)  
Bit  
Field  
Type  
Reset  
Description  
1'b0  
This field will disable the termination on CC pins and transition  
the CC state machine to the disabled state.  
0 – Termination enabled according TUSB322I mode of  
operation (default)  
0
DISABLE_TERM  
RW  
1 – Termination disabled and state machine held in disable  
state.  
7.6.1.5 Device Revision Register (offset = 0xA0) [reset = 0x02]  
Figure 7. Device Revision Register  
7
6
5
4
3
2
1
0
REVISION  
R
LEGEND: R = Read only  
Table 11. Device Revision Register Field Descriptions  
Bit  
Field  
Type  
Reset  
Description  
Revision of TUSB322I. Defaults to 0x02.  
7-0  
REVISION  
R
'h02  
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8 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
The TUSB322I device is a Type-C configuration channel logic and port controller. The TUSB322I device can  
detect when a Type-C device is attached, what type of device is attached, the orientation of the cable, and power  
capabilities (both detection and broadcast). The TUSB322I device can be used in a source application (DFP) or  
in a sink application (UFP).  
8.2 Typical Application  
20  
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Typical Application (continued)  
8.2.1 DRP in I2C Mode  
Figure 8 shows the TUSB322I device configured as a DRP in I2C mode.  
USB VBUS Switch  
(optional BC 1.2 support for legacy)  
SCL  
SDA  
DM_OUT  
DM  
DP  
DM_IN  
DP_IN  
VOUT  
DP_OUT  
System VBUS  
VIN  
EN  
PS_EN  
FAULT#  
PS_FAULT#  
VBUS  
I2C I/O  
1.8V or 3.3V  
VDD_5V  
150uF  
DM  
DP  
VCONN bulk  
cap  
100uF  
100nF  
VBUS  
900K  
200K  
200K  
A12 B2
4.7K  
4.7K  
RXP2  
RXN2  
TXP2  
TXN2  
VBUS_DET  
A11  
A10  
A9  
B2  
B3  
B4  
B5  
CC1  
INT_N/OUT3  
INT#  
CC2  
CC1  
A8  
USB3  
A7  
B6  
B7  
B8  
TUSB322  
and  
CC2  
ID  
ID  
SCL  
SDA  
A6  
A5  
PMIC  
SCL/OUT2  
SDA/OUT1  
A4  
A3  
A2  
A1  
B9  
B10  
B11  
TXN1  
TXP1  
RXN1  
RXP1  
1uF  
B12  
VCC_3.3V  
VCC_3.3V  
10K  
100nF  
SEL  
TXP2  
TXN2  
B0P  
B0N  
RXP2  
RXN2  
100nF  
B1P  
B1N  
A0P  
A0N  
SSTXP  
SSTXN  
100nF  
TXN1  
TXP1  
A1P  
A1N  
SSRXP  
SSRXN  
C0P  
C0N  
RXN1  
RXP1  
100nF  
C1P  
C1N  
OEN  
Copyright © 2016, Texas Instruments Incorporated  
Figure 8. DRP in I2C Mode Schematic  
8.2.1.1 Design Requirements  
For the design example, use the parameters listed in Table 12.  
Table 12. Design Requirements for DRP in I2C Mode  
DESIGN PARAMETER  
VALUE  
5 V  
VDD (4.5 to 5.5 V)  
I2C  
Mode (I2C or GPIO)  
ADDR pin must be pulled down or pulled up  
0x47  
I2C address (0x67 or 0x47)  
ADDR pin must be pulled low or tied to GND  
DRP  
Type-C port type (UFP, DFP, or DRP)  
VCONN Support  
MODE_SELECT register = 2'b00.  
Yes  
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8.2.1.2 Detailed Design Procedure  
The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular use case, 5 V is connected  
to the VDD pin. Because VCONN support is required for a DRP, the 5 V on VDD meets the USB Type-C VCONN  
requirement of 4.75 V to 5.5 V. A 100-nF capacitor is placed near VDD. Also, a 100-µF capacitor is used to meet  
the USB Type-C bulk capacitance requirement of 10 µF to 220 µF.  
The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this case, the ADDR  
pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to either 1.8 V or  
3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the I2C interface.  
The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is  
an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ  
resistor.  
The ID pin is used to indicate when a connection has occurred if the TUSB322I device is a DFP while configured  
for DRP. An OTG USB controller can use this pin to determine when to operate as a USB Host or USB Device.  
When this pin is driven low, the OTG USB controller functions as a host and then enables VBUS. The Type-C  
standard requires that a DFP not enable VBUS until the VBUS is in the Attached.SRC state. If the ID pin is not low  
but VBUS is detected, then the OTG USB controller functions as a device. The ID pin is open drain output and  
requires an external pullup resistor. The ID pin should be pulled up to VDD using a 200-kΩ resistor.  
The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB  
Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the  
USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped.  
When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 =  
CC1).  
The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This  
large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day  
systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the  
recommended range.  
The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the  
TUSB322I device in a DRP mode, it alternates between UFP and DFP. If the TUSB322I device connects as a  
UFP, the large bulk capacitance must be removed.  
Table 13. USB2 Bulk Capacitance Requirements  
PORT CONFIGURATION  
Downstream facing port (DFP)  
Upstream facing port (UFP)  
MIN  
120  
1
MAX  
UNIT  
µF  
10  
µF  
8.2.1.3 Application Curves  
Figure 9. Application Curve for DRP in I2C Mode  
22  
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8.2.2 DFP in I2C Mode  
Figure 10 shows the TUSB322I device configured as a DFP in I2C mode.  
USB VBUS Switch  
(optional BC 1.2 support for legacy)  
SCL  
SDA  
DM_OUT  
DM  
DP  
DM_IN  
DP_IN  
VOUT  
DP_OUT  
System VBUS  
VIN  
EN  
PS_EN  
FAULT#  
PS_FAULT#  
VBUS  
I2C I/O  
1.8V or 3.3V  
VDD_5V  
150uF  
DM  
DP  
VCONN bulk  
cap  
100uF  
100nF  
VBUS  
900K  
200K  
200K  
A12 B2
4.7K  
4.7K  
RXP2  
RXN2  
TXP2  
TXN2  
VBUS_DET  
A11  
A10  
A9  
B2  
B3  
B4  
B5  
CC1  
INT_N/OUT3  
INT#  
CC2  
CC1  
A8  
USB3  
A7  
B6  
B7  
B8  
TUSB322  
and  
CC2  
ID  
ID  
SCL  
SDA  
A6  
A5  
PMIC  
SCL/OUT2  
SDA/OUT1  
A4  
A3  
A2  
A1  
B9  
B10  
B11  
TXN1  
TXP1  
RXN1  
RXP1  
1uF  
B12  
VCC_3.3V  
VCC_3.3V  
10K  
100nF  
SEL  
TXP2  
TXN2  
B0P  
B0N  
RXP2  
RXN2  
100nF  
B1P  
B1N  
A0P  
A0N  
SSTXP  
SSTXN  
100nF  
TXN1  
TXP1  
A1P  
A1N  
SSRXP  
SSRXN  
C0P  
C0N  
RXN1  
RXP1  
100nF  
C1P  
C1N  
OEN  
Copyright © 2016, Texas Instruments Incorporated  
Figure 10. DFP in I2C Mode Schematic  
8.2.2.1 Design Requirements  
For the design example, use the parameters listed in Table 14:  
Table 14. Design Requirements for DFP in I2C Mode  
DESIGN PARAMETER  
VALUE  
5 V  
VDD (4.5 V to 5.5 V)  
I2C  
Mode (I2C or GPIO)  
ADDR pin must be pulled down or pulled up  
0x47  
I2C address (0x61 or 0x60)  
ADDR pin must be pulled low or tied to GND  
DFP  
Type-C port type (UFP, DFP, or DRP)  
VCONN Support  
MODE_SELECT = 2'b10  
Yes  
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8.2.2.2 Detailed Design Procedure  
The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular case, VDD is set to 5 V. A  
100-nF capacitor is placed near VDD. Also, a 100-µF capacitor is used to meet the USB Type-C bulk capacitance  
requirement of 10 µF to 220 µF.  
The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this particular case,  
the ADDR pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to  
either 1.8 V or 3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the  
I2C interface.  
The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is  
an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ  
resistor.  
The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB  
Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the  
USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped.  
When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 =  
CC1).  
The Type-C port mode is determined by the state of the MODE_SELECT register. When the MODE_SELECT  
register is 2'b10, the TUSB322I device is in DFP mode. The TUSB322I will exit the DFP mode if the  
MODE_SELECT register is changed, I2C_SOFT_RESET is set, or EN_N pin is transitioned from high to low.  
The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This  
large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day  
systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the  
recommended range.  
The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the  
TUSB322I device in a DFP mode, a bulk capacitance of at least 120 µF is required. In this particular case, a 150-  
µF capacitor was chosen.  
8.2.2.3 Application Curves  
Figure 11. Application Curve for DFP in I2C Mode  
24  
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8.2.3 UFP in I2C Mode  
Figure 12 shows the TUSB322I device configured as a UFP in I2C mode.  
USB VBUS Switch  
(optional BC 1.2 support for legacy)  
SCL  
SDA  
DM_OUT  
DM  
DP  
DM_IN  
DP_IN  
VOUT  
DP_OUT  
System VBUS  
VIN  
EN  
PS_EN  
FAULT#  
PS_FAULT#  
VBUS  
I2C I/O  
1.8V or 3.3V  
VDD_5V  
150uF  
DM  
DP  
VCONN bulk  
cap  
100uF  
100nF  
VBUS  
900K  
200K  
200K  
A12 B2
4.7K  
4.7K  
RXP2  
RXN2  
TXP2  
TXN2  
VBUS_DET  
A11  
A10  
A9  
B2  
B3  
B4  
B5  
CC1  
INT_N/OUT3  
INT#  
CC2  
CC1  
A8  
USB3  
A7  
B6  
B7  
B8  
TUSB322  
and  
CC2  
ID  
ID  
SCL  
SDA  
A6  
A5  
PMIC  
SCL/OUT2  
SDA/OUT1  
A4  
A3  
A2  
A1  
B9  
B10  
B11  
TXN1  
TXP1  
RXN1  
RXP1  
1uF  
B12  
VCC_3.3V  
VCC_3.3V  
10K  
100nF  
SEL  
TXP2  
TXN2  
B0P  
B0N  
RXP2  
RXN2  
100nF  
B1P  
B1N  
A0P  
A0N  
SSTXP  
SSTXN  
100nF  
TXN1  
TXP1  
A1P  
A1N  
SSRXP  
SSRXN  
C0P  
C0N  
RXN1  
RXP1  
100nF  
C1P  
C1N  
OEN  
Copyright © 2016, Texas Instruments Incorporated  
Figure 12. UFP in I2C Mode Schematic  
8.2.3.1 Design Requirements  
For the design example, use the parameters listed in Table 15:  
Table 15. Design Requirements for UFP in I2C Mode  
DESIGN PARAMETER  
VALUE  
5 V  
VDD (4.5 V to 5.5 V)  
I2C  
Mode (I2C or GPIO)  
ADDR pin must be pulled down or pulled up  
0x47  
I2C address (0x61 or 0x60)  
ADDR pin must be pulled low or tied to GND  
UFP  
Type-C port type (UFP, DFP, or DRP)  
VCONN Support  
MODE_SELECT = 2'b01  
No  
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8.2.3.2 Detailed Design Procedure  
The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular case, VDD is set to 5 V. A  
100-nF capacitor is placed near VDD  
.
The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this case, the ADDR  
pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to either 1.8 V or  
3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the I2C interface.  
The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is  
an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ  
resistor.  
The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB  
Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the  
USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped.  
When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 =  
CC1).  
The Type-C port mode is determined by the state of the MODE_SELECT register. When the MODE_SELECT  
register is 2'b01, the TUSB322I device is in UFP mode. The TUSB322I will exit the UFP mode if the  
MODE_SELECT register is changed, I2C_SOFT_RESET is set, or EN_N pin is transitioned from high to low.  
The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This  
large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day  
systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the  
recommended range.  
The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the  
TUSB322I device in a UFP mode, a bulk capacitance between 1 µF to 10 µF is required. In this particular case,  
a 1-µF capacitor was chosen.  
8.2.3.3 Application Curves  
Figure 13. Application Curve for UFP in I2C Mode  
26  
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8.3 Initialization Set Up  
The general power-up sequence for the TUSB322I device (EN_N tied to GND) is as follows:  
1. System is powered off (device has no VDD). The TUSB322I device is configured internally in UFP mode with  
Rds on CC pins (dead battery).  
2. VDD ramps – POR circuit.  
3. I2C supply ramps up.  
4. The TUSB322I device enters unattached.SNK and functions as a DRP. If DRP is not the desired mode of  
operation, then software must change MODE_SELECT register to desired mode (UFP or DFP).  
5. The TUSB322I device monitors the CC pins as a DFP and VBUS for attach as a UFP.  
6. The TUSB322I device enters active mode when attach has been successfully detected.  
9 Power Supply Recommendations  
The TUSB322I device has a wide power supply range from 4.5 to 5.5 V. The TUSB322I device can be run off of  
a system power such as a battery.  
10 Layout  
10.1 Layout Guidelines  
1. An extra trace (or stub) is created when connecting between more than two points. A trace connecting pin A6  
to pin B6 will create a stub because the trace also has to go to the USB Host. Ensure that:  
A stub created by short on pin A6 (DP) and pin B6 (DP) at Type-C receptacle does not exceed 3.5 mm.  
A stub created by short on pin A7 (DM) and pin B7 (DM) at Type-C receptacle does not exceed 3.5 mm.  
2. A 100-nF capacitor should be placed as close as possible to the TUSB322I VDD pin.  
10.2 Layout Example  
Figure 14. TUSB322I Layout  
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11 器件和文档支持  
11.1 文档支持  
11.1.1 相关文档  
请参阅如下相关文档:  
应用报告《半导体和 IC 封装热指标》SPRA953  
11.2 接收文档更新通知  
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。请单击右上角的通知我进行注册,即可收到任意产品  
信息更改每周摘要。有关更改的详细信息,请查看任意已修订文档中包含的修订历史记录。  
11.3 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.4 商标  
E2E is a trademark of Texas Instruments.  
USB Type-C is a trademark of USB Implementers Forum.  
All other trademarks are the property of their respective owners.  
11.5 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
11.6 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 机械、封装和可订购信息  
以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时,我们可能不  
会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本,请参见左侧的导航栏。  
28  
版权 © 2015–2017, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TUSB322IRWBR  
ACTIVE  
X2QFN  
RWB  
12  
3000 RoHS & Green  
NIPDAU  
Level-2-260C-1 YEAR  
-40 to 85  
72  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
8-Jan-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TUSB322IRWBR  
X2QFN  
RWB  
12  
3000  
180.0  
8.4  
1.8  
1.8  
0.61  
4.0  
8.0  
Q2  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
8-Jan-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
X2QFN RWB 12  
SPQ  
Length (mm) Width (mm) Height (mm)  
213.0 191.0 35.0  
TUSB322IRWBR  
3000  
Pack Materials-Page 2  
PACKAGE OUTLINE  
RWB0012A  
X2QFN - 0.4 mm max height  
SCALE 6.500  
PLASTIC QUAD FLATPACK - NO LEAD  
1.65  
1.55  
B
A
PIN 1 INDEX AREA  
1.65  
1.55  
C
0.4 MAX  
SEATING PLANE  
0.05 C  
2X 1.2  
SYMM  
(0.13)  
TYP  
0.05  
0.00  
6X 0.4  
3
6
2
1
7
8
SYMM  
2X  
0.4  
0.4  
8X  
0.2  
12  
9
0.25  
0.15  
12X  
0.6  
4X  
0.4  
0.07  
0.05  
C B A  
C
4221631/B 07/2017  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
RWB0012A  
X2QFN - 0.4 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(1.3)  
6X (0.4)  
9
12  
4X (0.7)  
2X (0.4)  
1
8
SYMM  
(1.5)  
7
2
8X (0.5)  
3
6
SYMM  
(R0.05) TYP  
12X (0.2)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:30X  
0.05 MAX  
ALL AROUND  
0.05 MIN  
ALL AROUND  
METAL  
SOLDER MASK  
OPENING  
EXPOSED METAL  
EXPOSED METAL  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4221631/B 07/2017  
NOTES: (continued)  
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
RWB0012A  
X2QFN - 0.4 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
(1.3)  
6X (0.4)  
12  
9
4X (0.67)  
2X (0.4)  
1
2
8
SYMM  
(1.5)  
7
8X  
METAL  
8X (0.5)  
3
6
(R0.05) TYP  
SYMM  
12X (0.2)  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
PADS 1,2,7 & 8  
96% PRINTED SOLDER COVERAGE BY AREA  
SCALE:50X  
4221631/B 07/2017  
NOTES: (continued)  
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
重要声明和免责声明  
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