TVP5200PZP [TI]

SPECIALTY CONSUMER CIRCUIT, PQFP100, POWER, PLASTIC, TQFP-100;


型号：	TVP5200PZP
厂家：	TEXAS INSTRUMENTS
描述：	SPECIALTY CONSUMER CIRCUIT, PQFP100, POWER, PLASTIC, TQFP-100 商用集成电路
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中文：	中文翻译
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Product Preview Data Manual

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SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to

discontinue any product or service without notice, and advise customers to obtain the latest version of relevant

information to verify, before placing orders, that information being relied on is current and complete. All

products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement,

including those pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not

necessarily performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”).

TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD

TO BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or

represent that any license, either express or implied, is granted under any patent right, copyright, mask work

right, or other intellectual property right of TI covering or relating to any combination,, machine, or process in

which such semiconductor products or services might be or are used. TI’s publication of information regarding

any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Macrovision is a trademark of Macrovision Corporation.

Gemstar is a trademark of Gemstar-TV Guide International.

Other trademarks are the property of their respective owners.

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

1 Introduction

TVP5200 is the first, high quality, all format, single-chip digital video decoder that digitizes and decodes all popular base-band analog

video and PC graphics formats into digital component video. TVP5200 supports the A/D conversion of Standard-Definition (SDTV),

progressive-scan Enhanced Definition (EDTV) and High Definition (HDTV) component RGB and YPbPr signals, A/D conversion of

PC graphics signals up to UXGA resolution, as well as the A/D conversion and decoding of NTSC, PAL and SECAM composite and

S-Video into component YCbCr or RGB outputs. This chip includes four high-speed 9-bit 165-MSPS A/D converters. Prior to each

A/D converter, each analog channel contains an analog circuit, which clamps the input to a reference voltage and applies a

programmable gain and offset. A total of 14 video input terminals can be arbitrarily configured to any combination of

RGB,YPbPr,CVBS,S-Video video inputs.

Composite or S-Video SDTV signals are sampled at 2x the square-pixel or ITU-R BT.601 clock frequency (27 MHz), line-locked for

correct pixel alignment, and are afterwards decimated to the 1x rate. Component video SDTV (525/625 line interlaced), EDTV

(525/625 line progressive) and HDTV (1080I,720P) formats can be sampled at 1x or 2x the video clock frequency (27,54 or

148.5MHz), and are afterwards decimated to the 1x rate.

CVBS decoding utilizes 2-dimensional complementary 3-line or 4-line adaptive comb filtering for both the luma and chroma data

paths, to reduce both cross-luma and cross-chroma artifacts. A chroma trap filter is also available. On CVBS and Y/C inputs, the user

can control video characteristics such as hue, contrast, brightness and saturation via an I²C host port interface. Furthermore, luma

peaking with programmable gain is included, as well as a patented chroma transient improvement (CTI) circuit. A built-in fully-

programmable color space converter can be selectively applied to either decoded CVBS/S-Video, and/or component RGB/YCbCr.

The following output formats can be selected: 20/16- or 10/8-bit 4:2:2 YCbCr with separate syncs, 10/8-bit ITU-R BT.656 with

embedded syncs, 12-bit dual-edge clocked RGB 4:4:4, 30/24-bit RGB/YCbCr 4:4:4, 15-bit RGB, 16-bit RGB, and 30/24-bit

Fastswitch RGB/YCbCr. TVP5200 utilizes Texas Instruments’ patented technology for locking to weak, noisy, or unstable signals

and can auto-detect between broadcast-quality and VCR-style (non-standard) video sources.

TVP5200 generates synchronization, blanking, field, active video window, horizontal and vertical lock, clock, genlock (for

downstream video encoder synchronization), host CPU interrupt and programmable logic I/O signals, in addition to digital video

outputs.

TVP5200 includes methods for advanced vertical blanking interval (VBI) data retrieval. The VBI Data Processor (VDP) slices,

parses, and performs error checking on teletext, closed caption, Gemstar^TM, and other VBI data. A built-in FIFO stores up to 11 lines

of teletext data, and with proper host port synchronization, full-screen teletext retrieval is possible. TVP5200 can pass through the

output formatter 2x sampled raw composite data for host-based VBI processing.

TVP5200 also supports the digitization of PC RGB graphics (VESA) signals. The device handles pixel rates up to 165 MSPS with 32

phase control settings for the sampling clock. Therefore, it can be used for PC graphics digitizing up to the VESA standard of UXGA

(1600x1200) resolution at 60Hz screen refresh rate (162MSPS).

The device provides the option for concurrent processing of pixel-locked CVBS and RGB/YPbPr input formats, and it is possible to

switch the output bus between both input sources on a per pixel basis via a dedicated input terminal (Fastswitch mode for SCART).

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

1.1 TVP5200 Features

TVP5200 includes:

•

Four High-Speed 9-bit, 165-MSPS A/D converters with analog pre-processors (clamp/AGC)

Y/C separation by 2D 4-line (3H) adaptive comb and chroma trap filter

Chrominance processor

Luminance processor

Component processor

Clock/Timing processor and power-down control

Output formatter including color space conversion

I²C host port interface

VBI data processor

Macrovision™ copy protection detection circuit

JTAG test interface

1.1.1 TVP5200 Detailed Functionality

•

High-speed quad 165-MSPS, 9-bit A/D Channels with programmable RGB/YPbPr clamp and gain control

Supports NTSC (J, M, 4.43), PAL (B, D, G, H, I, M, N, 60) and SECAM (B, D, G, K, K1, L) composite video base-band

signal (CVBS), S-video

•

Supports analog component YPbPr /RGB SDTV/EDTV/HDTV video formats (480I, 480P, 625I, 625P, 1080I, 720P, 1080P)

with separate Hsync/Vsync, separate composite sync (Csync) or embedded sync-on-green / sync-on-luma (bi-level and tri-

level syncs supported)

•

Supports PC graphics VESA RGB formats up to UXGA (1600x1200) @ 60Hz

14 analog video input terminals for multi-source connection

User-programmable video output formats:

24/30-bit 4:4:4 RGB/YCbCr

15- and 16-bit 4:4:4 RGB

12-bit dual-edge clocked 4:4:4 RGB

20/16-bit and 10/8-bit 4:2:2 YCbCr with separate Hsync,Vsync and optional FID (Field ID)

10/8-bit ITU-R BT.656 4:2:2 YCbCr with embedded syncs

Switched decoded CVBS/component video outputs (SCART mode) from line-locked video sources

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

1-3

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

•

Hsync,Vsync outputs with programmable position, polarity and width and FID (FieldID) output

Fastswitch input for instantaneous switching between decoded CVBS and component video inputs (SCART mode)

External pixel clock input (bypass for internal PLL)

•

Component video & PC graphics processing

Optional 2x oversampling for SDTV/EDTV/HDTV inputs (27,54,148.5MSPS)

A/D Frequency and Phase Control (32 settings) for PC formats

Certified Macrovision copy protection detection on component video inputs (480I,480P,625I,625P)

•

Composite and S-Video processing

•

Automatic Video Standard Detection (NTSC/PAL/SECAM)

Adaptive 2-D 3-Line and 4-Line Comb Filter for composite video inputs; chroma-trap available

•

Luma-peaking with programmable gain

Patented chroma transient improvement (CTI)

Programmable output data rates

12.2727 MHz Square-Pixel (NTSC)

13.5 MHz ITU-R BT.601 (NTSC/ PAL/SECAM)

14.7500 MHz Square-Pixel (PAL)

•

Patented architecture for locking to weak, noisy, or unstable signals

Single 14.31818- or 27-MHz reference crystal for all standards (ITU-R.BT601 & square pixel)

Line-locked internal pixel sampling clock generation with horizontal and vertical lock signal outputs

Certified Macrovision copy protection detection on composite and S-Video inputs (NTSC,PAL)

Genlock output (RTC & TI formats) for downstream video encoder synchronization

•

Vertical Blank Interval Data Processor

•

Teletext (NABTS, WST)

Closed Caption (CC) and Extended Data Service (XDS)

Gemstar^TMOnline Program Guide compatible mode

Wide Screen Signaling (WSS)

Video Program System (VPS)

Vertical Interval Time Code (VITC)

Custom mode

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

1-4

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

•

Optional color space conversion via programmable 3x3 matrix

Optional 4:2:2 <-> 4:4:4 conversion

•

I C host port interface

Reduced power consumption: 1.8V digital core, 3.3V and 1.8V analog core with power-save (input-seek) and power-down

modes

•

Embedded RAM to allow user-downloadable configuration microcode (feature upgrade)

100-pin TQFP PowerPAD™ package

1.2 TVP5200 Applications

•

Digital TV

LCD Projector/Monitor

DLP Projector

Consumer A/V receivers

Digital image processing

Video conferencing

Multimedia

Digital video

Desktop video

Video capture / Video editing

Security applications

Professional video applications

1.3 Related Products

•

TVP5145 NTSC/PAL/SECAM 2x10-bit Digital Video Decoder with Macrovision™, Literature Number SLES029

TVP5040 NTSC/PAL 2x10-bit Digital Video Decoder with Macrovision™, Literature Number SLAS257D

TVP5031 NTSC/PAL 9-bit Digital Video Decoder with Macrovision™, Literature Number SLAS267C

TVP6000 NTSC/PAL Digital Video Encoder, Literature Number SLAS184

THS8200 ‘All-format’ component video encoder with triple 11-bit 205MSPS DACs, color space conversion and 2x video

interpolation, Literature Number SLES032

PowerPAD is a trademark of Texas Instruments.

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

1-5

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

1.4 Functional Block Diagram

Analog Front End

VBI Data Processor

CPU reg

Clamp/PGA

CVBS

Composite Processor

CH3 A/D

9 bit ADC

165 MSPS

CVBS/Y

Chroma

luma

processing

CbCr

chroma

processing

Clamp/PGA

GREEN

CPU reg

Fast switch

CH2 A/D

9 bit ADC

165 MSPS

Y/G

Component

Output

G/YCbCr

Processor

Formatter

Clamp/PGA

BLUE

RED

B/CbCr

color space

conversion

Pb/B

Pr/R

gain/offset

adjustment

Cb/B

Cr/R

9 bit ADC

165 MSPS

CH1 A/D

CPU reg

Clamp/PGA

JTAG Interface

CPU

CH4 A/D

9 bit ADC

165 MSPS

sampling

clock

Host Interface

CPU reg

HSYN

VSYN

FID

Timing Processor

AVID

CPU reg

PALI

DATACLK

Figure 1-1. TVP5200 Block Diagram

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

1-6

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

1.5 Terminal Assignments

CH1_A33GND

CH1_A33VDD

CH2_A33VDD

CH2_A33GND

VI_GREEN_A

VI_GREEN_B

VI_GREEN_C

VI_GREEN_D

CH2_A18GND

CH2_A18VDD

A18VDD_REF

A18GND_REF

CH3_A18VDD

CH3_A18GND

VI_CVBS_A

BLUE_5

BLUE_6

BLUE_7

BLUE_8

BLUE_9

DGND

DVDD

GREEN_0

GREEN_1

GREEN_2

GREEN_3

GREEN_4

IOGND

TVP5200

100-Pin TQFP Package

(Top View)

IOVDD

GREEN_5

GREEN_6

GREEN_7

GREEN_8

GREEN_9

DGND

VI_CVBS_B

VI_CVBS_C

VI_CVBS_D

CH3_A33GND

CH3_A33VDD

CH4_A33VDD

CH4_A33GND

VI_RED_A

DVDD

RED_0

RED_1

VI_RED_B

RED_2

VI_RED_C

RED_3

Figure 1-2. TVP5200 Package Layout

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

1-7

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

1.6 Ordering Information

Packaged Devices

100-pin Plastic Flatpack PowerPAD™

TVP5200PZP

T_A

0°C to 70°C

1.7 Terminal Functions

Terminal

Name

Terminal

No.

I/O

Description

Analog Video

VI_BLUE_A

VI_BLUE_B

VI_BLUE_C

VI_GREEN_A

VI_GREEN_B

VI_GREEN_C

VI_GREEN_D

VI_CVBS_A

VI_CVBS_B

VI_CVBS_C

VI_RED_A

100

VI_x_A: Analog video input

VI_x_B: Analog video input

VI_x_C: Analog video input

VI_x_D: Analog video input

Up to fourteen composite, seven S-video or four component video inputs (or a

combination thereof) can be supported.

The four ADC input channels are basically identical and can be used for any

color component; colors are assigned to terminal names only for convenient

reference.

For component video and S-Video formats, the luma or chroma color

components can be fed to any one of the four 9-bit ADC input channels.

VI_RED_B

VI_RED_C

The SOG slicer only accepts inputs from either the GREEN or CVBS ADC

input channels.

The inputs must be AC coupled. The recommended coupling capacitor is 0.1 µF.

Clock Signals

XTAL1

XTAL2

External clock reference input.

External clock reference output.

DATACLK

Line-locked data output clock. The frequency of this output can be programmed

independently from the output format to 0.5x, 1x, or 2x the pixel clock

frequency, see register ‘Sel_DATACLK[1:0]’

EXT_CLK

External Clock Input (optional). This pin may be used to provide an external

pixel clock to the TVP5200, instead of the clock generated by the internal PLL.

Digital Video

RED[9:0]

GREEN[9:0]

BLUE[9:0]

JTAG Signals¹

43-47,50-54

57-61,64-68

71-75,78-82

Digital video output

Unused outputs can be left unconnected.

TMS

Test Mode Select input. Used to enable JTAG test mode. Active high.

Miscellaneous

Signals

SLES037

PRODUCT PREVIEW 8/21/02

1-8

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

RSTINB

OEB

Reset input, active low.

Active low output enable for the 30-bit video output. When OEB is set logic 0,

the 30-bit output is placed in a high-impedance state. Allows multiplexing the

output of the TVP5200 with the output of another front end device e.g. a DVI

receiver.

FASTSWITCH

GLCO

Fast-Switch. Switching between synchronous component video (YPbPr / RGB)

and composite video inputs, or supporting selective color space conversion on

one of two externally switched synchronous component video sources.

Genlock Control Output (GLCO). 2 genlock data formats are available: T.I.

formats and Real Time Control (RTC) format.

GPCL

INTREQ

SDA

I/O

Programmable general purpose I/O.

Interrupt request.

I²C Data Bus.

SCL

I²C Clock input.

Power Supplies

NSUB

Substrate ground. Connect to analog ground.

Analog 3.3V return.

CH1_A33GND

CH2_A33GND

CH3_A33GND

CH4_A33GND

CH1_A33VDD

CH2_A33VDD

CH3_A33VDD

CH4_A33VDD

Analog power. Connect to 3.3V.

Analog 1.8V return.

CH1_A18GND

CH2_A18GND

CH3_A18GND

CH4_A18GND

CH1_A18VDD

CH2_A18VDD

CH3_A18VDD

CH4_A18VDD

Analog power. Connect to 1.8V.

A18GND_REF

A18VDD_REF

PLL_A18GND

PLL_A18VDD

DGND

Analog 1.8V return.

Analog power for reference 1.8V.

Analog power return.

Analog power. Connect to 1.8V.

Digital return.

42,56,70,84

41,55,69,83

49,63,77

48,62,76

DVDD

Digital power. Connect to 1.8V.

Digital power return.

IOGND

IOVDD

Digital power. Connect to 3.3V or less for reduced noise.

Sync Signals

HSYNC

Horizontal Sync Input (for modes with dedicated Hsync) or digital Composite

SLES037

PRODUCT PREVIEW 8/21/02

1-9

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

T^EXAS

TVP5200

I^NSTRUMENTS

All-Format Analog Video Signal Processor

Sync Input

VSYNC

PALI/HLK

FID/VLK

AVID

Vertical Sync Input. (for modes with dedicated Vsync)

PAL line indicator or horizontal lock indicator.

Odd/even Field indicator or vertical lock indicator.

Active Video Indicator.

VSOUT

Vertical Sync Output. This pin outputs either an unprocessed but delayed version

of the Vsync input, or a processed version from the Timing Generator.

SOGOUT

HSOUT

Sync-On-Green Slicer Output. This pin outputs either the signal from the Sync-

on-Green slicer or an unprocessed but delayed version of the Hsync input.

Horizontal Sync Output. This pin outputs either an unprocessed but delayed

version of the Hsync input, or a processed version from the Timing Generator.

Note 1: JTAG interface for manufacturing test purposes only.

SLES037

PRODUCT PREVIEW 8/21/02

Product Preview documents contain information on products

in the formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Insruments reserves

the right to change or discontinue the products without prior notice.

1-10

TVP5200PZP [TI]

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