TVS0500DRVR [TI]
5V 平缓钳位浪涌保护器件 | DRV | 6 | -40 to 125;
| 型号： | TVS0500DRVR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 5V 平缓钳位浪涌保护器件 | DRV | 6 | -40 to 125 |
| 文件： | 总22页 (文件大小：1951K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
TVS0500 5V 平缓钳位浪涌保护器件
1 特性
3 说明
1
•
保护特性符合针对工业信号线路的 2kV、42Ω IEC
TVS0500 可将高达 43A 的 IEC 61000-4-5 故障电流进
61000-4-5 浪涌测试要求
43A、8/20µs 浪涌电流下的最大钳位电压为 9.2V
关断电压：5V
行可靠分流，以保护系统免受高功率瞬态冲击或雷击。
该器件为满足常见的工业信号线路 EMC 要求提供了解
决方案，可通过 42Ω 电阻进行耦合的方式承受最高
2kV IEC 61000-4-5 开路电压。TVS0500 使用独特的
反馈机制确保在故障期间发挥精确的平缓钳位能力，保
证系统接触电压低于 10V。精确的电压调节允许设计
人员放心地选择具有较低电压容差的系统组件，不但减
少了系统成本和复杂度，而且不损害可靠性。
•
•
•
•
4mm2 小型封装尺寸
在 125°C 时，可耐受超过 5,000 次的 35A 8/20µs
浪涌电流的重复冲击
•
强大的浪涌保护：
–
–
IEC61000-4-5 (8/20µs)：43A
IEC61643-321 (10/1000µs)：22A
此外，TVS0500 还采用 2mm × 2mm 小型 SON 封
装，非常适用于空间受限 应用，与业内标准的 SMA
和 SMB 封装相比，尺寸减小了 70%。极低的器件泄
露电流和电容确保最大限度地降低了对受保护线路的影
响。为了确保在产品的整个寿命期间提供可靠保护，TI
在高温环境下对 TVS0500 进行了 5000 次重复浪涌冲
击测试，但器件性能未发生任何变化。
•
低泄漏电流
–
–
27°C 下为 70pA（典型值）
85°C 下为 6.5nA（典型值）
•
•
低电容：155pF
集成 4 级 IEC 61000-4-2 ESD 保护
2 应用
•
•
•
•
•
•
工业传感器
TVS0500 是 TI 的平缓钳位系列浪涌器件中的一款产
PLC I/O 模块
5V 电源线路
电器
品。有关该系列其他器件的更多信息，请参阅器件比较
表
器件信息(1)
医疗设备
智能仪表
器件型号
TVS0500
封装
SON (6)
封装尺寸（标称值）
2.00mm × 2.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
封装比较
对 8/20µs 浪涌事件的电压钳位响应
TVS0500 Flat-Clamp
DRV Footprint
2mm x 2mm
Conventional TVS
SMB Footprint
3.55mm x 5.3mm
10
20
30
Time (ꢀs)
Traditional TVS
TI Flat-Clamp
Copyright © 2018, Texas Instruments Incorporated
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSED2
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
目录
8.3 Feature Description................................................... 9
8.4 Reliability Testing...................................................... 9
8.5 Device Functional Modes ......................................... 9
Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Application ................................................. 11
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 4
Specifications......................................................... 5
7.1 Absolute Maximum Ratings ...................................... 5
7.2 ESD Ratings - JEDEC .............................................. 5
7.3 ESD Ratings - IEC .................................................... 5
7.4 Recommended Operating Conditions....................... 5
7.5 Thermal Information.................................................. 5
7.6 Electrical Characteristics........................................... 6
7.7 Typical Characteristics.............................................. 7
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
9
10 Power Supply Recommendations ..................... 12
11 Layout................................................................... 13
11.1 Layout Guidelines ................................................. 13
11.2 Layout Example .................................................... 13
12 器件和文档支持 ..................................................... 14
12.1 接收文档更新通知 ................................................. 14
12.2 社区资源................................................................ 14
12.3 商标....................................................................... 14
12.4 静电放电警告......................................................... 14
12.5 Glossary................................................................ 14
13 机械、封装和可订购信息....................................... 14
8
4 修订历史记录
Changes from Revision B (February 2018) to Revision C
Page
•
Fixed grammar error in the Reliability Testing section ........................................................................................................... 9
Changes from Revision A (February 2018) to Revision B
Page
•
•
Changed DC Breakdown Current MAX from 100 to 50 in the Specifications Absolute Maximum Ratings table ................. 5
Changed Break-down Voltage MIN from 7.6 to 7.5 and MAX from 8.2 to 8.4 in the Specifications Electrical
Characteristics table ............................................................................................................................................................... 5
Changes from Original (December 2017) to Revision A
Page
2
Copyright © 2017–2019, Texas Instruments Incorporated
TVS0500
www.ti.com.cn
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
5 Device Comparison Table
Vrwm leakage
Device
Vrwm
Vclamp at Ipp
Ipp (8/20 µs)
Package Options
Polarity
(nA)
0.07
2
TVS0500
TVS1400
TVS1800
TVS2200
TVS2700
TVS3300
5
9.2
18.4
22.8
27.7
32.5
38
43
43
40
40
40
35
SON
SON
Unidirectional
Unidirectional
Unidirectional
Unidirectional
Unidirectional
Unidirectional
14
18
22
27
33
0.5
3.2
1.7
19
SON
SON
SON
WCSP, SON
Copyright © 2017–2019, Texas Instruments Incorporated
3
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
6 Pin Configuration and Functions
DRV Package
6-Pin SON
Top View
1
6
5
4
GND
GND
IN
IN
IN
2
3
GND
GND
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
No.
IN
4, 5, 6
I
ESD and surge protected channel
Ground
1, 2, 3, exposed thermal
pad
GND
GND
4
Copyright © 2017–2019, Texas Instruments Incorporated
TVS0500
www.ti.com.cn
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
7 Specifications
7.1 Absolute Maximum Ratings
TA = 27℃ (unless otherwise noted)(1)
MIN
MAX
43
UNIT
A
IEC 61000-4-5 Current (8/20 µs)
IEC 61000-4-5 Power (8/20 µs)
IEC 61643-321 Current (10/1000 µs)
IEC 61643-321 Power (10/1000 µs)
IEC 61000-4-5 Current (8/20 µs)
IEC 61000-4-5 Power (8/20 µs)
IEC 61643-321 Current (10/1000 µs)
IEC 61643-321 Power (10/1000 µs)
IEC 61000-4-4 EFT Protection
DC Breakdown Current
400
20
W
Maximum
Surge
A
180
50
W
A
80
W
Maximum
Forward Surge
23
A
60
W
EFT
IBR
IF
80
A
50
mA
mA
°C
°C
DC Forward Current
500
125
150
TA
Ambient Operating Temperature
Storage Temperature
-40
-65
Tstg
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings - JEDEC
VALUE
UNIT
Human body model (HBM), per
±2000
ANSI/ESDA/JEDEC JS-001, all pins(1)
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins(2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 ESD Ratings - IEC
VALUE
UNIT
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air-gap discharge
±24
±30
V(ESD)
Electrostatic discharge
kV
7.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
NOM
MAX
UNIT
VRWM
Reverse Stand-off Voltage
5
V
7.5 Thermal Information
TVS0500
DRV (SON)
6 PINS
70.4
THERMAL METRIC(1)
UNIT
RqJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
°C/W
RqJC(top)
RqJB
73.7
40
YJT
2.2
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2017–2019, Texas Instruments Incorporated
5
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
Thermal Information (continued)
TVS0500
DRV (SON)
6 PINS
40.3
THERMAL METRIC(1)
UNIT
YJB
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
°C/W
°C/W
RqJC(bot)
11
7.6 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
0.07
6.5
38
MAX
UNIT
nA
nA
nA
V
Measured at VIN = VRWM, TA = 27°C
Measured at VIN = VRWM, TA = 85°C
Measured at VIN = VRWM, TA = 105°C
IIN = 1 mA from GND to IO
5.5
220
755
0.65
8.4
ILEAK
Leakage Current
VF
Forward Voltage
0.25
7.5
0.5
7.9
VBR
Break-down Voltage
IIN = 1 mA from IO to GND
V
35 A IEC 61000-4-5 Surge (8/20 µs)
from GND to IO, 27°C
VFCLAMP Forward Clamp Voltage
2
8.6
9.2
9.2
30
5
8.8
9.5
9.5
50
V
24 A IEC 61000-4-5 Surge (8/20 µs)
from IO to GND, VIN = 0 V before surge,
27°C
V
43 A IEC 61000-4-5 Surge (8/20 µs) from
IO to GND, VIN = 0 V before surge, 27°C
VCLAMP
Clamp Voltage
V
35 A IEC 61000-4-5 Surge (8/20 µs)
from IO to GND, VIN = VRWM before
surge, TA = 125°C
V
Calculated from VCLAMP at .5*Ipp and Ipp
surge current levels, 27°C
RDYN
8/20 µs surge dynamic resistance
mΩ
VIN = 5 V, f = 1 MHz, 30 mVpp, IO to
GND
CIN
SR
Input pin capacitance
Maximum Slew Rate
155
2.5
pF
0-VRWM rising edge, sweep rise time and
measure slew rate when IPEAK = 1 mA,
27°C
V/µs
0-VRWM rising edge, sweep rise time and
measure slew rate when IPEAK = 1 mA,
105°C
0.7
V/µs
6
版权 © 2017–2019, Texas Instruments Incorporated
TVS0500
www.ti.com.cn
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
7.7 Typical Characteristics
45
40
35
30
25
20
15
10
5
12
11
10
9
48
TVS0500 Voltage
Surge Current
-40°C
Current (A)
25°C
105°C
125°C
44
40
36
32
28
24
20
16
12
8
8
7
6
5
4
3
2
1
4
0
0
0
-5
-1
-4
0
10
20
Time (ms)
30
40
50
0
10
20
30
Time (ms)
40
50
60
D001
D002
图 1. 8/20 µs Surge Response at 43 A
图 2. 8/20 µs Surge Response at 35 A Across Temperature
400
360
320
280
240
200
160
120
80
200
175
150
125
100
75
50
25
0 V Bias
2.5 V Bias
5 V Vias
0
40
0
-25
-40 -20
0
20 40 60 80 100 120 140 160 180
Temperature (°C)
-40
-20
0
20
40 60
Temperature (°C)
80
100 120 140
D003
D004
f = 1 MHz, 30 mVpp, IO to GND
图 3. Capacitance vs Temperature Across Bias
图 4. Leakage Current vs Temperature at 5 V
0.0012
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-40°C
25°C
105°C
125°C
0.0009
0.0006
0.0003
0
-0.0003
-0.0006
-0.0009
-0.0012
-1
0
1
2
3
4
Voltage (V)
5
6
7
8
9
-40
-20
0
20
40 60
Temperature (°C)
80
100 120 140
D005
D006
图 5. I/V Curve Across Temperature
图 6. Forward Voltage vs Temperature
版权 © 2017–2019, Texas Instruments Incorporated
7
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
8.3
8.25
8.2
8.15
8.1
8.05
8
7.95
7.9
7.85
7.8
7.75
7.7
7.65
7.6
45
40
35
30
25
20
15
10
5
7.55
7.5
0
-40
-20
0
20
40 60
Temperature (°C)
80
100 120 140
-50
-30
-10
10
30 50
Temperature (°C)
70
90
110 130
D008
D007
图 7. Breakdown Voltage (1 mA) vs Temperature
图 8. Max Surge Current (8/20 µs) vs Temperature
100
Leakage (-40èC)
90
80
70
60
50
40
30
20
10
0
Leakage (25èC)
Leakage (85èC)
Leakage (105èC)
Leakage (125èC)
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
Slew Rate (V/ms)
3
D009
图 9. Dynamic Leakage vs Signal Slew Rate across Temperature
8
版权 © 2017–2019, Texas Instruments Incorporated
TVS0500
www.ti.com.cn
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
8 Detailed Description
8.1 Overview
The TVS0500 is a precision clamp with a low, flat clamping voltage during transient overvoltage events like surge
and protecting the system with zero voltage overshoot.
8.2 Functional Block Diagram
IN
Voltage Level
Detection
Power FET
Driver
GND
8.3 Feature Description
The TVS0500 is a precision clamp that handles 43 A of IEC 61000-4-5 8/20 µs surge pulse. The flat clamping
feature helps keep the clamping voltage very low to keep the downstream circuits from being stressed. The flat
clamping feature can also help end-equipment designers save cost by opening up the possibility to use lower-
cost, lower voltage tolerant downstream ICs. The TVS0500 has minimal leakage under the standoff voltage of 5
V, making it an ideal candidate for applications where low leakage and power dissipation is a necessity. IEC
61000-4-2 and IEC 61000-4-4 ratings make it a robust protection solution for ESD and EFT events. Wide
ambient temperature range of –40°C to +125°C a good candidate for most applications. Compact packages
enable it to be used in small devices and save board area.
8.4 Reliability Testing
To ensure device reliability, the TVS0500 is characterized against 5000 repetitive pulses of 35 A IEC 61000-4-5
8/20 µs surge pulses at 125°C. The test is performed with less than 10 seconds between each pulse at high
temperature to simulate worst case scenarios for fault regulation. After each surge pulse, the TVS0500 clamping
voltage, breakdown voltage, and leakage are recorded to ensure that there is no variation or performance
degradation. By ensuring robust, reliable, high temperature protection, the TVS0500 enables fault protection in
applications that must withstand years of continuous operation with no performance change.
8.5 Device Functional Modes
8.5.1 Protection Specifications
The TVS0500 is specified according to both the IEC 61000-4-5 and IEC 61643-321 standards. This enables
usage in systems regardless of which standard is required in relevant product standards or best matches
measured fault conditions. The IEC 61000-4-5 standards requires protection against a pulse with a rise time of 8
µs and a half length of 20 µs, while the IEC 61643-321 standard requires protection against a much longer pulse
with a rise time of 10 µs and a half length of 1000 µs.
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9
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
Device Functional Modes (接下页)
The positive and negative surges are imposed to the TVS0500 by a combinational waveform generator (CWG)
with a 2-Ω coupling resistor at different peak voltage levels. For powered on transient tests that need power
supply bias, inductances are usually used to decouple the transient stress and protect the power supply. The
TVS0500 is post tested by assuring that there is no shift in device breakdown or leakage at Vrwm
.
In addition, the TVS0500 has been tested according to IEC 61000-4-5 to pass a ±2 kV surge test through a 42-Ω
coupling resistor and a 0.5 µF capacitor. This test is a common test requirement for industrial signal I/O lines and
the TVS0500 will serve an ideal protection solution for applications with that requirement.
The TVS0500 allow integrates IEC 61000-4-2 level 4 ESD Protection and 80 A of IEC 61000-4-4 EFT Protection.
These combine to ensure that the device can protect against most transient conditions regardless of length or
type.
For more information on TI's test methods for Surge, ESD, and EFT testing, reference TI's IEC 61000-4-x
Testing Application Note
8.5.2 Minimal Derating
Unlike traditional diodes the TVS0500 has very little derating of max power dissipation and ensures robust
performance up to 125°C, shown in 图 8. Traditional TVS diodes lose up to 50% of their current carrying
capability when at high temperatures, so a surge pulse above 85°C ambient can cause failures that are not seen
at room temperature. The TVS0500 prevents this and ensures that you will see the same level of protection
regardless of temperature.
8.5.3 Transient Performance
During large transient swings, the TVS0500 will begin clamping the input signal to protect downstream
conditions. While this prevents damage during fault conditions, it can cause leakage when the intended input
signal has a fast slew rate. In order to keep power dissipation low and remove the chance of signal distortion, it
is recommended to keep the slew rate of any input signal on the TVS0500 below 2.5 V/µs at room temperature
and below 0.7 V/µs at 125°C shown in 图 9. Faster slew rates will cause the device to clamp the input signal and
draw current through the device for a few microseconds, increasing the rise time of the signal. This will not cause
any harm to the system or to the device, however if the fast input voltage swings occur regularly it can cause
device overheating.
10
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TVS0500
www.ti.com.cn
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TVS0500 can be used to protect any power, analog, or digital signal from transient fault conditions caused
by the environment or other electrical components.
9.2 Typical Application
TPS768
Connector
IN
OUT
B2
IN
TVS0500
GND
A2
Copyright © 2018, Texas Instruments Incorporated
图 10. TVS0500 Application Schematic
9.2.1 Design Requirements
A typical operation for the TVS0500 would be protecting a nominal 5 V input to an LDO similar to 图 10. In this
example, the TVS0500 is protecting the input to a TPS768, a standard 1 A LDO with an input voltage range of
2.7 V to 10 V. Without any input protection, if a surge event is caused by lightning, coupling, ringing, or any other
fault condition this input voltage will rise to hundreds of volts for multiple microseconds, violating the absolute
maximum input voltage and harming the device. An ideal surge protection diode will maximize the useable
voltage range while still clamping at a safe level for the system, TI's Flat-Clamp technology provides the best
protection solution.
9.2.2 Detailed Design Procedure
If the TVS0500 is in place to protect the device, during a surge event the voltage will rise to the breakdown of the
diode at 7.9 V, and then the TVS0500 will turn on, shunting the surge current to ground. With the low dynamic
resistance of the TVS0500, large amounts of surge current will have minimal impact on the clamping voltage.
The dynamic resistance of the TVS0500 is around 30 mΩ, which means 30 A of surge current will cause a
voltage raise of 30 A × 30 mΩ = 0.9 V. Because the device turns on at 7.9 V, this means the LDO input will be
exposed to a maximum of 7.9 V + 0.9 V = 8.8 V during surge pulses, well within the absolute maximum input
voltage. This ensures robust protection of your circuit.
The small size of the device also improves fault protection by lowering the effect of fault current coupling onto
neighboring traces. The small form factor of the TVS0500 allows the device to be placed extremely close to the
input connector, lowering the length of the path fault current will take through the system compared to larger
protection solutions.
Finally, the low leakage of the TVS0500 will have low input power losses. At 5 V, the device will see typical 70
pA leakage for a constant power dissipation of less than 1 nW, a negligible quantity that will not effect overall
efficiency metrics or add heating concerns.
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11
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
Typical Application (接下页)
9.2.3 Configuration Options
The TVS0500 can be used in either unidirectional or bidirectional configuration. 图 10 shows unidirectional usage
to protect an input. By placing two TVS0500's in series with reverse orientation, bidirectional operation can be
used, allowing a working voltage of ±5 V. TVS0500 operation in bidirectional will be similar to unidirectional
operation, with a minor increase in breakdown voltage and clamping voltage. The TVS3300 bidirectional
performance has been characterized in the TVS3300 Configurations Characterization. While the TVS0500 in
bidirectional configuration has not specifically been characterized, it will have similar relative changes to the
TVS3300 in bidirectional configuration.
10 Power Supply Recommendations
The TVS0500 is a clamping device so there is no need to power it. To ensure the device functions properly do
not violate the recommended VIN voltage range (0 V to 5 V) .
12
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TVS0500
www.ti.com.cn
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
11 Layout
11.1 Layout Guidelines
The optimum placement is close to the connector. EMI during an ESD event can couple from the trace being
struck to other nearby unprotected traces, resulting in early system failures. The PCB designer must minimize
the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are
between the TVS and the connector.
Route the protected traces straight.
Eliminate any sharp corners on the protected traces between the TVS0500 and the connector by using rounded
corners with the largest radii possible. Electric fields tend to build up on corners, increasing EMI coupling.
11.2 Layout Example
GND Plane
Protected
Input
Connector
Input
GND
图 11. TVS0500 Layout
版权 © 2017–2019, Texas Instruments Incorporated
13
TVS0500
ZHCSHJ8C –DECEMBER 2017–REVISED NOVEMBER 2019
www.ti.com.cn
12 器件和文档支持
12.1 接收文档更新通知
要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
12.2 社区资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 商标
E2E is a trademark of Texas Instruments.
12.4 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
14
版权 © 2017–2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TVS0500DRVR
ACTIVE
WSON
DRV
6
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
1HRH
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TVS0500DRVR
WSON
DRV
6
3000
180.0
8.4
2.3
2.3
1.15
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
WSON DRV
SPQ
Length (mm) Width (mm) Height (mm)
210.0 185.0 35.0
TVS0500DRVR
6
3000
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRV 6
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4206925/F
PACKAGE OUTLINE
DRV0006A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
A
B
PIN 1 INDEX AREA
2.1
1.9
0.8
0.7
C
SEATING PLANE
0.08 C
(0.2) TYP
0.05
0.00
1
0.1
EXPOSED
THERMAL PAD
3
4
6
2X
7
1.3
1.6 0.1
1
4X 0.65
0.35
0.25
6X
PIN 1 ID
(OPTIONAL)
0.3
0.2
6X
0.1
C A
C
B
0.05
4222173/B 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRV0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
6X (0.45)
6X (0.3)
(1)
1
7
6
SYMM
(1.6)
(1.1)
4X (0.65)
4
3
SYMM
(1.95)
(R0.05) TYP
(
0.2) VIA
TYP
LAND PATTERN EXAMPLE
SCALE:25X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4222173/B 04/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DRV0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
7
6X (0.45)
METAL
1
6
6X (0.3)
(0.45)
SYMM
4X (0.65)
(0.7)
4
3
(R0.05) TYP
(1)
(1.95)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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