TXS0102QDCURQ1 [TI]
用于漏极开路和推挽应用的汽车类 2 位双向电压电平转换器 | DCU | 8 | -40 to 125;
| 型号： | TXS0102QDCURQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 用于漏极开路和推挽应用的汽车类 2 位双向电压电平转换器 | DCU | 8 | -40 to 125 光电二极管 接口集成电路 转换器 电平转换器 |
| 文件： | 总27页 (文件大小：1361K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TXS0102-Q1
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
适用于漏极开路和推挽应用的 TXS0102-Q1 2 位双向
电压电平 转换器
1 特性
3 说明
1
•
•
符合汽车应用 要求
具有符合 AEC-Q100 标准的下列结果：
由于电压不匹配，TXS0102-Q1 器件连接芯片与芯片
间的非兼容逻辑通信。这款自动导向转换器可方便地用
来在无需主机方向控制的情况下缩小电压之间的差距。
在无需主机干预的情况下，每个通道可混合使用，并且
可以与不同的输出类型（开漏或推挽）和混合数据流
（发送或接收）相匹配。这个 4 位非反向转换器使用
两个独立的可配置电源轨。A 和 B 端口被设计用来分
别跟踪 VCCA 和 VCCB。VCCB 引脚在 VCCA 引脚接受
1.65V 至 3.6V 之间的任一电源电压的同时，接受 2.3V
至 5.5V 之间的任何电源电压，这样的话，VCCA 小于
或等于 VCCB。这个跟踪功能可实现 1.8V，2.5V，3.3V
和 5V 电压节点之间的低电压双向转换。
–
–
–
器件温度 1 级：-40℃ 至 +125℃ 的环境运行温
度范围
器件人体模型 (HBM) 静电放电 (ESD) 分类等级
2
充电器件模型 (CDM) ESD 分类等级 C5
•
ESD 保护符合 JESD 22 规范的要求
–
A 端口
–
–
2500V 人体放电模式 (A114-B)
750V 组件充电模式 (C101)
–
B 端口
–
–
8kV 人体放电模式 (A114-B)
750V 组件充电模式 (C101)
当输出使能端 (OE) 输入为低电平时，所有输出都被置
于高阻抗状态。
•
•
无需方向控制信号
最大数据速率
TXS0102-Q1 器件被设计成 OE 输入电路由 VCCA 供
电。
–
–
最大值 24Mbps（推挽）
2Mbps（开漏）
为了确保加电或断电期间的高阻抗状态，OE 引脚必须
通过一个下拉电阻器接到 GND 引脚；此电阻器的最小
值由驱动器的拉电流能力决定。
•
•
采用德州仪器的 NanoFree™封装
A 端口上 1.65V 至 3.6V，B 端口上 2.3V 至 5.5V
(VCCA ≤ VCCB
)
器件信息(1)
•
无需电源排序 — VCCA 或 VCCB 可首先斜升
器件型号
TXS0102-Q1
封装
封装尺寸（标称值）
2 应用
超薄小外形尺寸封
装 (VSSOP)(8)
2.30mm x 2.00mm
•
•
•
•
车用信息娱乐
(1) 如需了解所有可用封装，请见数据表末尾的可订购产品附录。
高级驾驶员辅助系统 (ADAS)
主处理器和外设模块间的隔离和电平转换
I2C 或 1 线制电压电平转换
N 通道晶体管的传输特征
3.2
2.8
2.4
2
VG = 4.3 V
VG = 3.5 V
VG = 2.8 V
VG = 2.5 V
VG = 2.2 V
1.6
1.2
0.8
0.4
0
0
1
2
3
4
5
Input Voltage (V)
D004
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SCES854
TXS0102-Q1
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
www.ti.com.cn
目录
7.2 Voltage Waveforms................................................. 13
Detailed Description ............................................ 14
8.1 Overview ................................................................. 14
8.2 Functional Block Diagram ....................................... 14
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 15
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical Application .................................................. 16
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Timing Requirements — VCCA = 1.8 V ± 0.15 V....... 5
6.7 Timing Requirements — VCCA = 2.5 V ± 0.2 V ........ 6
6.8 Timing Requirements — VCCA = 3.3 V ± 0.3 V......... 6
6.9 Switching Characteristics — VCCA = 1.8 V ± 0.15 V. 6
6.10 Switching Characteristics — VCCA = 2.5 V ± 0.2 V. 8
8
9
10 Power Supply Recommendations ..................... 17
11 Layout................................................................... 18
11.1 Layout Guidelines ................................................. 18
11.2 Layout Example .................................................... 18
12 器件和文档支持 ..................................................... 19
12.1 文档支持................................................................ 19
12.2 接收文档更新通知 ................................................. 19
12.3 社区资源................................................................ 19
12.4 商标....................................................................... 19
12.5 静电放电警告......................................................... 19
12.6 Glossary................................................................ 19
13 机械、封装和可订购信息....................................... 19
6.11 Switching Characteristics — VCCA = 3.3 V ± 0.3
V............................................................................... 10
6.12 Typical Characteristics.......................................... 11
Parameter Measurement Information ................ 12
7.1 Load Circuits ........................................................... 12
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Original (May 2014) to Revision A
Page
•
•
•
•
Changed Handling Ratings table to ESD Ratings table ......................................................................................................... 4
已更改 Functional Block Diagram with new figure................................................................................................................ 14
已更改 TXS0102-Q1 Layout Example with new figure......................................................................................................... 18
已添加 文档支持、接收文档更新通知以及社区资源.............................................................................................................. 19
2
Copyright © 2014–2017, Texas Instruments Incorporated
TXS0102-Q1
www.ti.com.cn
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
5 Pin Configuration and Functions
DCU Package
8-Pin VSSOP
Top View
B1
1
8
7
6
5
B2
GND
VCCA
A2
2
3
4
VCCB
OE
A1
Pin Functions
PIN
I/O
DESCRIPTION
NAME
A1
NO.
5
I/O Input-output 1 for the A port. This pin is referenced to VCCA
I/O Input-output 2 for the A port. This pin is referenced to VCCA
I/O Input-output 1 for the B port. This pin is referenced to VCCB
I/O Input-output 2 for the B port. This pin is referenced to VCCB
.
.
.
.
A2
4
B1
8
B2
1
GND
2
—
Ground
Tri-state output-mode enable. Pull the OE pin low to place all outputs in tri-state mode. This pin is
referenced to VCCA
OE
6
I
.
VCCA
VCCB
3
7
—
—
A-port supply voltage. 1.65 V ≤ VCCA ≤ 3.6 V and VCCA ≤ VCCB
.
B-port supply voltage. 2.3 V ≤ VCCB ≤ 5.5 V.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
MAX
4.6
UNIT
VCCA
Supply voltage
VCCB
V
6.5
A1, A2
A port
B port
A port
B port
A port
B port
VI < 0
VO < 0
4.6
(2)
Input-output pin voltage, VIO
V
V
V
B1, B2
6.5
4.6
Voltage range applied to any output in the high-
impedance or power-off state(2)
6.5
Output voltage, VO
VCCA + 0.5
VCCB + 0.5
–50
Voltage range applied to any output in the high
or low state(2)(3)
Input clamp current, IIK
mA
mA
mA
mA
°C
Output clamp current, IOK
Continuous output current, IO
–50
±50
Continuous current through each VCCA, VCCB, or GND
±100
150
Tstg
TJ
Storage temperature
Junction temperature
–65
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCCA and VCCB are provided in the recommended operating conditions table.
Copyright © 2014–2017, Texas Instruments Incorporated
3
TXS0102-Q1
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
www.ti.com.cn
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per AEC Q100-002(1)
A Port
B Port
A Port
B Port
±2500
8000
V
Electrostatic
discharge
V(ESD)
Charged device model (CDM), per AEC Q100-011
±750
V
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
MIN
MAX
3.6
UNIT
VCCA
VCCB
Supply voltage(1)
Supply voltage(1)
1.65
V
2.3
5.5
1.65 to 1.95 V
2.3 to 3.6 V
VCCA – 0.2
VCCA
VCCA
VCCB
5.5
VIH(Ax)
High-level input voltage
A-port I/Os
2.3 to 5.5 V
2.3 to 5.5 V
VCCA – 0.4
V
V
VIH(Bx)
VIH(OE)
VIL(Ax)
VIL(Bx)
VIL(OE)
High-level input voltage
High-level input voltage
Low-level input voltage
Low-level input voltage
Low-level input voltage
B-port I/Os
OE input
VCCB – 0.4
1.65 to 3.6 V
VCCA × 0.65
A-port I/Os
B-port I/Os
OE input
0
0
0
0.15
1.65 to 3.6 V
2.3 to 5.5 V
2.3 to 5.5 V
0.15
VCCA × 0.35
10
A-port I/Os,
push-pull driving
Δt/Δv(Ax)
Δt/Δv(Bx)
Input transition rise or fall rate
Input transition rise or fall rate
B-port I/Os,
push-pull driving
1.65 to 3.6 V
10
ns/V
°C
Δt/Δv(OE)
Input transition rise or fall rate
Operating free-air temperature
OE input
10
TA
–40
125
(1) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
6.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
TXS0102-Q1
THERMAL METRIC(1)
DCU (VSSOP)
8 PINS
199.1
72.4
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
RθJB
ψJT
Junction-to-board thermal resistance
77.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
6.2
ψJB
77.4
RθJC(bot) Junction-to-case (bottom) thermal resistance
—
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2014–2017, Texas Instruments Incorporated
TXS0102-Q1
www.ti.com.cn
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
VCCA
VCCB
MIN
TYP MAX
UNIT
High-level output voltage,
A port
IOH = –20 µA,
VI(Bx) ≥ VCCB – 0.4 V
TA = –40°C
to +125°C
VCCA
0.67
×
VOH(Ax)
VOL(Ax)
VOH(Bx)
VOL(Bx)
1.65 to 3.6 V
2.3 to 5.5 V
V
Low-level output voltage,
A port
IOL = 1 mA,
VI(Bx) ≤ 0.15 V
TA = –40°C
to +125°C
1.65 to 3.6 V
1.65 to 3.6 V
1.65 to 3.6 V
2.3 to 5.5 V
2.3 to 5.5 V
2.3 to 5.5 V
0.4
V
V
V
High-level output voltage,
B port
IOH = –20 µA,
VI(Ax) ≥ VCCA – 0.2 V
TA = –40°C
to +125°C
VCCB
0.67
×
Low-level output voltage,
B port
IOL = 1 mA,
VI(Ax) ≤ 0.15 V
TA = –40°C
to +125°C
0.4
±1
±2
TA = 25°C
II(OE)
Input current OE
VI = VCCI or GND
1.65 to 3.6 V
2.3 to 5.5 V
µA
TA = –40°C
to +125°C
TA = 25°C
±1
±2
±1
±2
±1
A port
0 V
0 to 5.5 V
0 V
µA
µA
Power-off
leakage
current
TA = –40°C to +125°C
TA = 25°C
I OFF
B port
0 to 3.6 V
TA = –40°C to +125°C
TA = 25°C
Off-state
A or B
output current port
IOZ
OE = VIL
1.65 to 3.6 V
2.3 to 5.5 V
µA
µA
TA = –40°C
to +125°C
±2
1.65 to VCCB
2.3 to 5.5 V
4
2.2
–1
21
–1
1
VI = VO = Open,
IO = 0
TA = –40°C
to +125°C
ICCA
Supply current, A port
3.6 V
0
5.5 V
0
1.65 to VCCB
3.6 V
2.3 to 5.5 V
0
VI = VO = Open,
IO = 0
TA = –40°C
to +125°C
ICCB
Supply current, B port
µA
0
5.5 V
ICCA+ICC Supply current, A port plus VI = VO = Open,
TA = –40°C
to +125°C
1.65 to VCCB
3.3 V
2.3 to 5.5 V
3.3 V
25
µA
pF
B port supply current
IO = 0
B
TA = 25°C
2.5
3.5
5
Input
capacitance
CI(OE)
OE
TA = –40°C to +125°C
TA = 25°C
CIO(Ax)
A port
Input-output
capacitance
B port
TA = –40°C to +125°C
TA = 25°C
6.5
12
7.5
3.3 V
3.3 V
pF
CIO(Bx)
TA = –40°C to +125°C
(1) VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
6.6 Timing Requirements — VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
18
21
23
2
UNIT
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Data rate
Mbps
2
2
55
47
43
Pulse duration
See 图 7
tw
Data inputs
ns
500
500
500
Copyright © 2014–2017, Texas Instruments Incorporated
5
TXS0102-Q1
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
www.ti.com.cn
6.7 Timing Requirements — VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCB = 2.5 V ± 0.2 V
20
22
24
2
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Data rate
Mbps
2
2
50
45
41
Pulse duration
See 图 7
tw
Data inputs
ns
500
500
500
6.8 Timing Requirements — VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
22
24
2
UNIT
VCCB = 3.3 V ± 0.3 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Data rate
Mbps
2
45
41
Pulse duration
See 图 7
tw
Data inputs
ns
500
500
6.9 Switching Characteristics — VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
5.3
5.4
6.8
8.8
9.6
10
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Propagation delay time
(high to low)
See 图 8
tPHL(A-B)
From A (input) to B (output)
ns
4.4
4.5
4.7
5.3
4.4
4
Propagation delay time
(high to low)
See 图 8
tPHL(B-A)
From B (input) to A (output)
6
Copyright © 2014–2017, Texas Instruments Incorporated
TXS0102-Q1
www.ti.com.cn
ZHCSCH5A –MAY 2014–REVISED SEPTEMBER 2017
Switching Characteristics — VCCA = 1.8 V ± 0.15 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
6.8
7.1
7.5
50
UNIT
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Propagation delay time
tPLH(A-B)
(low to high)
See 图 8
From A (input) to B (output)
40
33
ns
5.3
4.5
0.5
36
Propagation delay time
(low to high)
tPLH(B-A)
From B (input) to A (output)
See 图 8
26
20
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
200
250
275
200
200
200
9.5
9.3
7.6
165
132
95
ten(OE-A)
ten(OE-B)
From OE (input) to A
or B (output)
Enable time
Disable time
ns
ns
tdis(OE-A)
tdis(OE-B)
From OE (input) to A
or B (output)
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
tr(Ax)
tr(Bx)
tf(Ax)
Rise time, A port
Rise time, B port
Fall time, A port
ns
38
30
22
10.8
9.1
7.6
145
106
58
ns
34
23
10
5.9
6
13.3
6.9
6.4
6.1
13.8
16.2
16.2
13.8
16.2
16.2
1
ns
tf(Bx)
Fall time, B port
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tsk
Channel-to-channel skew
1
ns
1
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Switching Characteristics — VCCA = 1.8 V ± 0.15 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
18
21
23
2
MAX
UNIT
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Maximum data rate
Mbps
Open-drain driving
2
2
6.10 Switching Characteristics — VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
3.2
3.7
3.8
6.3
6
UNIT
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Propagation delay time
tPHL(A-B)
tPHL(B-A)
tPLH(A-B)
tPLH(B-A)
(high to low)
See 图 8
From A (input) to B (output)
From B (input) to A (output)
From A (input) to B (output)
From B (input) to A (output)
5.8
3
ns
3.6
4.3
4.7
4.2
4
Propagation delay time
(high to low)
See 图 8
3.5
4.1
4.4
3.5
4.1
4.4
2.5
1.6
1
Propagation delay time
(low to high)
See 图 8
ns
Propagation delay time
(low to high)
2.5
1.6
1
See 图 8
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
200
200
250
200
200
200
7.4
6.6
5.6
149
121
89
ten(OE-A)
ten(OE-B)
Enable time
Disable time
From OE (input) to A or B (output)
From OE (input) to A or B (output)
ns
ns
tdis(OE-A)
tdis(OE-B)
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
tr(Ax)
Rise time, A port
ns
34
28
24
Open-drain driving
8
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Switching Characteristics — VCCA = 2.5 V ± 0.2 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
8.3
7.2
6.1
151
112
64
UNIT
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
tr(Bx)
Rise time, B port
Fall time, A port
Fall time, B port
ns
35
24
12
5.7
5.5
5.3
6.9
6.2
5.8
7.8
6.7
6.6
8.8
9.4
10.4
1
tf(Ax)
ns
tf(Bx)
ns
ns
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tsk
Channel-to-channel skew
Maximum data rate
1
1
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
20
22
24
2
Push-pull driving
Mbps
Open-drain driving
2
2
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6.11 Switching Characteristics — VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX UNIT
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
2.4
3.1
4.2
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Propagation delay time
tPHL(A-B) (high to low)
From A (input) to B (output)
From B (input) to A (output)
From A (input) to B (output)
From B (input) to A (output)
See 图 8
4.6
ns
2.5
Propagation delay time
tPHL(B-A) (high to low)
3.3
2.5
3.3
4.2
4.4
4.2
See 图 8
Propagation delay time
tPLH(A-B) (low to high)
See 图 8
4.4
ns
2.5
Propagation delay time
tPLH(B-A) (low to high)
2.6
2.5
2.6
See 图 8
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
200
ns
ten(OE-A)
ten(OE-B)
Enable time
Disable time
From OE (input) to A or B (output)
From OE (input) to A or B (output)
250
200
ns
200
tdis(OE-A)
tdis(OE-B)
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
5.6
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
4.8
ns
116
tr(Ax)
tr(Bx)
tf(Ax)
Rise time, A port
Rise time, B port
Fall time, A port
25
19
85
6.4
7.4
ns
116
26
14
72
5.4
5
ns
6.1
5.7
7.4
7.6
ns
7.6
tf(Bx)
Fall time, B port
8.3
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
1
tsk
Channel-to-channel skew
Maximum data rate
ns
1
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
22
24
2
Push-pull driving
Mbps
Open-drain driving
2
10
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6.12 Typical Characteristics
700
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
VCCB = 2.7 V
VCCB = 3.3 V
VCCB = 5 V
VCCB = 3.3 V
VCCB = 5 V
0
2
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
Low-Level Current (mA)
Low-Level Current (mA)
D001
D003
VCCA = 1.8 V
VIL(A) = 150 mV
VCCA = 2.7 V
VIL(A) = 150 mV
图 1. Low-Level Output Voltage (VOL(Bx)
)
图 2. Low-Level Output Voltage (VOL(Bx)
vs Low-Level Current (IOL(Bx)
)
vs Low-Level Current (IOL(Bx)
)
)
700
600
500
400
300
200
100
0
VCCB = 3.3 V
12 14 16
0
2
4
6
8
10
Low-Level Current (mA)
D002
VCCA = 3.3 V
VIL(A) = 150 mV
图 3. Low-Level Output Voltage (VOL(Bx)) vs Low-Level Current (IOL(Bx)
)
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7 Parameter Measurement Information
7.1 Load Circuits
V
V
V
CCI
V
CCI
CCO
CCO
TXS0102-Q1
IN
TXS0102-Q1
IN
OUT
OUT
1 Mꢀ
1 Mꢀ
15 pF
15 pF
图 4. Data Rate, Pulse Duration, Propagation Delay, 图 5. Data Rate, Pulse Duration, Propagation Delay,
Output Rise-Time and Fall-Time Measurement
Using a Push-Pull Driver
Output Rise-Time and Fall-Time Measurement
Using an Open-Drain Driver
2 × V
CCO
S1
Open
50 kꢀ
From output
under test
15 pF
50 kꢀ
TEST
S1
tPZL / tPLZ
2 × VCCO
Open
(tdis
)
tPHZ / tPZH
(ten)
图 6. Load Circuit for Enable-Time and Disable-Time Measurement
1. tPLZ and tPHZ are the same as tdis
.
2. tPZL and tPZH are the same as ten.
3. VCCI is the VCC associated with the input port.
4. VCCO is the VCC associated with the output port.
12
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7.2 Voltage Waveforms
VCCI
tw
Input
VCCI / 2
VCCI / 2
VCCI
0 V
Input
VCCI / 2
VCCI / 2
tPLH
tPHL
0 V
VOH
0.9 × VCCO
0.1 × VCCO
VCCO / 2
tr
Output
VCCO / 2
VOL
tf
图 7. Pulse Duration
图 8. Propagation Delay Times
VCCA
VCCA / 2
VCCA / 2
OE input
0 V
tPLZ
tPZL
VOH
Output
Waveform 1
S1 at 2 × VCCO
VCCO / 2
V
× 0.1
OH
VOL
(see Note 2)
tPHZ
tPZH
VOH
0 V
Output
Waveform 2
S1 at GND
(see Note 2)
V
× 0.9
OH
VCCO / 2
图 9. Enable and Disable Times
1. CL includes probe and jig capacitance.
2. Waveform 1 in 图 9 is for an output with internal such that the output is high, except when OE is high (see 图
6). Waveform 2 in 图 9 is for an output with conditions such that the output is low, except when OE is high.
3. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω,
dv/dt ≥ 1 V/ns.
4. The outputs are measured one at a time, with one transition per measurement.
5. tPLZ and tPHZ are the same as tdis
.
6. tPZL and tPZH are the same as ten.
7. tPLH and tPHL are the same as tpd.
8. VCCI is the VCC associated with the input port.
9. VCCO is the VCC associated with the output port.
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8 Detailed Description
8.1 Overview
The TXS0102-Q1 device is a directionless voltage-level translator specifically designed for translating logic
voltage levels. The A port is able to accept I/O voltages ranging from 1.65 V to 3.6 V, while the B port can accept
I/O voltages from 2.3 V to 5.5 V. The device is a pass gate architecture with edge rate accelerators (one shots)
to improve the overall data rate. 10-kΩ pullup resistors, commonly used in open drain applications, have been
conveniently integrated so that an external resistor is not needed. While this device is designed for open drain
applications, the device can also translate push-pull CMOS logic outputs.
8.2 Functional Block Diagram
14
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8.3 Feature Description
8.3.1 Architecture
The TXS0102-Q1 architecture (see 图 10) does not require a direction-control signal in order to control the
direction of data flow from A to B or from B to A.
VCCB
VCCA
One-shot
One-shot
T1
T2
10 kΩ
10 kΩ
Gate Bias
A
B
图 10. Architecture of a TXS01xx Cell
Each A-port I/O has an internal 10-kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10-kΩ pullup
resistor to VCCB. The output one-shots detect rising edges on the A or B ports. During a rising edge, the one-shot
turns on the PMOS transistors (T1, T2) for a short duration which speeds up the low-to-high transition.
8.3.2 Input Driver Requirements
The fall time (tfA, tfB) of a signal depends on the output impedance of the external device driving the data I/Os of
the TXS0102-Q1 device. Similarly, the tPHL and maximum data rates also depend on the output impedance of the
external driver. The values for tfA, tfB, tPHL, and maximum data rates in the data sheet assume that the output
impedance of the external driver is less than 50 Ω.
8.3.3 Power Up
During operation, assure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first.
8.3.4 Enable and Disable
The TXS0102-Q1 device has an OE input that disables the device by setting OE low, which places all I/Os in the
high-impedance state. The disable time (tdis) indicates the delay between the time when the OE pin goes low and
when the outputs actually enter the high-impedance state. The enable time (ten) indicates the amount of time the
user must allow for the one-shot circuitry to become operational after the OE pin is taken high.
8.3.5 Pullup and Pulldown Resistors on I/O Lines
Each A-port I/O has an internal 10-kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10-kΩ pullup
resistor to VCCB. If a smaller value of pullup resistor is required, an external resistor must be added from the I/O
to VCCA or VCCB (in parallel with the internal 10-kΩ resistors).
8.4 Device Functional Modes
The TXS0102-Q1 device has two functional modes, enabled and disabled. To disable the device set the OE
input low, which places all I/Os in a high impedance state. Setting the OE input high will enable the device.
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TXS0102-Q1 device can be used in level-translation applications for interfacing devices or systems
operating at different interface voltages with one another. The TXS0102-Q1 device is ideal for use in applications
where an open-drain driver is connected to the data I/Os.
9.2 Typical Application
1.8 V
3.3 V
0.1 µF
0.1 µF
V
V
CCA
OE
CCB
1.8-V
System
Controller
3.3-V
System
TXS0102-Q1
A1
A2
B1
B2
Data
Data
GND
图 11. Application Schematic
9.2.1 Design Requirements
For this design example, use the parameters listed in 表 1.
表 1. Design Parameters
DESIGN PARAMETER
Input voltage range
EXAMPLE VALUE
1.65 to 3.6 V
Output voltage range
2.3 to 5.5 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
•
Input voltage range
–
Use the supply voltage of the device that is driving the TXS0102-Q1 device to determine the input voltage
range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the value
must be less than the VIL of the input port.
•
Output voltage range
–
Use the supply voltage of the device that the TXS0102-Q1 device is driving to determine the output
voltage range.
–
The TXS0102-Q1 device has 10-kΩ internal pullup resistors. External pullup resistors can be added to
reduce the total RC of a signal trace if necessary.
16
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•
An external pull down resistor decreases the output VOH and VOL. Use 公式 1 to calculate the VOH as a result
of an external pull down resistor.
VOH = VCCx × RPD / (RPD + 10 kΩ)
where
•
•
VCCx is the supply voltage on either VCCA or VCCB
RPD is the value of the external pull down resistor
(1)
9.2.3 Application Curve
5 V
2 V
10 ns/div
VCCA = 1.8 V
VCCB = 5 V
图 12. Level-Translation of a 2.5-MHz Signal
10 Power Supply Recommendations
The TXS0102-Q1 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCB accepts any
supply voltage from 2.3 V to 5.5 V and VCCA accepts any supply voltage from 1.65 V to 3.6 V as long as VCCA is
less than or equal to VCCB. The A port and B port are designed to track VCCA and VCCB respectively allowing for
low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The TXS0102-Q1 device does not require power sequencing between VCCA and VCCB during power-up so the
power-supply rails can be ramped in any order. A VCCA value greater than or equal to VCCB (VCCA ≥ VCCB) does
not damage the device, but during operation, VCCA must be less than or equal to VCCB (VCCA ≤ VCCB) at all times.
The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the (OE) input is low, all
outputs are placed in the high-impedance state. To assure the high-impedance state of the outputs during power
up or power down, the OE input pin must be tied to GND through a pulldown resistor and must not be enabled
until VCCA and VCCB are fully ramped and stable. The minimum value of the pulldown resistor to ground is
determined by the current-sourcing capability of the driver.
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11 Layout
11.1 Layout Guidelines
To assure reliability of the device, following common printed-circuit board layout guidelines is recommended.
•
•
•
Bypass capacitors should be used on power supplies.
Short trace lengths should be used to avoid excessive loading.
PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one shot duration, approximately 30 ns, assuring that any reflection encounters low impedance at the
source driver.
•
To help adjust rise and fall times of signals depending on system requirements, place pads on the signal
paths for loading capacitors or pullup resistors.
11.2 Layout Example
[9D9b5
ꢀolygonal /opper ꢀour
ëL! to ꢀower ꢀlane
ëL! to Db5 ꢀlane (Lnner [ayer)
Ço /ontroller
Ço {ystem
1
2
8
7
6
ꢁ
.2
.1
Db5
ë//.
.ypass capacitor
.ypass capacitor
0ꢂ1uC
3
Yeep h9 low until ë//! and
ë//. are powered up
ë//!
!2
h9
!1
4
Ço /ontroller
Ço {ystem
图 13. TXS0102-Q1 Layout Example
18
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12 器件和文档支持
12.1 文档支持
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《逻辑器件简介》
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TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
12.4 商标
NanoFree, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页中包括机械封装、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据如有变更，恕
不另行通知和修订此文档。如欲获取此数据表的浏览器版本，请参阅左侧的导航。
版权 © 2014–2017, Texas Instruments Incorporated
19
PACKAGE OPTION ADDENDUM
www.ti.com
21-Apr-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TXS0102QDCURQ1
ACTIVE
VSSOP
DCU
8
3000 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
NG3R
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TXS0102-Q1 :
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Apr-2021
Catalog : TXS0102
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Jan-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TXS0102QDCURQ1
VSSOP
DCU
8
3000
180.0
8.4
2.25
3.35
1.05
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Jan-2018
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VSSOP DCU
SPQ
Length (mm) Width (mm) Height (mm)
213.0 191.0 35.0
TXS0102QDCURQ1
8
3000
Pack Materials-Page 2
PACKAGE OUTLINE
DCU0008A
VSSOP - 0.9 mm max height
S
C
A
L
E
6
.
0
0
0
SMALL OUTLINE PACKAGE
3.2
3.0
TYP
C
A
0.1 C
PIN 1 INDEX AREA
SEATING
PLANE
6X 0.5
8
1
2X
2.1
1.9
1.5
NOTE 3
4
5
0.25
0.17
8X
2.4
2.2
B
0.08
C A B
NOTE 3
SEE DETAIL A
0.9
0.6
0.12
GAGE PLANE
0.1
0.0
0.35
0.20
0 -6
(0.13) TYP
A
30
DETAIL A
TYPICAL
4225266/A 09/2014
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-187 variation CA.
www.ti.com
EXAMPLE BOARD LAYOUT
DCU0008A
VSSOP - 0.9 mm max height
SMALL OUTLINE PACKAGE
SEE SOLDER MASK
DETAILS
SYMM
8X (0.85)
(R0.05) TYP
8
8X (0.3)
1
SYMM
6X (0.5)
5
4
(3.1)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 25X
SOLDER MASK
OPENING
METAL UNDER
METAL
SOLDER MASK
OPENING
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4225266/A 09/2014
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DCU0008A
VSSOP - 0.9 mm max height
SMALL OUTLINE PACKAGE
8X (0.85)
SYMM
(R0.05) TYP
8
1
8X (0.3)
SYMM
6X (0.5)
4
5
(3.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 25X
4225266/A 09/2014
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
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Copyright © 2023，德州仪器 (TI) 公司
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