UA78L08 [TI]
μA78L00 Series Positive-Voltage Regulators;
| 型号： | UA78L08 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | μA78L00 Series Positive-Voltage Regulators |
| 文件： | 总27页 (文件大小：1030K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
μA78L00
www.ti.com
SLVS010U –JANUARY 1976–REVISED MAY 2011
μA78L00 Series Positive-Voltage Regulators
Check for Samples: μA78L00
1
FEATURES
DESCRIPTION
This series of fixed-voltage integrated-circuit voltage
•
•
•
•
•
3-Terminal Regulators
regulators is designed for wide range of
a
Output Current up to 100 mA
No External Components
applications. These applications include on-card
regulation for elimination of noise and distribution
problems associated with single-point regulation. In
addition, they can be used with power-pass elements
to make high-current voltage regulators. One of these
regulators can deliver up to 100 mA of output current.
The internal limiting and thermal-shutdown features of
these regulators essentially make them immune to
overload. When used as a replacement for a Zener
diode-resistor combination, an effective improvement
in output impedance can be obtained, together with
lower bias current.
Internal Thermal-Overload Protection
Internal Short-Circuit Current Limiting
The μA78L00C and μA78L00AC series devices are
characterized for operation over the virtual junction
temperature range of 0°C to 125°C. The μA78L05AI
device is characterized for operation over the virtual
junction temperature range of −40°C to 125°C.
D PACKAGE
(TOP VIEW)
LP PACKAGE
PK PACKAGE
(TOP VIEW)
(TO-92, TO-226AA)
(TOP VIEW)
INPUT
1
2
3
4
8
7
6
5
OUTPUT
COMMON
COMMON
NC
INPUT
INPUT
COMMON
COMMON
NC
COMMON
OUTPUT
COMMON
OUTPUT
NC – No internal connection
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1976–2011, Texas Instruments Incorporated
μA78L00
SLVS010U –JANUARY 1976–REVISED MAY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Schematic
INPUT
20 kΩ
OUTPUT
1 kΩ to 14 kΩ
1.4 kΩ
COMMON
NOTE: Resistor values shown are nominal.
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Absolute Maximum Ratings(1)
over virtual junction temperature range (unless otherwise noted)
MIN
MAX
30
UNIT
μA78L02AC, μA78L05C–μA78L09C, μA78L10AC
μA78L12C, μA78L12AC, μA78L15C, μA78L15AC
VI
Input voltage
V
35
TJ
Virtual junction temperature
Storage temperature range
150
150
°C
°C
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Package Thermal Data(1)
PACKAGE
BOARD
θJC
θJA
SOIC (D)
High K, JESD 51-7
High K, JESD 51-7
High K, JESD 51-7
39°C/W
55°C/W
9°C/W
97°C/W
140°C/W
52°C/W
TO-92/TO-226AA (LP)
SOT-89 (PK)
(1) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. Due to variations in
individual device electrical characteristics and thermal resistance, the built-in thermal-overload protection may be activated at power
levels slightly above or below the rated dissipation.
Recommended Operating Conditions
MIN
4.75
7
MAX
20
UNIT
μA78L02AC
μA78L05C, μA78L05AC
μA78L06C, μA78L06AC
μA78L08C, μA78L08AC
μA78L09C, μA78L09AC
μA78L10AC
20
8.5
20
10.5
11.5
12.5
14.5
17.5
23
VI
Input voltage
V
24
25
μA78L12C, μA78L12AC
μA78L15C, μA78L15AC
27
30
IO
Output current
100
125
125
mA
°C
μA78LxxC and μA78LxxAC series
μA78L05AI
0
TJ
Operating virtual junction temperature
–40
Copyright © 1976–2011, Texas Instruments Incorporated
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uA78L02 Electrical Characteristics
at specified virtual junction temperature, VI = 9 V, IO = 40 mA (unless otherwise noted)
μA78L02AC
TYP
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
2.5
MAX
2.7
25°C
2.6
VI = 4.75 V to 20 V, IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
2.45
2.45
2.75
2.75
100
75
V
IO = 1 mA to 70 mA
VI = 4.75 V to 20 V
VI = 5 V to 20 V
20
16
51
12
6
Input voltage regulation
Ripple rejection
25°C
25°C
25°C
mV
dB
VI = 6 V to 20 V, f = 120 Hz
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
f = 10 Hz to 100 kHz
43
50
25
Output voltage regulation
mV
Output noise voltage
Dropout voltage
25°C
25°C
25°C
125°C
30
1.7
3.6
μV
V
6
5.5
2.5
0.1
Bias current
mA
mA
VI = 5 V to 20 V
Bias current change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
uA78L05 Electrical Characteristics
at specified virtual junction temperature, VI = 10 V, IO = 40 mA (unless otherwise noted)
μA78L05AC
μA78L05AI
μA78L05C
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
4.6
4.5
4.5
TYP
MAX
5.4
MIN
4.8
TYP
MAX
5.2
25°C
5
5
VI = 7 V to 20 V,
IO = 1 mA to 40 mA
Output voltage
Full range
Full range
5.5
4.75
4.75
5.25
5.25
150
100
V
IO = 1 mA to 70 mA
VI = 7 V to 20 V
5.5
32
26
49
15
8
200
150
32
26
49
15
8
Input voltage
regulation
25°C
25°C
25°C
mV
dB
VI = 8 V to 20 V
Ripple rejection
VI = 8 V to 18 V, f = 120 Hz
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
40
41
60
30
60
30
Output voltage
regulation
mV
Output noise
voltage
f = 10 Hz to 100 kHz
25°C
42
42
μV
Dropout voltage
25°C
25°C
1.7
3.8
1.7
3.8
V
6
5.5
1.5
0.2
6
5.5
1.5
0.1
Bias current
mA
mA
125°C
VI = 8 V to 20 V
Bias current
change
Full range
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output. Full range for the
μA78L05AC is TJ = 0°C to 125°C, and full range for the μA78L05AI is TJ = –40°C to 125°C.
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uA78L06 Electrical Characteristics
at specified virtual junction temperature, VI = 12 V, IO = 40 mA (unless otherwise noted)
μA78L06C
μA78L06AC
TYP
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
5.7
5.6
5.6
TYP
MAX
6.7
MIN
5.95
5.9
MAX
6.45
6.5
25°C
6.2
6.2
VI = 8.5 V to 20 V,
IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
6.8
V
IO = 1 mA to 70 mA
VI = 8.5 V to 20 V
VI = 9 V to 20 V
6.8
5.9
6.5
35
29
200
150
35
29
175
125
Input voltage
regulation
25°C
25°C
25°C
25°C
mV
dB
VI = 10 V to 20 V,
f = 120 Hz
Ripple rejection
39
48
40
48
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
16
9
80
40
16
9
80
40
Output voltage
regulation
mV
Output noise
voltage
f = 10 Hz to 100 kHz
46
46
μV
Dropout voltage
25°C
25°C
1.7
3.9
1.7
3.9
V
6
5.5
1.5
0.2
6
5.5
1.5
0.1
Bias current
mA
mA
125°C
VI = 9 V to 20 V
Bias current
change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
uA78L08 Electrical Characteristics
at specified virtual junction temperature, VI = 14 V, IO = 40 mA (unless otherwise noted)
μA78L08C
μA78L08AC
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
7.36
7.2
TYP
MAX
8.64
8.8
MIN
7.7
7.6
7.6
TYP
MAX
8.3
25°C
8
8
VI = 10.5 V to 23 V,
IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
8.4
V
IO = 1 mA to 70 mA
VI = 10.5 V to 23 V
VI = 11 V to 23 V
7.2
8.8
8.4
42
36
200
150
42
36
175
125
Input voltage
regulation
25°C
25°C
25°C
25°C
mV
dB
VI = 13 V to 23 V,
f = 120 Hz
Ripple rejection
36
46
37
46
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
18
10
80
40
18
10
80
40
Output voltage
regulation
mV
Output noise
voltage
f = 10 Hz to 100 kHz
54
54
μV
Dropout voltage
25°C
25°C
1.7
4
1.7
4
V
6
5.5
1.5
0.2
6
5.5
1.5
0.1
Bias current
mA
mA
125°C
VI = 11 V to 23 V
Bias current
change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
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uA78L09 Electrical Characteristics
at specified virtual junction temperature, VI = 16 V, IO = 40 mA (unless otherwise noted)
μA78L09C
μA78L09AC
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
8.3
8.1
8.1
TYP
MAX
9.7
MIN
8.6
TYP
MAX
9.4
25°C
9
9
VI = 12 V to 24 V,
IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
9.9
8.55
8.55
9.45
9.45
175
125
V
IO = 1 mA to 70 mA
VI = 12 V to 24 V
VI = 13 V to 24 V
9.9
45
40
225
175
45
40
Input voltage
regulation
25°C
25°C
25°C
25°C
mV
dB
VI = 15 V to 25 V,
f = 120 Hz
Ripple rejection
36
45
38
45
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
19
11
90
40
19
11
90
40
Output voltage
regulation
mV
Output noise
voltage
f = 10 Hz to 100 kHz
58
58
μV
Dropout voltage
25°C
25°C
1.7
4.1
1.7
4.1
V
6
5.5
1.5
0.2
6
5.5
1.5
0.1
Bias current
mA
mA
125°C
VI = 13 V to 24 V
Bias current
change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
uA78L10 Electrical Characteristics
at specified virtual junction temperature, VI = 14 V, IO = 40 mA (unless otherwise noted)
μA78L10AC
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
9.6
9.5
9.5
TYP
MAX
10.4
10.5
10.5
175
25°C
10
VI = 13 V to 25 V, IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
V
IO = 1 mA to 70 mA
VI = 13 V to 25 V
51
42
44
20
11
62
1.7
4.2
Input voltage regulation
Ripple rejection
25°C
25°C
25°C
mV
dB
VI = 14 V to 25 V
125
VI = 15 V to 25 V, f = 120 Hz
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
f = 10 Hz to 100 kHz
37
90
40
Output voltage regulation
mV
Output noise voltage
Dropout voltage
25°C
25°C
25°C
125°C
μV
V
6
5.5
1.5
0.1
Bias current
mA
mA
VI = 14 V to 25 V
Bias current change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
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uA78L12 Electrical Characteristics
at specified virtual junction temperature, VI = 19 V, IO = 40 mA (unless otherwise noted)
μA78L12C
μA78L12AC
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
11.1
10.8
10.8
TYP
MAX
12.9
13.2
13.2
250
MIN
11.5
11.4
11.4
TYP
MAX
12.5
12.6
12.6
250
25°C
12
12
VI = 14 V to 27 V,
IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
V
IO = 1 mA to 70 mA
VI = 14.5 V to 27 V
VI = 16 V to 27 V
55
49
55
49
Input voltage
regulation
25°C
25°C
25°C
25°C
mV
dB
200
200
VI = 15 V to 25 V,
f = 120 Hz
Ripple rejection
36
42
37
42
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
22
13
100
50
22
13
100
50
Output voltage
regulation
mV
Output noise
voltage
f = 10 Hz to 100 kHz
70
70
μV
Dropout voltage
25°C
25°C
1.7
4.3
1.7
4.3
V
6.5
6
6.5
6
Bias current
mA
mA
125°C
VI = 16 V to 27 V
1.5
0.2
1.5
0.1
Bias current
change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
uA78L15 Electrical Characteristics
at specified virtual junction temperature, VI = 23 V, IO = 40 mA (unless otherwise noted)
μA78L15C
TYP
μA78L15AC
(1)
PARAMETER
TEST CONDITIONS
TJ
UNIT
MIN
13.8
13.5
13.5
MAX
16.2
16.5
16.5
300
MIN
14.4
TYP
MAX
15.6
15.75
15.75
300
25°C
15
15
VI = 17.5 V to 30 V,
IO = 1 mA to 40 mA
Output voltage
0°C to 125°C
0°C to 125°C
14.25
14.25
V
IO = 1 mA to 70 mA
VI = 17.5 V to 30 V
VI = 20 V to 30 V
65
58
65
58
Input voltage
regulation
25°C
25°C
25°C
25°C
mV
dB
250
250
VI = 18.5 V to 28.5 V,
f = 120 Hz
Ripple rejection
33
39
34
39
IO = 1 mA to 100 mA
IO = 1 mA to 40 mA
25
15
150
75
25
15
150
75
Output voltage
regulation
mV
Output noise
voltage
f = 10 Hz to 100 kHz
82
82
μV
Dropout voltage
25°C
25°C
1.7
4.6
1.7
4.6
V
6.5
6
6.5
6
Bias current
mA
mA
125°C
VI = 10 V to 30 V
1.5
0.2
1.5
0.1
Bias current
change
0°C to 125°C
IO = 1 mA to 40 mA
(1) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All
characteristics are measured with a 0.33-μF capacitor across the input and a 0.1-μF capacitor across the output.
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APPLICATION INFORMATION
µA78Lxx
V
I
V
O
0.33 µF
0.1 µF
Figure 1. Fixed-Output Regulator
IN
OUT
µA78Lxx
COM
+
-
G
V
I
I
L
-V
O
Figure 2. Positive Regulator in Negative Configuration (VI Must Float)
Input
Output
µA78Lxx
R1
R2
I
O
0.33 µF
0.1 µF
Figure 3. Adjustable-Output Regulator
µA78Lxx
Input
R1
Output
V
0.33 µF
O(Reg)
I
O
I = (V /R1) + I Bias Current
O
O
O
Figure 4. Current Regulator
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1N4001
20-V Input
0.33 µF
µA78L15
V
O
= 15 V
1N4001
0.1 µF
0.1 µF
0.33 µF
1N4001
= -15 V
-20-V Input
µA79L15
V
O
1N4001
Figure 5. Regulated Dual Supply
Operation With a Load Common to a Voltage of Opposite Polarity
In many cases, a regulator powers a load that is not connected to ground, but instead, is connected to a voltage
source of opposite polarity (for example, operational amplifiers, level-shifting circuits, and so on). In these cases,
a clamp diode should be connected to the regulator output as shown in Figure 6. This protects the regulator from
output polarity reversals during startup and short-circuit operation.
µA78Lxx
V
I
V
O
1N4001
or
Equivalent
-V
O
Figure 6. Output Polarity-Reversal-Protection Circuit
Reverse-Bias Protection
Occasionally, the input voltage to the regulator can collapse faster than the output voltage. This can occur, for
example, when the input supply is crowbarred during an output overvoltage condition. If the output voltage is
greater than approximately 7 V, the emitter-base junction of the series-pass element (internal or external) could
break down and be damaged. To prevent this, a diode shunt can be employed as shown in Figure 7.
V
I
V
O
µA78Lxx
Figure 7. Reverse-Bias-Protection Circuit
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REVISION HISTORY
Changes from Revision T (May 2011) to Revision U
Page
•
•
•
Updated document to new TI data sheet format - no specification changes. ...................................................................... 1
Added ESD warning. ............................................................................................................................................................ 2
Deleted Ordering Information table. ...................................................................................................................................... 2
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PACKAGE OPTION ADDENDUM
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24-Aug-2014
PACKAGING INFORMATION
Orderable Device
UA78L02ACD
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOIC
SOIC
D
8
8
3
3
8
8
8
8
8
8
3
3
3
3
3
3
3
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Level-2-260C-1 YEAR
78L02A
UA78L02ACDG4
UA78L02ACLP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
LP
LP
D
75
Green (RoHS
& no Sb/Br)
78L02A
78L02AC
78L02AC
78L05A
78L05A
78L05A
78L05A
78L05A
78L05A
78L05AC
78L05AC
78L05AC
78L05AC
78L05AC
78L05AC
F5
TO-92
TO-92
SOIC
1000
1000
75
Pb-Free
(RoHS)
UA78L02ACLPE3
UA78L05ACD
Pb-Free
(RoHS)
CU SN
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
UA78L05ACDE4
UA78L05ACDG4
UA78L05ACDR
UA78L05ACDRE4
UA78L05ACDRG4
UA78L05ACLP
SOIC
D
75
Green (RoHS
& no Sb/Br)
SOIC
D
75
Green (RoHS
& no Sb/Br)
SOIC
D
2500
2500
2500
1000
1000
2000
2000
2000
2000
1000
Green (RoHS CU NIPDAU | CU SN
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU SN
SOIC
D
Green (RoHS
& no Sb/Br)
TO-92
TO-92
TO-92
TO-92
TO-92
TO-92
SOT-89
LP
LP
LP
LP
LP
LP
PK
Pb-Free
(RoHS)
UA78L05ACLPE3
UA78L05ACLPM
UA78L05ACLPME3
UA78L05ACLPR
UA78L05ACLPRE3
UA78L05ACPK
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Green (RoHS
& no Sb/Br)
CU SN
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
UA78L05ACPKG3
UA78L05AID
ACTIVE
SOT-89
SOIC
PK
3
8
8
8
8
8
3
3
3
3
3
3
1000
Green (RoHS
& no Sb/Br)
CU SN
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
F5
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
75
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
78L05AI
78L05AI
78L05AI
78L05AI
78L05AI
78L05AI
78L05AI
78L05AI
78L05AI
J5
UA78L05AIDG4
UA78L05AIDR
SOIC
75
Green (RoHS
& no Sb/Br)
SOIC
D
2500
2500
2500
1000
1000
2000
2000
1000
1000
Green (RoHS
& no Sb/Br)
UA78L05AIDRE4
UA78L05AIDRG4
UA78L05AILP
SOIC
D
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
TO-92
TO-92
TO-92
TO-92
SOT-89
SOT-89
LP
LP
LP
LP
PK
PK
Pb-Free
(RoHS)
UA78L05AILPE3
UA78L05AILPR
UA78L05AILPRE3
UA78L05AIPK
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UA78L05AIPKG3
Green (RoHS
& no Sb/Br)
CU SN
J5
UA78L05AQD
UA78L05AQDR
UA78L05CD
OBSOLETE
OBSOLETE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
78L05C
78L05C
78L05C
78L05C
78L05C
UA78L05CDG4
UA78L05CDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
D
D
D
D
8
8
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
2500
2500
2500
Green (RoHS
& no Sb/Br)
UA78L05CDRE4
UA78L05CDRG4
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
UA78L05CLP
UA78L05CLPE3
UA78L05CLPR
UA78L05CPK
ACTIVE
TO-92
TO-92
LP
3
3
3
3
3
1000
Pb-Free
(RoHS)
CU SN
CU SN
CU SN
CU SN
CU SN
N / A for Pkg Type
78L05C
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LP
LP
PK
PK
1000
2000
1000
1000
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 125
78L05C
78L05C
B5
TO-92
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 125
SOT-89
SOT-89
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
0 to 125
UA78L05CPKG3
Green (RoHS
& no Sb/Br)
0 to 125
B5
UA78L05QLP
UA78L05QLPR
UA78L06ACLP
OBSOLETE
OBSOLETE
ACTIVE
TO-92
TO-92
TO-92
LP
LP
LP
3
3
3
TBD
TBD
Call TI
Call TI
CU SN
Call TI
Call TI
1000
1000
2000
2000
1000
1000
75
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
78L06AC
78L06AC
78L06AC
78L06AC
F6
UA78L06ACLPE3
UA78L06ACLPR
UA78L06ACLPRE3
UA78L06ACPK
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TO-92
TO-92
TO-92
SOT-89
SOT-89
SOIC
LP
LP
LP
PK
PK
D
3
3
3
3
3
8
8
8
8
3
3
Pb-Free
(RoHS)
CU SN
CU SN
N / A for Pkg Type
N / A for Pkg Type
Pb-Free
(RoHS)
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
UA78L06ACPKG3
UA78L08ACD
Green (RoHS
& no Sb/Br)
CU SN
F6
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
78L08A
78L08A
78L08A
78L08A
78L08AC
78L08AC
UA78L08ACDG4
UA78L08ACDR
UA78L08ACDRG4
UA78L08ACLP
SOIC
D
75
Green (RoHS
& no Sb/Br)
SOIC
D
2500
2500
1000
1000
Green (RoHS CU NIPDAU | CU SN
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
CU NIPDAU
TO-92
TO-92
LP
LP
Pb-Free
(RoHS)
CU SN
UA78L08ACLPE3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
UA78L08ACLPR
UA78L08ACLPRE3
UA78L08ACPK
ACTIVE
TO-92
TO-92
LP
3
3
3
3
2000
Pb-Free
(RoHS)
CU SN
CU SN
CU SN
CU SN
N / A for Pkg Type
78L08AC
ACTIVE
ACTIVE
ACTIVE
LP
PK
PK
2000
1000
1000
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 125
78L08AC
SOT-89
SOT-89
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
0 to 125
F8
F8
UA78L08ACPKG3
Green (RoHS
& no Sb/Br)
0 to 125
UA78L08AILP
UA78L08AQDR
UA78L08CLP
UA78L08CPK
UA78L09ACD
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
TO-92
SOIC
LP
D
3
8
3
3
8
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
TO-92
SOT-89
SOIC
LP
PK
D
Call TI
Call TI
0 to 125
0 to 125
0 to 125
Call TI
Call TI
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
78L09A
78L09A
78L09A
78L09A
78L09AC
78L09AC
78L09AC
78L09AC
F9
UA78L09ACDG4
UA78L09ACDR
UA78L09ACDRE4
UA78L09ACLP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
8
3
3
3
3
3
3
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
2500
2500
1000
1000
2000
2000
1000
1000
75
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
TO-92
TO-92
TO-92
TO-92
SOT-89
SOT-89
SOIC
LP
LP
LP
LP
PK
PK
D
Pb-Free
(RoHS)
UA78L09ACLPE3
UA78L09ACLPR
UA78L09ACLPRE3
UA78L09ACPK
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
UA78L09ACPKG3
UA78L10ACD
Green (RoHS
& no Sb/Br)
CU SN
F9
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
78L10A
78L10A
UA78L10ACDG4
SOIC
D
75
Green (RoHS
& no Sb/Br)
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
UA78L10ACDR
UA78L10ACDRE4
UA78L10ACDRG4
UA78L10ACLP
ACTIVE
SOIC
SOIC
D
8
8
8
3
3
3
3
3
3
8
8
8
8
8
3
3
3
3
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
78L10A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
2500
2500
1000
1000
2000
2000
1000
1000
75
Green (RoHS
& no Sb/Br)
78L10A
78L10A
78L10AC
78L10AC
78L10AC
78L10AC
FA
SOIC
Green (RoHS
& no Sb/Br)
TO-92
TO-92
TO-92
TO-92
SOT-89
SOT-89
SOIC
LP
LP
LP
LP
PK
PK
D
Pb-Free
(RoHS)
UA78L10ACLPE3
UA78L10ACLPR
UA78L10ACLPRE3
UA78L10ACPK
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Green (RoHS
& no Sb/Br)
CU SN
UA78L10ACPKG3
UA78L12ACD
Green (RoHS
& no Sb/Br)
CU SN
FA
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
78L12A
78L12A
78L12A
78L12A
78L12A
78L12AC
78L12AC
78L12AC
78L12AC
UA78L12ACDG4
UA78L12ACDR
SOIC
D
75
Green (RoHS
& no Sb/Br)
SOIC
D
2500
2500
2500
1000
1000
2000
2000
Green (RoHS CU NIPDAU | CU SN
& no Sb/Br)
UA78L12ACDRE4
UA78L12ACDRG4
UA78L12ACLP
SOIC
D
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU SN
SOIC
D
Green (RoHS
& no Sb/Br)
TO-92
TO-92
TO-92
TO-92
LP
LP
LP
LP
Pb-Free
(RoHS)
UA78L12ACLPE3
UA78L12ACLPM
UA78L12ACLPME3
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Pb-Free
(RoHS)
CU SN
Addendum-Page 5
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
UA78L12ACLPR
UA78L12ACLPRE3
UA78L12ACPK
ACTIVE
TO-92
TO-92
LP
3
3
3
3
2000
Pb-Free
(RoHS)
CU SN
CU SN
CU SN
CU SN
N / A for Pkg Type
78L12AC
ACTIVE
ACTIVE
ACTIVE
LP
PK
PK
2000
1000
1000
Pb-Free
(RoHS)
N / A for Pkg Type
0 to 125
78L12AC
FC
SOT-89
SOT-89
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
0 to 125
UA78L12ACPKG3
Green (RoHS
& no Sb/Br)
0 to 125
FC
UA78L12AQDR
UA78L12AQLPR
UA78L15ACD
OBSOLETE
OBSOLETE
ACTIVE
SOIC
TO-92
SOIC
D
LP
D
8
3
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
0 to 125
78L15A
78L15A
78L15A
78L15A
78L15A
78L15AC
78L15AC
78L15AC
78L15AC
FF
UA78L15ACDE4
UA78L15ACDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
8
8
3
3
3
3
3
3
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
2500
2500
2500
1000
1000
2000
2000
1000
1000
Green (RoHS
& no Sb/Br)
UA78L15ACDRE4
UA78L15ACDRG4
UA78L15ACLP
SOIC
D
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
TO-92
TO-92
TO-92
TO-92
SOT-89
SOT-89
LP
LP
LP
LP
PK
PK
Pb-Free
(RoHS)
UA78L15ACLPE3
UA78L15ACLPR
UA78L15ACLPRE3
UA78L15ACPK
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UA78L15ACPKG3
Green (RoHS
& no Sb/Br)
CU SN
FF
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
Addendum-Page 6
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 7
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UA78L05ACDR
UA78L05ACDR
UA78L05ACDRG4
UA78L05ACPK
UA78L05AIDR
UA78L05AIPK
UA78L05CDR
SOIC
SOIC
D
D
8
8
8
3
8
3
8
3
3
8
8
8
3
8
3
8
3
8
2500
2500
2500
1000
2500
1000
2500
1000
1000
2500
2500
2500
1000
2500
1000
2500
1000
2500
330.0
330.0
330.0
180.0
330.0
180.0
330.0
180.0
180.0
330.0
330.0
330.0
180.0
330.0
180.0
330.0
180.0
330.0
12.8
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.8
12.4
12.4
12.4
12.4
12.4
12.4
12.8
6.4
6.4
5.2
5.2
2.1
2.1
2.1
1.9
2.1
1.9
2.1
1.9
1.9
2.1
2.1
2.1
1.9
2.1
1.9
2.1
1.9
2.1
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q3
Q1
Q3
Q1
Q3
Q3
Q1
Q1
Q1
Q3
Q1
Q3
Q1
Q3
Q1
SOIC
D
6.4
5.2
SOT-89
SOIC
PK
D
4.91
6.4
4.52
5.2
SOT-89
SOIC
PK
D
4.91
6.4
4.52
5.2
UA78L05CPK
SOT-89
SOT-89
SOIC
PK
PK
D
4.91
4.91
6.4
4.52
4.52
5.2
UA78L06ACPK
UA78L08ACDR
UA78L08ACDR
UA78L08ACDRG4
UA78L08ACPK
UA78L09ACDR
UA78L09ACPK
UA78L10ACDR
UA78L10ACPK
UA78L12ACDR
SOIC
D
6.4
5.2
SOIC
D
6.4
5.2
SOT-89
SOIC
PK
D
4.91
6.4
4.52
5.2
SOT-89
SOIC
PK
D
4.91
6.4
4.52
5.2
SOT-89
SOIC
PK
D
4.91
6.4
4.52
5.2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UA78L12ACDR
UA78L12ACDRG4
UA78L12ACPK
UA78L15ACDR
UA78L15ACPK
SOIC
SOIC
D
D
8
8
3
8
3
2500
2500
1000
2500
1000
330.0
330.0
180.0
330.0
180.0
12.4
12.4
12.4
12.4
12.4
6.4
6.4
5.2
5.2
2.1
2.1
1.9
2.1
1.9
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q3
Q1
Q3
SOT-89
SOIC
PK
D
4.91
6.4
4.52
5.2
SOT-89
PK
4.91
4.52
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
UA78L05ACDR
UA78L05ACDR
UA78L05ACDRG4
UA78L05ACPK
UA78L05AIDR
UA78L05AIPK
UA78L05CDR
SOIC
SOIC
D
D
8
8
8
3
8
3
8
3
3
8
8
8
2500
2500
2500
1000
2500
1000
2500
1000
1000
2500
2500
2500
364.0
340.5
340.5
340.0
340.5
340.0
340.5
340.0
340.0
340.5
364.0
340.5
364.0
338.1
338.1
340.0
338.1
340.0
338.1
340.0
340.0
338.1
364.0
338.1
27.0
20.6
20.6
38.0
20.6
38.0
20.6
38.0
38.0
20.6
27.0
20.6
SOIC
D
SOT-89
SOIC
PK
D
SOT-89
SOIC
PK
D
UA78L05CPK
SOT-89
SOT-89
SOIC
PK
PK
D
UA78L06ACPK
UA78L08ACDR
UA78L08ACDR
UA78L08ACDRG4
SOIC
D
SOIC
D
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
UA78L08ACPK
UA78L09ACDR
UA78L09ACPK
UA78L10ACDR
UA78L10ACPK
UA78L12ACDR
UA78L12ACDR
UA78L12ACDRG4
UA78L12ACPK
UA78L15ACDR
UA78L15ACPK
SOT-89
SOIC
PK
D
3
8
3
8
3
8
8
8
3
8
3
1000
2500
1000
2500
1000
2500
2500
2500
1000
2500
1000
340.0
340.5
340.0
340.5
340.0
364.0
340.5
340.5
340.0
340.5
340.0
340.0
338.1
340.0
338.1
340.0
364.0
338.1
338.1
340.0
338.1
340.0
38.0
20.6
38.0
20.6
38.0
27.0
20.6
20.6
38.0
20.6
38.0
SOT-89
SOIC
PK
D
SOT-89
SOIC
PK
D
SOIC
D
SOIC
D
SOT-89
SOIC
PK
D
SOT-89
PK
Pack Materials-Page 3
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相关型号：
UA78L08ACDB
IC VREG FIXED POSITIVE REGULATOR, MBCY3, TO-39, 3 PIN, Fixed Positive Single Output Standard Regulator
NXP
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