UAF42APG4 [TI]
Universal Active Filter 14-PDIP;
| 型号： | UAF42APG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Universal Active Filter 14-PDIP LTE 光电二极管 有源滤波器 |
| 文件： | 总14页 (文件大小：346K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UAF42
www.ti.com
SBFS002B –JULY 1992–REVISED OCTOBER 2010
UNIVERSAL ACTIVE FILTER
Check for Samples: UAF42
1
FEATURES
DESCRIPTION
2
•
VERSATILE:
The UAF42 is a universal active filter that can be
configured for a wide range of low-pass, high-pass,
and band-pass filters. It uses a classic state-variable
analog architecture with an inverting amplifier and two
integrators. The integrators include on-chip 1000pF
capacitors trimmed to 0.5%. This architecture solves
one of the most difficult problems of active filter
design—obtaining tight tolerance, low-loss capacitors.
–
–
Low-Pass, High-Pass
Band-Pass, Band-Reject
•
•
SIMPLE DESIGN PROCEDURE
ACCURATE FREQUENCY AND Q:
–
Includes On-Chip 1000pF ±0.5% Capacitors
APPLICATIONS
A DOS-compatible filter design program allows easy
implementation of many filter types, such as
•
•
•
•
•
TEST EQUIPMENT
Butterworth, Bessel, and Chebyshev.
A fourth,
COMMUNICATIONS EQUIPMENT
MEDICAL INSTRUMENTATION
DATA ACQUISITION SYSTEMS
MONOLITHIC REPLACEMENT FOR UAF41
uncommitted FET-input op amp (identical to the other
three) can be used to form additional stages, or for
special filters such as band-reject and Inverse
Chebyshev.
The classical topology of the UAF42 forms
a
time-continuous filter, free from the anomalies and
switching noise associated with switched-capacitor
filter types.
The UAF42 is available in 14-pin plastic DIP and
SOIC-16 surface-mount packages, specified for the
–25°C to +85°C temperature range.
blank
blank
blank
blank
High-Pass
Out
Band-Pass
Out
Low-Pass
Out
R
1000pF(1)
1000pF(1)
V+
R
In1
In2
R
R
V-
In3
GND
R = 50kW ±0.5%
NOTE: (1) ±0.5%.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1992–2010, Texas Instruments Incorporated
UAF42
SBFS002B –JULY 1992–REVISED OCTOBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range unless otherwise noted.
UAF42
±18
UNIT
V
Power Supply Voltage
Input Voltage
±VS ±0.7
V
Output Short-Circuit
Operating Temperature
Storage Temperature
Junction Temperature
Continuous
–40 to +85
–40 to +125
+125
°C
°C
°C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended period may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
ORDERING INFORMATION(1)
PRODUCT
UAF42AP
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
PDIP-14
N
UAF42AP
UAF42APG4
UAF42AU
SOIC-16
DW
UAF42AU
UAF42AUE4
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
PIN CONFIGURATIONS
P PACKAGE
U PACKAGE
PDIP-14
SOIC-16
(TOP VIEW)
(TOP VIEW)
Low-Pass VO
VIN3
1
2
3
4
5
6
7
14 Frequency Adj2
13 High-Pass VO
12 VIN1
Low-Pass VO
NC(1)
1
2
3
4
5
6
7
8
16 Frequency Adj2
15 NC(1)
VIN2
VIN3
14 High-Pass VO
13 VIN1
Auxiliary Op Amp, +In
Auxiliary Op Amp, -In
Auxiliary Op Amp, VO
Bandpass VO
11 Ground
10 V+
VIN2
Auxiliary Op Amp, +In
Auxiliary Op Amp, -In
Auxiliary Op Amp, VO
Bandpass VO
12 Ground
11 V+
9
8
V-
Frequency Adj1
10 V-
9
Frequency Adj1
NOTE: (1) NC = no connection. For best
performance connect all NC pins to ground
to minimize inter-lead capacitance.
2
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Copyright © 1992–2010, Texas Instruments Incorporated
Product Folder Link(s): UAF42
UAF42
www.ti.com
SBFS002B –JULY 1992–REVISED OCTOBER 2010
ELECTRICAL CHARACTERISTICS
At TA = +25°C, and VS = ±15V, unless otherwise noted.
UAF42AP, AU
PARAMETER
FILTER PERFORMANCE
Frequency Range, fn
CONDITIONS
MIN
TYP
MAX
UNIT
0 to 100
kHz
%
Frequency Accuracy
f = 1kHz
1
vs Temperature
0.01
400
500
0.01
0.025
2
%/°C
—
Maximum Q
Maximum (Q • Frequency) Product
Q vs Temperature
kHz
%/°C
%/°C
%
(fO • Q) < 104
(fO • Q) < 105
(fO • Q) < 105
Q Repeatability
Offset Voltage, Low-Pass Output
Resistor Accuracy
±5
1
mV
%
0.5
OFFSET VOLTAGE(1)
Input Offset Voltage
vs Temperature
±0.5
±3
±5
mV
mV/°C
dB
vs Power Supply
INPUT BIAS CURRENT(1)
Input Bias Current
VS = ±6V to ±18V
80
96
VCM = 0V
VCM = 0V
10
5
50
pA
pA
Input Offset Current
NOISE
Input Voltage Noise
Noise Density: f = 10Hz
Noise Density: f = 10kHz
Voltage Noise: BW = 0.1Hz to 10Hz
Input Bias Current Noise
Noise Density: f = 10kHz
INPUT VOLTAGE RANGE(1)
Common-Mode Input Range
Common-Mode Rejection
INPUT IMPEDANCE(1)
Differential
25
10
2
nV/√Hz
nV/√Hz
mVPP
2
fA/√Hz
±11.5
96
V
VCM = ±10V
80
90
dB
1013|| 2
1013|| 6
Ω || pF
Ω || pF
Common-Mode
OPEN-LOOP GAIN(1)
Open-Loop Voltage Gain
FREQUENCY RESPONSE
Slew Rate
VO = ±10V, RL= 2kΩ
126
dB
10
4
V/ms
MHz
%
Gain-Bandwidth Product
Total Harmonic Distortion
OUTPUT(1)
G = +1
G = +1, f = 1kHz
0.1
Voltage Output
RL = 2kΩ
±11
±11.5
±25
V
Short Circuit Current
mA
(1) Specifications apply to uncommitted op amp, A4. The three op amps forming the filter are identical to A4 but are tested as a complete
filter.
Copyright © 1992–2010, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): UAF42
UAF42
SBFS002B –JULY 1992–REVISED OCTOBER 2010
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
At TA = +25°C, and VS = ±15V, unless otherwise noted.
UAF42AP, AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNIT
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Current
±15
±6
V
V
±6
±18
±7
mA
TEMPERATURE RANGE
Specified
–25
–25
–40
+85
+85
°C
°C
Operating
Storage
+125
°C
Thermal Resistance, q JA
100
°C/W
4
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Copyright © 1992–2010, Texas Instruments Incorporated
Product Folder Link(s): UAF42
UAF42
www.ti.com
SBFS002B –JULY 1992–REVISED OCTOBER 2010
APPLICATION INFORMATION
The UAF42 is a monolithic implementation of the
proven state-variable analog filter topology. This
device is pin-compatible with the popular UAF41
analog filter, and it provides several improvements.
The basic building element of the most
commonly-used filter types is the second-order
section. This section provides a complex-conjugate
pair of poles. The natural frequency, wn, and Q of the
pole pair determine the characteristic response of the
section. The low-pass transfer function is shown in
Equation 1:
The slew rate of the UAF42 has been increased to
10V/ms,
versus
1.6V/ms
for
the
UAF41.
Frequency • Q product of the UAF42 has been
improved, and the useful natural frequency extended
by a factor of four to 100kHz. FET input op amps on
the UAF42 provide very low input bias current. The
monolithic construction of the UAF42 provides lower
cost and improved reliability.
VO(s)
VI(s)
ALPwn2
=
s2 + s wn/Q + wn2
(1)
The high-pass transfer function is given by
Equation 2:
VHP(s)
AHPs2
VI(s) s2 + s wn/Q + wn2
=
DESIGN PROGRAM
(2)
Application report SBFA002 (available for download
at www.ti.com) and a computer-aided design program
also available from Texas Instruments, make it easy
to design and implement many kinds of active filters.
The DOS-compatible program guides you through the
design process and automatically calculates
component values.
The band-pass transfer function is calculated using
Equation 3:
VBP(s)
ABP(wn/Q) s
=
VI(s) s2 + s wn/Q + wn2
(3)
A band-reject response is obtained by summing the
low-pass and high-pass outputs, yielding the transfer
function shown in Equation 4:
Low-pass, high-pass, band-pass and band-reject
(notch) filters can be designed. The program supports
the three most commonly-used all-pole filter types:
Butterworth, Chebyshev and Bessel. The less-familiar
inverse Chebyshev is also supported, providing a
smooth passband response with ripple in the stop
band.
VBR(s)
ABR(s2 + wn2)
VI(s) s2 + s wn/Q + wn2
=
(4)
The most common filter types are formed with one or
more cascaded second-order sections. Each section
is designed for wn and Q according to the filter type
(Butterworth, Bessel, Chebyshev, etc.) and cutoff
frequency. While tabulated data can be found in
virtually any filter design text, the design program
eliminates this tedious procedure.
With each data entry, the program automatically
calculates and displays filter performance. This
feature allows a spreadsheet-like what-if design
approach. For example, a user can quickly determine,
by trial and error, how many poles are required for a
desired attenuation in the stopband. Gain/phase plots
may be viewed for any response type.
Second-order sections may be noninverting
(Figure 1) or inverting (Figure 2). Design equations
for these two basic configurations are shown for
reference. The design program solves these
equations, providing complete results, including
component values.
Copyright © 1992–2010, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): UAF42
UAF42
SBFS002B –JULY 1992–REVISED OCTOBER 2010
www.ti.com
HP Out
BP Out
LP Out
RF1
RF2
12
13
8
7
14
1
R1
50kW
R2
C1
C2
50kW
2
1000pF
1000pF
50kW
RG
A1
A2
A3
3
VIN
R4
50kW
RQ
UAF42
11
Note: If RG = 50kW, the external gain-setting
resistor can be eliminated by connecting VIN to pin 2.
Pin numbers are for DIP
package. SOIC-16 pinout
is different.
Design Equations
R1
R2
1 +
1
R2
2
1.
wn
=
4.
ALP
=
R1 RF1 RF2 C1 C2
1
1
+
+
RG
RG RQ R4
R4 (RG + RQ)
1/2
1 +
R2
RG RQ
R2
R2 RF1 C1
R1 RF2 C2
1 +
2.
3.
Q =
R2
R1
R1
5.
6.
AHP
=
=
ALP =
1 +
R1
1
1
1
+
+
RG RQ R4
RG
1/2
R1
R2
R1 RF1 C1
R2 RF2 C2
QALP = QAHP
= ABP
R4
ABP
RG
Figure 1. Noninverting Pole-Pair
6
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Copyright © 1992–2010, Texas Instruments Incorporated
Product Folder Link(s): UAF42
UAF42
www.ti.com
SBFS002B –JULY 1992–REVISED OCTOBER 2010
HP Out
BP Out
LP Out
RG
RF1
RF2
VIN
12
13
8
7
14
1
R1
50kW
R2
C1
C2
50kW
2
3
1000pF
1000pF
50kW
A1
A2
A3
R4
50kW
RQ
11
Note: If RQ = 50kW, the external Q-setting resistor
can be eliminated by connecting pin 2 to ground.
Pin numbers are for DIP
package. SOIC-16 pinout
is different.
Design Equations
R2
R1 RF1 RF2 C1 C2
R1
2
wn
1.
2.
=
4.
ALP
=
=
RG
1/2
R2
R1
R2
R4
RF1 C1
1
1
5.
AHP
ALP =
Q = 1 +
RG
RQ
R1 R2 RF2 C2
1
1
+
+
R1 R2 RG
1/2
R4
R1
R2
R1 RF1 C1
R2 RF2 C2
1
6.
ABP
=
1 +
3.
QALP = QAHP
= ABP
RQ
1
1
1
RG
+
R1 R2 RG
+
Figure 2. Inverting Pole-Pair
Copyright © 1992–2010, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): UAF42
UAF42
SBFS002B –JULY 1992–REVISED OCTOBER 2010
www.ti.com
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (November, 2007) to Revision B
Page
•
Corrected package marking information shown in Ordering Information table .................................................................... 2
8
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Copyright © 1992–2010, Texas Instruments Incorporated
Product Folder Link(s): UAF42
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
UAF42AP
ACTIVE
PDIP
N
14
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UAF42AP
UAF42AP-1
UAF42APG4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
14
14
TBD
Call TI
Call TI
25
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UAF42AP
UAF42AU
UAF42AU
ACTIVE
SOIC
DW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-25 to 85
-25 to 85
UAF42AU-1
UAF42AUE4
OBSOLETE
ACTIVE
SOIC
SOIC
DW
DW
16
16
TBD
Call TI
Call TI
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
UAF42AU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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