UC1846-SPRHA [TI]
Class-V, Radiation Hardened PWM Controller;型号: | UC1846-SPRHA |
厂家: | TEXAS INSTRUMENTS |
描述: | Class-V, Radiation Hardened PWM Controller |
文件: | 总15页 (文件大小:631K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UC1846-SP
www.ti.com
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
RAD-TOLERANT CLASS-V, CURRENT-MODE PWM CONTROLLER
Check for Samples: UC1846-SP
1
FEATURES
FK PACKAGE
(TOP VIEW)
•
•
•
•
QML-V Qualified, SMD 5962-86806
(1)
Rad-Tolerant: 30 kRad (Si) TID
Automatic Feed-Forward Compensation
Programmable Pulse-by-Pulse Current
Limiting
•
Automatic Symmetry Correction in Push-Pull
Configuration
3
2
1
20 19
18
B Out
VC
C/S–
C/S+
NC
4
5
6
7
8
•
•
Enhanced Load Response Characteristics
17
16
15
Parallel-Operation Capability for Modular
Power Systems
NC
Gnd
E/A+
E/A–
14 A Out
9 10 11 12 13
•
Differential Current-Sense Amplifier With Wide
Common-Mode Range
•
•
•
•
•
•
•
Double-Pulse Suppression
500-mA (Peak) Totem-pole Outputs
±1% Bandgap Reference
Undervoltage Lockout
Soft-Start Capability
J OR W PACKAGE
(TOP VIEW)
Shutdown Terminal
C/L SS
Shutdown
VIN
1
2
3
4
5
6
7
8
16
15
14
13
500-kHz Operation
VREF
C/S–
C/S+
E/A+
E/A–
Comp
CT
B Out
VC
12 Gnd
11
10
9
A Out
Sync
RT
(1) Radiation tolerance is a typical value based upon initial device
qualification with dose rate = 10 mrad/sec. Radiation Lot
Acceptance Testing is available - contact factory for details.
DESCRIPTION
The UC1846 control devices provide all of the necessary features to implement fixed frequency, current mode
control schemes while maintaining a minimum external parts count. The superior performance of this technique
can be measured in improved line regulation, enhanced load response characteristics, and a simpler,
easier-to-design control loop. Topological advantages include inherent pulse-by-pulse current limiting capability,
automatic symmetry correction for push-pull converters, and the ability to parallel “power modules" while
maintaining equal current sharing.
Protection circuitry includes built-in under-voltage lockout and programmable current limit in addition to soft start
capability. A shutdown function is also available which can initiate either a complete shutdown with automatic
restart or latch the supply off.
Other features include fully latched operation, double-pulse suppression, deadline adjust capability, a ±1%
trimmed bandgap reference, and low outputs in the OFF state.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
UC1846-SP
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
www.ti.com
ORDERING INFORMATION(1)
ORDERABLE PART NUMBER
5962-8680603VEA
TA
PACKAGE
CDIP – J
TOP-SIDE MARKING
UC1846J-SP
UC1846W-SP
UC1846FK-SP
–55°C to 125°C
CFP - W
5962-8680603VFA
LCCC – FK
5962-8680603V2A
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
BLOCK DIAGRAM
5.1 V
REFERENCE
REGULATOR
VIN 15
2
VREF
13 VC
SYNC 10
UVLO
LOCKOUT
F/F
RT
CT
9
8
Q
11 A OUT
T
OSC
Q
C/S-
3
4
Output Stage
COMP
X3
S
S
R
C/S+
Q
0.5 V
14 B OUT
12 GND
+
0.5 mA
E/A+
E/A–
5
6
E/A
1
C/L SS
16 SHUTDOWN
COMP
7
350 mV
6 k
NOTE: Pin numbers shown are for the J package.
2
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Copyright © 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): UC1846-SP
UC1846-SP
www.ti.com
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
ABSOLUTE MAXIMUM RATINGS(1) (2)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
40 V
40 V
Collector supply voltage
IO
VI
Output current, source or sink
Analog input voltage (C/S-, C/S+, E/A+, E/A-, Shutdown)
Reference output current
Sync output current
500 mA
–0.3 V to VIN
–30 mA
–5 mA
Error amplifier output current
Soft-start sink current
–5 mA
50 mA
Oscillator charging current
5 mA
J package
9.6°C/W
TJ
Junction temperature
W package
FK package
8.2°C/W
9.4°C/W
TJmax Maximum junction temperature
150°C
Tstg
Storage temperature range
–65°C to 150°C
300°C
Tlead
Lead temperature (soldering, 10 seconds)
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground. Currents are positive into, negative out of the specified terminal.
ELECTRICAL CHARACTERISTICS
VIN = 15 V, RT = 10kΩ, CT = 4.7 nF, TA = TJ = –55°C to 125°C (unless otherwise noted)
PARAMETER
Reference Section
TEST CONDITIONS
MIN
TYP
MAX UNIT
Output voltage
Line regulation
TJ = 25°C, IO = 1 mA
5.04
5.10
5
5.16
20
V
mV
mV
mV/°C
V
VIN = 8 V to 40 V
Load regulation
IL = 1 mA to 10 mA
3
15
Temperature stability
Total output variation
Output noise voltage
Long-term stability
Short-circuit output current
Oscillator Section
Initial accuracy
Over operating range
Over line, load, and temperature(1)
10 Hz ≤ f ≤ 10 kHz, TJ = 25°C(1)
TJ = 125°C, 1000 hr
0.4
5
5.2
100
5
μV
mV
mA
VREF = 0 V
–10
–45
TJ = 25°C
39
43
–1
47 kHz
Voltage stability
VIN = 8 V to 40 V
Over operating range
2
%
%
V
Temperature stability
Sync output high level
Sync output low level
Sync input high level
Sync input low level
Sync input current
Error Amp Section
Input offset voltage
Input bias current
–1
3.9
3.9
4.35
2.3
2.5
V
CT = 0 V
V
CT = 0 V
2.5
1.5
V
Sync = 3.9 V, CT = 0 V
1.3
mA
0.5
–0.6
40
5
mV
μA
nA
V
-1
Input offset current
Common mode range
Open-loop voltage gain
250
VIN = 8 V to 40 V
0
V
IN – 2
ΔVO = 1.2 V to 3 V, VCM = 2 V
80
105
dB
(1) Parameters ensured by design and/or characterization, if not production tested.
Copyright © 2009–2011, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): UC1846-SP
UC1846-SP
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
VIN = 15 V, RT = 10kΩ, CT = 4.7 nF, TA = TJ = –55°C to 125°C (unless otherwise noted)
PARAMETER
Unity-gain bandwidth
TEST CONDITIONS
MIN
0.7
75
80
2
TYP
1
MAX UNIT
TJ = 25°C(1)
MHZ
dB
CMRR
VCM = 0 V to 38 V, VIN = 40 V
VIN = 8 V to 40 V
100
105
6
PSRR
dB
Output sink current
Output source current
High-level output voltage
Low-level output voltage
Current Sense Amplifier Section
Amplifier gain
VID = -15 mV to -5 V, Comp = 1.2 V
VID = 15 mV to 5 V, Comp = 2.5 V
RL = (Comp) 15 kΩ
mA
–0.5
4.6
0.7
-0.4
1
mA
V
4.3
RL = (Comp) 15 kΩ
V
VC/S– = 0 V, C/L SS open(2) (3)
2.5
1.1
2.75
1.2
3.1 V/V
V
Maximum differential input signal
C/L SS open(2), RL (Comp)= 15 kΩ
(VC/S+ – VC/S–
)
Input offset voltage
CMRR
VC/L SS = 0.5 V, Comp open(2)
VCM = 1 V to 12 V
5
83
25
mV
dB
dB
μA
μA
V
60
60
PSRR
VIN = 8 V to 40 V
84
Input bias current
VC/L SS = 0.5 V, Comp open(4)
VC/L SS = 0.5 V, Comp open(4)
-10
–2.5
0.08
Input offset current
Input common-mode range
Delay to outputs
1
IN – 3
500
V
TJ = 25°C(5)
200
ns
Current Limit Adjust Section
Current limit offset
Input bias current
VC/S– = 0 V, VC/S+ = 0 V, Comp open(4)
VE/A+ = VREF, VE/A– = 0 V
0.45
-30
0.5
0.55
V
–10
μA
Shutdown Terminal Section
Threshold voltage
250
0
350
400
VIN
mV
V
Input voltage range
Minimum latching current (IC/S SS
(6)
)
3
1.5
1.5
mA
mA
ns
(7)
Maximum non-latching current (IC/S SS
)
0.8
Delay to outputs
TJ = 25°C(5)
300
600
Output Section
Collector-emitter voltage
Collector leakage current
40
V
μA
V
VC = 40 V
200
0.4
2.1
ISINK = 20 mA
0.1
0.4
Output low-level voltage
Output high-level voltage
ISINK = 100 mA
V
ISOURCE = 20 mA
ISOURCE = 100 mA
CL = 1 nF, TJ = 25°C(5)
CL = 1 nF, TJ = 25°C(5)
13
12
13.5
13.5
50
V
V
Rise time
300
300
ns
ns
Fall time
50
Undervoltage Lockout Section
Start-up threshold
Threshold hysteresis
Total Standby Current
Supply current
7.7
8
V
V
0.75
17
21
mA
(2) Parameter measured at trip point of latch with VE/A+ = VREF, VE/A– = 0 V.
(3) Amplifier gain defined as: G = ΔVComp/ΔVC/S+; VC/S+ = 0 to 1 V.
(4) Parameter measured at trip point of latch with VE/A+ = VREF, VE/A– = 0 V.
(5) Parameters ensured by design and/or characterization, if not production tested.
(6) Current into C/S SS required to latch circuit in shutdown state.
(7) Current into C/S SS assured not to latch circuit in shutdown state.
4
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Copyright © 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): UC1846-SP
UC1846-SP
www.ti.com
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
APPLICATION INFORMATION
ID
Output deadtime is determined by the external capacitor, CT, according to the formula: τd (µs) =145CT (µf )
.
3.6
ID -
ID = Oscillator discharge current at 25°C is typically 7.5.
RT (kΩ)
For large values of RT: τd (µs) ≈145CT (µf ).
2.2
Oscillator frequency is approximated by the formula: fT (kHz) ≈
.
RT (kΩ) •CT (µf )
Figure 1. Oscillator Circuit
Figure 2. Error Amplifier Output Configuration
Figure 3. Error Amplifier Gain and Phase vs Frequency
Copyright © 2009–2011, Texas Instruments Incorporated
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Product Folder Link(s): UC1846-SP
UC1846-SP
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
www.ti.com
Figure 4. Error Amplifier Open-Logic Gain vs Load Resistance
Figure 5. Parallel Operation
6
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Copyright © 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): UC1846-SP
UC1846-SP
www.ti.com
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
R2VREF
−0.5
R1 + R2
Peak Current (IS) is determined by the formula:IS
=
3RS
Figure 6. Pulse-by-Pulse Current Limiting
Copyright © 2009–2011, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): UC1846-SP
UC1846-SP
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
www.ti.com
Figure 7. Soft-Start and Shutdown/Restart Functions
A small RC filter may be required in some applications to reduce switch transients.
Differential input allows remote, noise free sensing.
Figure 8. Current-Sense Amplifier Connection
8
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Copyright © 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): UC1846-SP
UC1846-SP
www.ti.com
SLUS871B –JANUARY 2009–REVISED OCTOBER 2011
Figure 9. Open-Loop Test Circuit
Copyright © 2009–2011, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Link(s): UC1846-SP
PACKAGE OPTION ADDENDUM
www.ti.com
28-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
5962-8680601V2A
5962-8680601VEA
5962-8680603V2A
5962-8680603VEA
5962-8680603VFA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
LCCC
CDIP
CFP
FK
J
20
16
20
16
16
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
FK
J
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1846-SP :
Catalog: UC1846
•
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Aug-2012
Enhanced Product: UC1846-EP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
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相关型号:
UC1846J/883
IC IC,SMPS CONTROLLER,CURRENT-MODE,BIPOLAR,DIP,16PIN,CERAMIC, Switching Regulator or Controller
Linear
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