UC2856QDWR [TI]
IMPROVED CURRENT MODE PWM CONTROLLER; 改进的电流模式PWM控制器
| 型号： | UC2856QDWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IMPROVED CURRENT MODE PWM CONTROLLER |
| 文件： | 总12页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
IMPROVED CURRENT MODE PWM CONTROLLER
FEATURES
DW PACKAGE
•
Pin-for-Pin Compatible With the UC2846
(TOP VIEW)
•
65-ns Typical Delay From Shutdown to
Outputs and 50-ns Typical Delay From
Sync to Outputs
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CL SS
VREF
CS−
CS+
EA+
EA−
COMP
CT
SHUTDOWN
VIN
BOUT
VC
•
•
•
Improved Current Sense Amplifier With
Reduced Noise Sensitivity
GND
Differential Current Sense With 3-V
Common Mode Range
AOUT
SYNC
RT
Trimmed Oscillator Discharge Current for
Accurate Deadband Control
P0008-01
•
•
Accurate 1-V Shutdown Threshold
High Current Dual Totem Pole
Outputs (1.5-A peak)
•
•
TTL Compatible Oscillator SYNC Pin
Thresholds
4-kV ESD Protection
DESCRIPTION
The UC2856 is a high performance version of the popular UC2846 series of current mode controllers, and is
intended for both design upgrades and new applications where speed and accuracy are important. All input to
output delays have been minimized, and the current sense output is slew rate limited to reduce noise sensitivity.
Fast 1.5-A peak output stages have been added to allow rapid switching of power FETs.
A low impedance TTL compatible sync output has been implemented with a 3-state function when used as a
sync input.
Internal chip grounding has been improved to minimize internal noise caused when driving large capacitive
loads. This, in conjunction with the improved differential current sense amplifier, results in enhanced noise
immunity.
Other features include a trimmed oscillator current (8%) for accurate frequency and dead time control; a 1 V, 5%
shutdown threshold; and 4 kV minimum ESD protection on all pins.
ORDERING INFORMATION(1)
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
–40°C to 125°C
SOP–DW Tape and reel
UC2856QDWR
UC2856Q
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
BLOCK DIAGRAM
5.1 V
VIN 15
2
VREF
Reference
Regulator
SYNC 10
UV
Lockout
RT
CT
9
8
13 VC
OSC
FF
11 AOUT
Q
Q
T
4.1 V
CS−
CS+
3
4
−
+
X3
+
R
COMP
S
S
−
Q
−
+
0.5 V
14 BOUT
12 GND
0.5 mA
EA+
EA−
5
6
−
+
EA
1
CL SS
COMP
7
16 SHUTDOWN
+
−
6 kΩ
1 V
B0010-01
ORDERING INFORMATION
UC 285
6
Q
DW
R
Tape and Reel Indicator
Package
DW = Plastic SOIC
Temperature Indicator
Q = −405C to 1255C
2
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)(2)
UNIT
40 V
Supply voltage
Collector supply voltage
DC
40 V
0.5 A
IO
Output current (sink or source)
Pulse (0.5 ms)
2 A
Error amplifier input voltage
Shutdown input voltage
Current sense input voltage
SYNC output current
–0.3 V to VIN
–0.3 V to 10 V
–0.3 V to 3 V
±10 mA
-5 mA
Error amplifier output current
Soft start sink current
50 mA
Oscillator charging current
5 mA
TA = 25°C
TC = 25°C
1 W
Power dissipation
2 W
TJ
Operating junction temperature range
Storage temperature range
–55°C to 150°C
–65°C to 150°C
300°C
Tstg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Unless otherwise indicated, voltages are reference to ground and currents are positive into and negative out of the specified terminals.
ELECTRICAL CHARACTERISTICS
TA = –40°C to 125°C, VIN = 15 V, RT = 10 kΩ, CT = 1 nF, and TA = TJ (unless otherwise stated)(1)
PARAMETER
REFERENCE SECTION
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Output voltage
IO = 1 mA,
TJ = 25°C
5.05
5.1
5.15
20
V
Line regulation voltage
Load regulation voltage
Total output variation
Output noise voltage
Long term stability
VIN = 8 V to 40 V
mV
mV
V
IO = –1 mA to –10 mA
Line, Load, and Temperature
f = 10 Hz to 10 kHz,
15
5
5.2
TJ = 25°C
TJ = 25°C
50
5
µV
mV
mA
(2)
1000 hours,
25
Short circuit current
OSCILLATOR SECTION
VREF = 0 V
–25
–45
–65
TJ = 25°C
180
170
200
220
230
2%
8.8
8.8
Initial accuracy
Voltage stability
Discharge current
kHz
TJ = Full range
VIN = 8 V to 40 V
VCT = 2 V,
TJ = 25°C
7.5
6.7
2.4
8
8
mA
VCT = 2 V
Sync output high level voltage
Sync output low level voltage
Sync input high level voltage
Sync input low level voltage
Sync input current
IO = –1 mA
3.6
0.2
1.5
1.5
1
V
V
IO = 1 mA
0.4
CT = 0 V, RT = VREF
CT = 0 V, RT = VREF
2
V
0.8
10
V
CT = 0 V, RT = VREF,VSYNC = 5 V
µA
ns
Sync delay to outputs
CT = 0 V RT = VREF, VSYNC = 0.8 V to 2 V
50
100
(1) All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal.
(2) This parameter, although specified over the recommended operating conditions, is not 100% tested in production.
3
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
ELECTRICAL CHARACTERISTICS (continued)
TA = –40°C to 125°C, VIN = 15 V, RT = 10 kΩ, CT = 1 nF, and TA = TJ (unless otherwise stated)
PARAMETER
ERROR AMPLIFIER SECTION
Input offset voltage
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCM = 2 V
5
mV
Input bias current
–1
500
µA
nA
V
Input offset current
Common mode range
Open loop gain
VIN = 8 V to 40 V
VO = 1.2 V to 3 V
TJ = 25°C
0
80
1
VIN–2
100
1.5
dB
MHz
dB
dB
mA
mA
V
Unity gain bandwidth
CMRR
VCM = 0 V to 38 V,
VIN = 8 V to 40 V
VID = -15 mV
VIN = 40 V
75
80
5
100
100
10
PSRR
Output sink current
VCOMP = 1.2 V
Output source current
High-level output voltage
Low-level output voltage
CURRENT SENSE AMPLIFIER SECTION
Amplifier gain
VID = 15 mV
VCOMP = 2.5 V
–0.4
4.3
–0.5
4.6
VID = 50 mV,
RL (COMP) = 15 kΩ
RL (COMP) = 15 kΩ
4.9
1
VID = –50 mV,
0.7
V
VCS– = 0 V,
CL SS Open(3)(4)
RL (COMP) = 15 kΩ
COMP open(5)
2.5
1.1
2.75
1.2
5
3
V/V
V
Maximum differential input signal (VCS+– VCS–
)
CL SS Open 3,
VCL SS = 0.5 V
VCM = 0 V to 3 V
VIN = 8 V to 40 V
VCL SS = 0.5 V,
VCL SS = 0.5 V,
Input offset voltage
35
mV
dB
dB
µA
mA
V
CMRR
60
60
PSRR
Input bias current
COMP open(5)
COMP open(5)
–1
1
Input offset current
Input common mode range
Delay to outputs
0
3
VEA+ = VREF, EA– = 0 V, CS+ – CS– = 0 V to 1.5 V
120
250
ns
CURRENT LIMIT ADJUST SECTION
Current limit offset
VCS– = 0 V, VCS+ = 0 V,
VEA+ = VREF,
COMP Open(5)
VEA– = 0 V
0.4
0.5
0.6
V
Input bias current
–10
–30
µA
SHUTDOWN TERMINAL SECTION
Threshold voltage
0.95
0
1.00
1.05
5
V
V
Input voltage range
Minimum latching current (ICL SS
)
(6)3
1.5
(7)1.5
65
mA
mA
ns
Maximum non-latching current (ICL SS
Delay to outputs
)
0.8
VSHUTDOWN = 0 V to 1.3 V
110
OUTPUT SECTION
Collector-emitter voltage
Off-state bias current
40
V
VC = 40 V
250
0.5
2.6
µA
IOUT = 20 mA
IOUT = 200 mA
IOUT = –20 mA
IOUT = –200 mA
C1 = 1 nF
0.1
0.5
Output low level voltage
Output high level voltage
V
V
12.5
12
13.2
13.1
40
Rise time
Fall time
80
80
ns
ns
C1 = 1 nF
40
(3) Parameter measured at trip point of latch with VEA+ = VREF, VEA- = 0 V.
DV
COMP
G +
; DV
* + 0 V 1 V.
CS
DV
CS)
(4) Amplifier gain defined as:
(5) Parameter measured at trip point of latch with VEA+ = VREF, VEA- = 0 V.
(6) Current into CL SS assured to latch circuit into shutdown state.
(7) Current into CL SS assured not to latch circuit into shutdown state.
4
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
ELECTRICAL CHARACTERISTICS (continued)
TA = –40°C to 125°C, VIN = 15 V, RT = 10 kΩ, CT = 1 nF, and TA = TJ (unless otherwise stated)
PARAMETER
UVLO low saturation
TEST CONDITIONS
IOUT = 20 mA
MIN
TYP
MAX
UNIT
VIN = 0 V,
0.8
1.5
V
PWM SECTION
Maximum duty cycle
45%
47%
50%
0%
Minimum duty cycle
UNDERVOLTAGE LOCKOUT SECTION
Startup threshold
7.7
0.7
8
Threshold hysterisis
TOTAL STANDBY CURRENT
Supply current
18
23
mA
5
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
APPLICATION AND OPERATION INFORMATION
V
REF
SAWTOOTH CT
9
COMP
OSC SYNC
8
C
T
R
T
Output Deadtime (t )
d
8 mA
10
SYNC
2C
T
Td +
NOTE: Output deadtime is determined by the size of the external capacitor, C , according to the formula:
T
3.6
RT
8 mA *
Td + 250 C
For large values of R :
T
T
2
ƒ +
Oscillator frequency is approximated by the formula:
T
R C
T
T
S0019-01
Figure 1. Oscillator Circuit
90
80
60
40
20
0
V
REF
V
REF
V
= 20 V
= 25°
IN
T
J
5
+
0.5 mA
−
Zs
6
7
0
COMP
Zf
−90
−180
l < 0.5 mA
f
S0020-01
100
1k
10k
100k
1M
10M
f − Frequency − Hz
G001
Figure 3. Error Amplifier Gain and Phase vs Frequency
NOTE: Error Amplifier can source up to 0.5 mA.
Figure 2. Error Amplifier Output Configuration
6
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
APPLICATION AND OPERATION INFORMATION (continued)
110
V
IN
= 20 V
T = 25°
J
105
100
95
90
85
R
L
80
75
70
0
10 20 30 40 50 60 70 80 90 100 110
− Output Load Resistance − kΩ
R
L
G002
Figure 4. Error Amplifier Open-Loop DC Gain vs Load Resistance
9
8
RT
Master
CT
R
T
VREF
2
EA+
5
SYNC
10
COMP
7
EA−
6
C
T
Output
Filters
V
OUT
2
5
10
7
6
VREF
EA+
SYNC
COMP
EA−
9
8
RT
CT
Slave
(Additional Units)
S0021-01
NOTE: Slaving allows parallel operation of two or more units with equal current sharing.
Figure 5. Parallel Operation
7
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
APPLICATION AND OPERATION INFORMATION (continued)
I
S
(+)
(−)
4
3
I
X3
SENSE
R
S
COMP
−
+
0.5 V
V
REF
0.5 mA
R1
R2
EA
Current Limit
1
7
COMP
S0022-01
VREF
ǒR2 Ǔ* 0.5
+
R1)R2
I
S
3R
S
NOTE: Peak current (IS) is determined by the formula:
Figure 6. Pulse by Pulse Current Limiting
8
UC2856Q
www.ti.com
SGLS265–NOVEMBER 2004
APPLICATION AND OPERATION INFORMATION (continued)
V
REF
I
SENSE
COMP
S
S
+
−
R1
0.5 V
Current Limit
1
I
SS
C
R2
EA
V
REF
SHUTDOWN
−
16
−
+
+
1.0 V
SHUTDOWN Without
Auto-Restart (Latched)
SHUTDOWN With Auto-Restart
Current Limit
0.5 V
0
Shutdown
On
Off
PWM
S0023-01
NOTE: If VREF / R1 < 0.8 mA, the shutdown latch commutates when ISS = 0.8 mA and a restart cycle will be initiated. If VREF
R1 > 3 mA, the device will latch off until power is recycled.
/
Figure 7. Shutdown
9
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
UC2856QDWR
ACTIVE
SOIC
DW
16
2000
TBD
CU SNPB
Level-2-220C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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