UC39432B [TI]
Precision Analog Controller; 精密模拟控制器
| 型号： | UC39432B |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Precision Analog Controller |
| 文件： | 总5页 (文件大小：143K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC19432
UC29432
UC39432
UC39432B
Precision Analog Controller
FEATURES
DESCRIPTION
• Programmable Transconductance for The UC39432 is an adjustable precision analog controller with 100mA sink
Optimum Current Drive
capability if the ISET pin is grounded. A resistor between ISET and ground
will modify the transconductance while decreasing the maximum current
sink. This will add further control in the optocoupler configuration. The
trimmed precision reference along with the non-inverting error amplifier in-
puts are accessible for custom configuration. A sister device, the UC39431
adjustable shunt regulator, has an on-board resistor network providing six
preprogrammed voltage levels, as well as external programming capability.
• Accessible 1.3V Precision Reference
• Both Error Amplifier Inputs Available
• 0.7% Overall Reference Tolerance
• 0.4% Initial Accuracy
• 2.2V to 36.0V Operating Supply
Voltage and User Programmable
Reference
• Reference Accuracy Maintained for
Entire Range of Supply Voltage
• Superior Accuracy and Easier
Compensation for Optoisolator
Application
• Low Quiescent Current (0.50mA Typ)
BLOCK DIAGRAM
UDG-95093
03/99
UC19432
UC29432
UC39432
UC39432B
CONNECTION DIAGRAM
ABSOLUTE MAXIMUM RATINGS
DIL-8, SOIC-8 (Top View)
N or J, D Package
Supply Voltage: VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Regulated Output: VCOLL. . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
EA Input: SENSE, EA+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
EA Compensation: COMP. . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Reference Output: REF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Output Sink Current: ICOLL . . . . . . . . . . . . . . . . . . . . . . . 140mA
Output Source Current: ISET . . . . . . . . . . . . . . . . . . . . –140mA
Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . 1W
Derate 8mW/°C for TA > 25°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified termi-
nal. Consult Packaging Section of Databook for thermal limita-
tions and considerations of packages.
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = –55°C to +125°C and
COLL Output = 2.4V to 36.0V for the UC19432, TA = –25°C to +85°C and COLL Output = 2.3V to 36.0V for the UC29432, and TA
= 0°C to +70°C and COLL Output = 2.3V to 36.0V for the UC39432, VCC = 15V, ICOLL = 10mA, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
1.295
1.29
TYP
1.3
1.3
1.3
1.3
10
MAX UNITS
Reference Voltage Tolerance
TA = 25°C
19432*
39432B
19432*
39432B
19432*
39432B
19432*
39432B
1.305
1.31
1.309
1.314
38
V
V
Reference Temperature Tolerance
Reference Line Regulation
VCOLL = 5.0V
1.291
1.286
V
V
VCC = 2.4V to 36.0V, VCOLL = 5V
ICOLL = 10mA to 50mA, VCOLL = 5V
mV
mV
mV
mV
A
10
57
Reference Load Regulation
10
38
10
57
Reference Sink Current
Reference Source Current
EA Input Bias Current
EA Input Offset Voltage
10
–10
A
–0.5
–0.2
A
19432*
39432B
4.0
4.0
16
mV
mV
A
EA Output Current Sink (Internally Limited)
EA Output Current Source
–1
mA
mA
mA
Minimum Operating Current
VCC = 36.0V, VCOLL = 5V
0.50
130
0.80
145
Collector Current Limit (Note)
VCOLL = VCC = 36.0V, Ref = 1.35V
ISET = GND
Collector Saturation
ICOLL = 20mA
0.7
1.1
1.5
V
Transconductance (gm) (Note)
VCC = 2.4V to 36.0V,
VCOL = 3V, ICOLL = 20mA
ISET = GND
19432*
39432B
–170 –140 –110
–180 –140 –100
mS
mS
Error Amplifier AVOL
60
90
5
dB
Error Amplifier GBW
(Note 1)
3.0
MHz
MHz
Transconductance Amplifier GBW
* Also applies to the UC29432 and UC39432
3
Note: Programmed transconductance and collector current limit equations are specified in the ISET pin description.
Note 1: Guaranteed by design. Not 100% tested in production.
2
UC19432
UC29432
UC39432
UC39432B
PIN DESCRIPTIONS
COLL: The collector of the output transistor with a maxi- REF: The output of the trimmed precision reference. It
mum voltage of 36V. This pin is the output of the
transconductance amplifier. The overall open loop volt-
can source or sink 10 A and still maintain the 1% tem-
perature specification.
age gain of the transconductance amplifier is gm • R ,
where gm is designed to be –140mS ±30mS and RL rep-
resents the output load.
L
SENSE: The inverting terminal of the error amplifier used
as both the voltage sense input to the error amplifier and
its other compensation point. The error amplifier uses the
SENSE input to compare against the 1.3V on-chip refer-
ence.
COMP: The output of the error amplifier and the input to
the transconductance amplifier. This pin is available to
compensate the high frequency gain of the error ampli-
fier. It is internally voltage limited to approximately 2.0V.
The SENSE pin is also used as the undervoltage lockout
(UVLO). It is intended to keep the chip from operating un-
til the internal reference is properly biased. The threshold
is approximately 1V. It is important that once the UVLO is
released, the error amplifier can drive the
transconductance amplifier to stabilize the loop. If a ca-
pacitor is connected between the SENSE and COMP
pins to create a pole, it will limit the slew rate of the error
amplifier. To increase the bandwidth and ensure startup
at low load current, it is recommended to create a zero
along with the pole as shown in the UC39431 shunt reg-
ulator application. The error amplifier must slew 2.0V to
drive the transconductance amplifier initially on.
EA+: The non-inverting input to the error amplifier.
GND: The reference and power ground for the device.
The power ground of the output transistor is isolated on
the chip from the substrate ground used to bias the re-
mainder of the device.
ISET: The current set pin for the transconductance ampli-
fier. The transconductance will be –140mS as specified
in the electrical table if this pin is grounded. If a resis-
tance R is added to the ISET pin, the resulting new
L
transconductance is calculated using the following equa-
tion: gm = –0.714V • (5.1 + R ). The maximum current
will be approximately
L
VCC: The power connection for the device. The minimum
to maximum operating voltage is 2.2V to 36.0V. The qui-
escent current is typically 0.50mA.
0.6V
IMAX
=
5.1Ω + RL
UDG-95094
Figure 1. 5.0V Optocoupler application.
3
UC19432
UC29432
UC39432
UC39432B
OVERVOLTAGE COMPARATOR APPLICATION
OPTOCOUPLER APPLICATION
The signal V senses the input voltage. As long as the The optocoupler application shown takes advantage of
IN
input voltage is less than 5.5V, the output is equal to the the accessible pins REF and ISET. The ISET pin has a
voltage on V . During this region of operation, the diode 33 ohm resistor to ground that protects the opto-coupler
IN
is reversed biased which keeps the EA+ pin at 1.3V. by limiting the current to about 16mA. This also lowers
When V exceeds the over voltage threshold of 5.5V, the the transconductance to approximately 19mS. The ability
IN
output is driven low. This forward biases the diode and to adjust the transconductance gives the designer further
creates hysteresis by changing the threshold to 4.5V.
control of the loop gain. The REF pin is available to sat-
isfy any high precision voltage requirements.
UDG-95096
UDG-95095
Figure 2. 5.5V Overvoltage comparator with hysteresis.
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
4
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