UC5180 [TI]
Octal Line Receiver; 八通道线路接收器
| 型号： | UC5180 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Octal Line Receiver |
| 文件： | 总4页 (文件大小：197K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC5180C
Octal Line Receiver
FEATURES
DESCRIPTION
•
•
Meets EIA 232E/423A/422A and CCITT
V.10,V.11, V.28, X.26, X.27
The UC5180C is an octal line receiver designed to meet a wide range
of digital communications requirements as outlined in EIA standards
EIA232E, EIA423A, EIA422A, and CCITT V.10, V.11, V.28, X.26, and
X.27. The UC5180C includes an input noise filter and is intended for
applications employing data rates up to 200 KBPS. A failsafe function
allows these devices to "fail" to a known state under a wide variety of
fault conditions at the inputs.
Single +5V Supply--TTL Compatible
Outputs
±
•
•
Differential Inputs Withstand 25V
Low Open Circuit Voltage for Improved
Failsafe Characteristic
•
•
•
Reduced Supply Current--35 mA Max
Input Noise Filter
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Output Sink Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Output Short Circuit Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Sec
Common Mode Input Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Differential Input Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Failsafe Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VCC
PLCC Power Dissipation, TA = 25°C (Note 2). . . . . . . . . . . . . . . . . . . 1000 mW
DIP Power Dissipation, TA = 25°C (Note 2) . . . . . . . . . . . . . . . . . . . . 1200 mW
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds). . . . . . . . . . . . . . . . . . . . . . -300°C
Note 1: All voltages are with respect to ground, pin 14. Currents are positive
into, negative out of the specified terminal
Internal Hysteresis
Note 2: Consult Packaging Section of Databook for thermal limitations and
considerations of package.
CONNECTION DIAGRAMS
DIL-28 (TOP VIEW)
PLCC-28 (TOP VIEW)
1/94
UC5180C
Unless otherwise stated these specifications apply for TA = 0°C to +70°C, VCC
= 5V ± 5%, Input Common Mode Range ± 7V, TA =TJ
DC ELECTRICAL CHARACTERISTICS:
PARAMETERS
SYMBOL
TEST CONDITIONS
UC5180C
MIN MAX
UNITS
DC Input Resistance
RIN
3V ≤ | VIN | ≤ 25V
3
7
kΩ
Failsafe Output Voltage
VOFS
Inputs Open or Shorted
Together, or One Input
Open and One Grounded
0 ≤ IOUT ≤ 8mA, VFAILSAFE = 0V
0.45
V
0 ≥ IOUT ≥ - 400 µA,
VFAILSAFE = VCC
2.7
50
Differential Input High
Threshold
VTH
VTL
VOUT = 2.7V, IOUT = 440 µA
(See Figure 1)
RS = 0 (Note 2)
RS = 500 (Note 2)
RS = 0 (Note 2)
RS = 500 (Note 2)
200
400
-50
mV
mV
Differential Input Low
Threshold
VOUT = 0.45V, IOUT = 440 mA
(See Figure 1)
-200
-400
50
Hysteresis
VH
VICC
CI
FS = 0V or VCC (See Figure 1)
140
75
mV
mV
pF
Open Circuit Input Voltage
Input Capacitance
20
High Level Output Voltage
Low Level Output Voltage
VCH
VOL
VID = 1V, IOUT = - 440µA
2.7
20
V
V
VID = -1V
(Note 3)
IOUT = 4 mA
IOUT = 8 mA
0.4
0.45
100
Short Circuit Output
Current
IOS
Note 4
mA
Supply Current
Input Current
ICC
IIN
4.75V ≤ VCC ≤ 5.25V
35
mA
mA
Other Inputs Grounded
VIN = +10V
VIN = -10V
3.25
-3.25
Note 2: RS is a resistor in series with each input.
Note 3: Measured after 100ms warm up (at 0°C)
Note 4: Only 1 output may be shorted at one time
and then only for a maximum of 1 sec.
Figure 1. VtL, VtH, VH Definition
VCC = 5V ± 5%, TA = 0°C to + 70°C, Figure 2, TA = TJ.
AC ELECTRICAL CHARACTERISTICS:
PARAMETERS
SYMBOL
TEST CONDITIONS
UC5180C
UNITS
MIN
MAX
±
±
Propagation Delay - Low to High
Propagation Delay - High to Low
Acceptance Input Frequency
Rejectable Input Frequency
tPLH
tPHL
fA
CL = 50pF, VIN = 500mV
550
550
0.1
ns
ns
CL = 50pF, VIN = 500mV
Unused Input Grounded, VIN = ± 200mV
Unused Input Grounded, VIN = ± 500mV
MHz
MHz
fR
5.5
2
UC5180C
Figure 2. AC Test Circuit
APPLICATIONS INFORMATION
Failsafe Operation
under fault conditions, while a connection to ground
provides a logic "0". There are two failsafe pins (FS1
and FS2) on the UC5180C where each provides com-
mon failsafe control for four receivers.
These devices provide a failsafe operating mode to
guard against input fault conditions as defined in
EIA422A and EIA423A standards. These fault condi-
tions are (1) drive in power-off condition, (2) receiver not
interconnected with driver, (3) open-circuited intercon-
necting cable, and (4) short-circuited interconnecting
cable. If one of these four fault conditions occurs at the
inputs of a receiver, then the output of that receiver is
driven to a known logic level. The receiver is pro-
grammed by connecting the failsafe input to VCC or
ground. A connection to VCC provides a logic "1" output
Input Filtering (UC5180C)
The UC5180C has input filtering for additional noise re-
jection. This filtering is a function of both signal level
and frequency. For the specified input (5.5 MHz at ±500
mV) the input stage filter attenuates the signal such that
the output stage threshold levels are not exceeded and
no change of state occurs at the output.
EIA232E/V.28 / EIA423A/V.10 DATA TRANSMISSION
EIA422A/V.11 DATA TRANSMISSION
UNITRODE INTEGRATED CIRCUITS
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3410
3
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