UC563DPG4 [TI]
IC SPECIALTY INTERFACE CIRCUIT, PDSO8, POWER, SOIC-8, Interface IC:Other;
| 型号： | UC563DPG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC SPECIALTY INTERFACE CIRCUIT, PDSO8, POWER, SOIC-8, Interface IC:Other 光电二极管 接口集成电路 |
| 文件： | 总4页 (文件大小：70K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
U C5 63
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SLUS169A - APRIL 1999 - REVISED NOVEMBER 2000
DP PACKAGE
(TOP VIEW)
D
Complies With VME64 Standard
D
D
2.94-V Regulated Output Voltage With 1%
Tolerance at 25°C
OUT
HS/GND
HS/GND
N/C
VCC
1
2
3
4
8
7
6
5
Provides Bias for up to 32 Lines of Active
Termination for VME busses
HS/GND
HS/GND
N/C
D
–575-mA Sourcing Current for Termination
D
+475-mA Sinking Current for Active
Negation Drivers
D
D
Current Limit and Thermal Shutdown
Protection
Low Thermal Resistance Surface-Mount
Packages
description
The VME bus bias generator provides current for up to 32 lines of active termination for a VME64 parallel bus.
The VME standards require termination at both ends of the bus. The voltage regulator and internal logic circuits
of these parts provide all the functionality and performance necessary to bias termination resistors for the VME
bus. The VME bus bias generator sink current maintains regulation with all active negation drivers negated.
Internal circuit trimming is used to trim the output voltage to a 1% tolerance. The UC563 regulator source/sink
will provide better VME bus performance and work with active negation drivers. The regulator with resistor
provides the bus with higher pullup current than passive termination. Other features include thermal shutdown
and current limit for short circuit conditions. This device is available in low thermal resistance versions of the
industry standard 8-pin power SOIC.
block diagram
VCC
8
1
OUT
≤
°
170 C
T
J
–
+
2.94 V REFERENCE
2
3
6
7
HEAT SINK
UDG-99094
GROUND PINS
NOTE: Indicated pinout is for the 8-pin power SOIC package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC 5 63
3 2 Ć L I N E V M E B U S B I A S G E N E R ATO R
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SLUS169A - APRIL 1999 - REVISED NOVEMBER 2000
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Regulator output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mA
Storage temperature, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
J
Junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Lead temperature (soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Interface Products Data Book (TI Literature
Number SLUD002) for thermal limitations and considerations of packages. All voltages are referenced to ground.
recommended operating conditions
VCC voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V
ORDERING INFORMATION
PACKAGED DEVICES
T
J
SOIC (DP)
UC563DP
0°C to 70°C
†
The DP package is available tape and reeled. Add TR suffix to each
device type to order quantities of 2500 per reel.
electrical characteristics, T = 0°C to 70°C, V
= 5 V, C
= 4.7 F, T = T , (unless otherwise
A
CC
OUT A J
specified)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Supply Current Section
No load
35
60
mA
mA
Supply current
I
= –575 mA
610
635
OUT
Regulator Section
Output voltage
Load regulation
Line regulation
25°C,
No load
2.91
500
2.94
25
2.97
30
V
–575mA ≤ I
≤ 475 mA,
≤ 5.25 V,
See Note 1
No load
mV
mV
mA
mA
°C
OUT
4.875 V ≤ V
10
20
CC
= 0 V
V
V
–1200
1200
170
10
–600
OUT
Short circuit current
= 3.5 V
OUT
Thermal shutdown
See Note 2
See Note 2
Thermal shutdown hysteresis
°C
NOTES: 1. Tested at a constant junction temperature by low duty cycle pulse testing.
2. Ensured by design. Not production tested.
pin assignments
GND: Ground pin.
HS/GND: Heat sink GND. Connect to large area PC board traces to increase power dissipation capability.
OUT: 2.94-V regulated output voltage pin. The part is internally current limited for both sinking and sourcing
current to prevent damage. For best performance, a 4.7-µF low ESR capacitor is recommended.
VCC: Supply voltage pin. The pin should be decoupled with at least a 2.2-µF low ESR capacitor. For best
performance, a 4.7-µF low ESR capacitor is recommended. Lead lengths should be kept at a minimum.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
U C5 63
3 2 Ć L I N E V M E B U S B I A S G E N E R ATO R
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SLUS169A - APRIL 1999 - REVISED NOVEMBER 2000
typical application
194
194
194
DATA LINE 1
DATA LINE 32
194
U1
UC563
U4
UC563
1
OUT
VCC
8
5 V
1
2
3
4
OUT
VCC
8
5 V
C10
C1
C7
4.7µF
C4
4.7µF
4.7µF
4.7µF
2
HS/GND HS/GND 7
HS/GND HS/GND 6
HS/GND HS/GND 7
HS/GND HS/GND 6
3
4
N/C
N/C
5
N/C
N/C 5
194
194
194
DATA LINE 33
DATA LINE 64
194
U2
UC563
U5
UC563
1
OUT
VCC
8
5 V
1
2
3
4
OUT
VCC
8
5 V
C2
4.7µF
C8
4.7µF
C5
4.7µF
C11
4.7µF
2
HS/GND HS/GND 7
HS/GND HS/GND 6
HS/GND HS/GND 7
HS/GND HS/GND 6
3
4
N/C
N/C
5
N/C
N/C 5
194
194
194
DATA LINE 65
DATA LINE 96
194
U3
UC563
U6
UC563
1
OUT
VCC
8
5 V
1
2
3
4
OUT
VCC
8
5 V
C3
4.7µF
C9
4.7µF
C6
4.7µF
C12
4.7µF
2
HS/GND HS/GND 7
HS/GND HS/GND 6
HS/GND HS/GND 7
HS/GND HS/GND 6
3
4
N/C
N/C
5
N/C
N/C 5
UDG-00133
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
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