UCC27322-Q1 [TI]
具有同相输入的汽车类 9A/9A 双通道栅极驱动器;
| 型号： | UCC27322-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有同相输入的汽车类 9A/9A 双通道栅极驱动器 栅极驱动 驱动器 MOSFET驱动器 驱动程序和接口 |
| 文件： | 总27页 (文件大小：925K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
SINGLE 9-A HIGH-SPEED LOW-SIDE MOSFET DRIVER WITH ENABLE
Check for Samples: UCC27321-Q1, UCC27322-Q1
1
FEATURES
2
•
Qualified for Automotive Applications
•
Available in Thermally Enhanced MSOP
PowerPAD™ Package With 4.7°C/W θJC
•
Industry-Standard Pinout With Addition of
Enable Function
•
•
Rated From –40°C to 125°C
•
High Peak-Current Drive Capability of ±9 A at
the Miller Plateau Region Using TrueDrive™
Technology
TrueDrive Output Architecture Using Bipolar
and CMOS Transistors in Parallel
APPLICATIONS
•
•
•
•
•
Efficient Constant-Current Sourcing Using a
Unique Bipolar and CMOS Output Stage
•
•
•
•
•
•
Switch-Mode Power Supplies
DC/DC Converters
TTL-/CMOS-Compatible Inputs Independent of
Supply Voltage
Motor Controllers
20-ns Typical Rise and 15-ns Typical Fall
Times With 10-nF Load
Line Drivers
Class-D Switching Amplifiers
Pulse Transformer Driver
Typical Propagation Delay Times of 25 ns With
Input Falling and 35 ns With Input Rising
4-V to 15-V Supply Voltage
D PACKAGE
(TOP VIEW)
DGN PACKAGE
(TOP VIEW)
VDD
IN
VDD
OUT
OUT
PGND
1
2
3
4
8
7
6
5
VDD
IN
VDD
OUT
OUT
PGND
8
7
6
5
1
2
3
4
ENBL
AGND
ENBL
AGND
DESCRIPTION
The UCC37321/2 family of high-speed drivers delivers 9 A of peak drive current in an industry-standard pinout.
These drivers can drive the largest of MOSFETs for systems requiring extreme Miller current due to high dV/dt
transitions. This eliminates additional external circuits and can replace multiple components to reduce space,
design complexity, and assembly cost. Two standard logic options are offered, inverting (UCC37321) and
noninverting (UCC37322).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
TrueDrive, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
INPUT/OUTPUT TABLE
VDD
1
8
VDD
ENBL
IN
OUT
INVERTING
0
0
0
1
0
0
INVERTING
UCC37321
7
6
OUT
OUT
1
1
0
0
1
1
0
1
0
1
0
1
1
0
0
0
0
1
VDD
NON
IN
2
INVERTING
NON
R
ENBL
100 kΩ
INVERTING
UCC37322
ENBL
AGND
3
4
5
PGND
Using a design that inherently minimizes shoot-through current, the outputs of these devices can provide high
gate drive current where it is most needed at the Miller plateau region during the MOSFET switching transition. A
unique hybrid output stage paralleling bipolar and MOSFET transistors (TrueDrive) allows efficient current
delivery at low supply voltages. With this drive architecture, UCC37321/2 can be used in industry standard 6-A,
9-A and many 12-A driver applications. Latch-up and ESD protection circuits are also included. Finally, the
UCC37321/2 provides an enable (ENBL) function to have better control of the operation of the driver
applications. ENBL is implemented on pin 3, which was previously left unused in the industry-standard pinout. It
is internally pulled up to VDD for active-high logic and can be left open for standard operation.
In addition to SOIC-8 (D) package offerings, the UCC37321/2 also comes in the thermally enhanced but tiny 8-
pin MSOP PowerPAD (DGN) package. The PowerPAD package drastically lowers the thermal resistance to
extend the temperature operation range and improve the long-term reliability.
ORDERING INFORMATION(1)
OUTPUT
CONFIGURATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TA = TJ
PACKAGE(2)
Inverting
SOIC – D
Reel of 2500
UCC27321QDRQ1
27321Q
–40°C to 125°C
SOIC – D
Reel of 2500
Reel of 2500
UCC27322QDRQ1
27322Q
EACQ
Noninverting
PowerPAD – DGN
UCC27322QDGNRQ1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Table 1. TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
Common ground for input stage. This ground should be connected very closely to the source of the power
MOSFET which the driver is driving. Grounds are separated to minimize ringing affects due to output
switching di/dt,l which can affect the input threshold.
AGND
4
—
Enable input for the driver with logic-compatible threshold and hysteresis. The driver output can be enabled
and disabled with this pin. It is internally pulled up to VDD with a 100-kΩ resistor for active-high operation.
The output state when the device is disabled is low, regardless of the input state.
ENBL
3
I
IN
2
I
Input signal of the driver, which has logic-compatible threshold and hysteresis.
Driver outputs that must be connected together externally. The output stage is capable of providing 9-A peak
drive current to the gate of a power MOSFET.
OUT
6, 7
O
Common ground for output stage. This ground should be connected very closely to the source of the power
MOSFET which the driver is driving. Grounds are separated to minimize ringing affects due to output
switching di/dt, which can affect the input threshold.
PGND
VDD
5
—
I
Supply voltage and the power input connections for this device. These pins must be connected together
externally.
1, 8
2
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
ABSOLUTE MAXIMUM RATINGS(1) (2)
over operating free-air temperature range (unless otherwise noted)
VDD
IO
Supply voltage
–0.3 V to 16 V
0.6 A
Output current, OUT
–5 V to 6 V or VDD + 0.3 V
(whichever is larger)
IN
VI
Input voltage
–5 V to 6 V or VDD + 0.3 V
(whichever is larger)
ENBL
D package
650 mW
3 W
PD
Power dissipation at TA = 25°C
DGN package
TJ
Junction operating temperature
Storage temperature
–55°C to 150°C
–65°C to 150°C
Tstg
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND. Currents are positive into and negative out of the specified terminal.
POWER DISSIPATION RATINGS
POWER RATING(1)
TA = 70°C
DERATING FACTOR(1)
TA > 70°C
PACKAGE
θJC (°C/W)
θJA (°C/W)
(mW)
(mW/°C)
D (SOIC-8)
42
84 to 160(2)
50 to 59(2)
344 to 655(2)
6.25 to 11.9(2)
DGN (MSOP-8
PowerPAD)(3)
4.7
1370
17.1
(1) 125°C operating junction temperature is used for power rating calculations.
(2) The range of values indicates the effect of the PCB. These values are intended to give the system designer an indication of the best-
and worst-case conditions. In general, the system designer should attempt to use larger traces on the PC board where possible to
spread the heat away form the device more effectively. For information on the PowerPAD package, see the technical brief, PowerPad™
Thermally Enhanced Package, Texas Instruments literature number SLMA002 and the application brief, PowerPad™ Made Easy, Texas
Instruments literature number SLMA004.
(3) The PowerPAD thermal pad is not directly connected to any leads of the package. However, it is electrically and thermally connected to
the substrate, which is the ground of the device.
OVERALL ELECTRICAL CHARACTERISTICS
VDD = 4.5 V to 15 V, TJ = TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
150
440
370
370
150
450
75
MAX UNIT
225
650
550
IN = Low, ENBL = Low, VDD = 15 V
UCC27321
UCC27322
IN = High, ENBL = Low, VDD = 15 V
IN = Low, ENBL = High, VDD = 15 V
IN = High, ENBL = High, VDD = 15 V
550
µA
IDD
Static operating current
225
650
125
675
1000
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
3
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
INPUT (IN) ELECTRICAL CHARACTERISTICS
VDD = 4.5 V to 15 V, TJ = TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
Logic 1 input threshold
TEST CONDITIONS
MIN
TYP
MAX UNIT
VIH
VIL
2
V
Logic 0 input threshold
Input current
Latch-up protection(1)
1
V
0 V ≤ VIN ≤ VDD
–10
500
0
10
µA
mA
(1) Specified by design
OUTPUT (OUT) ELECTRICAL CHARACTERISTICS
VDD = 4.5 V to 15 V, TJ = TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
9
MAX UNIT
Peak output current(1) (2)
High-level output voltage
Low-level output voltage
Output resistance high(3)
Output resistance low(3)
Latch-up protection(1)
VDD = 14 V
A
VOH
VOL
VOH = VDD – VOUT, IOUT = –10 mA
IOUT = 10 mA
150
11
300
25
mV
mV
Ω
IOUT = –10 mA, VDD = 14 V
IOUT = 10 mA, VDD = 14 V
15
25
1.1
2.5
Ω
500
mA
(1) Specified by design
(2) The pullup/pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The pulsed output current rating is the
combined current from the bipolar and MOSFET transistors.
(3) The pullup/pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resistance is the RDS(ON) of the
MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor.
ENABLE (ENBL) ELECTRICAL CHARACTERISTICS
VDD = 4.5 V to 15 V, TJ = TA = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Low-to-high transitions
MIN
1.5
TYP
2.2
MAX UNIT
VEN_H
VEN_L
Enable rising threshold voltage
Enable falling threshold voltage
Hysteresis
2.7
2
V
V
High-to-low transition
1.1
1.65
0.55
100
60
0.18
75
0.9
145
95
V
R(ENBL) Enable impedance
VDD = 14 V, ENBL = Low
kΩ
ns
ns
tD3
tD4
Propagation delay time
Propagation delay time
CLOAD = 10 nF (see Figure 2)
CLOAD = 10 nF (see Figure 2)
60
95
SWITCHING CHARACTERISTICS
VDD = 4.5 V to 15 V, TJ = TA = –40°C to 125°C (unless otherwise noted) (see Figure 1)
PARAMETER
Rise time (OUT)
TEST CONDITIONS
CLOAD = 10 nF
MIN
TYP
20
MAX UNIT
tR
75
35
75
75
ns
ns
ns
ns
tF
Fall time (OUT)
CLOAD = 10 nF
CLOAD = 10 nF
CLOAD = 10 nF
20
tD1
tD2
Delay time, IN rising (IN to OUT)
Delay time, IN falling (IN to OUT)
25
35
4
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
(a)
(b)
5V
0V
IN
V
TH
IN
V
V
t
V
TH
TH
TH
t
t
t
D1
D2
D1
D2
t
F
V
DD
80%
80%
80%
80%
t
R
t
t
F
OUT
R
OUT
20%
20%
0V
A. The 20% and 80% thresholds depict the dynamics of the bipolar output devices that dominate the power MOSFET
transition through the Miller regions of operation.
Figure 1. Switching Waveforms for (a) Inverting Driver and (b) Noninverting Driver
5V
ENBL
V
IN_L
V
IN_H
0V
t
t
D3
D4
V
DD
80%
80%
t
t
F
OUT
R
20%
0V
A. The 20% and 80% thresholds depict the dynamics of the bipolar output devices that dominate the power MOSFET
transition through the Miller regions of operation.
Figure 2. Switching Waveforms for Enable to Output
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
5
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
TYPICAL CHARACTERISTICS
INPUT CURRENT IDLE
vs
SUPPLY VOLTAGE (UCCx7321)
INPUT CURRENT IDLE
vs
SUPPLY VOLTAGE (UCCx7322)
700
600
700
600
ENBL = 0 V
IN = 5 V
ENBL = 0 V
IN = 5 V
500
400
500
400
ENBL = V
DD
IN = 5 V
ENBL = 0 V
IN = 0 V
300
200
300
200
ENBL = V
IN = 5 V
ENBL = 0 V
IN = 0 V
DD
ENBL = V , IN = 0 V
DD
100
0
100
0
ENBL = V , IN = 0 V
DD
0
2
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
V
DD
− Supply Voltage − V
V
DD
− Supply Voltage − V
Figure 3.
Figure 4.
INPUT CURRENT IDLE
vs
TEMPERATURE (UCCx7322)
INPUT CURRENT IDLE
vs
TEMPERATURE (UCCx7321)
800
800
ENBL = HI
IN = HI
700
600
700
600
ENBL = HI
IN = LO
ENBL = LO
IN = HI
ENBL = HI
IN = HI
ENBL = LO
IN = HI
500
400
300
500
400
300
ENBL = LO
IN = LO
ENBL = LO
IN = LO
ENBL = HI
IN = LO
200
100
200
100
0
0
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
T −Temperature − °C
J
T −Temperature − °C
J
Figure 5.
Figure 6.
6
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
RISE TIME
vs
SUPPLY VOLTAGE
70
60
C
LOAD
= 10 nF
CLOAD = 10 nF
t
A
= −40°C
50
40
t
A
= 105°C
t
A
= 25°C
30
20
t
A
= 0°C
10
0
4
6
8
10
12
14
16
V
DD
− Supply Voltage − V
Figure 7.
Figure 8.
0.1
1.0
0.1
1.0
Figure 9.
Figure 10.
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
7
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
t
DELAY TIME
t
DELAY TIME
vs
D1
D2
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
70
60
70
60
C
LOAD
= 10 nF
C
LOAD
= 10 nF
t
A
= 105°C
t
A
= 105°C
t
A
= 25°C
50
40
50
40
t
A
= 25°C
30
20
30
20
t
A
= 0°C
t
A
= −40°C
t
A
= −40°C
10
0
10
0
t
A
= 0°C
4
6
8
10
12
14
16
4
6
8
10
12
14
16
V
DD
− Supply Voltage − V
V
DD
− Supply Voltage − V
Figure 11.
Figure 12.
tD1 DELAY TIME
vs
LOAD CAPACITANCE
t
DELAY TIME
vs
D2
LOAD CAPACITANCE
70
70
60
V
DD
= 5 V
60
50
50
40
30
V
DD
= 10 V
V
DD
= 5 V
40
30
V
DD
= 15 V
V
DD
= 10 V
20
10
20
10
V
DD
= 15 V
0
0
1
10
100
1
10
100
C
LOAD
− Load Capacitance − nF
C
LOAD
− Load Capacitance − nF
Figure 13.
Figure 14.
8
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
PROPAGATION TIMES
INPUT THRESHOLD
vs
TEMPERATURE
vs
PEAK INPUT VOLTAGE
50
45
40
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
V
LOAD
T
= 15 V
= 10 nF
= 25°C
DD
C
t
D2
V
= 15 V
A
DD
t
RISE
35
30
25
20
V
DD
= 10 V
15
10
5
V
DD
= 4.5 V
t
FALL
t
D1
0
0
5
10
15
−50
−25
0
25
50
75
100
125
V
− Peak Input Voltage − V
IN(peak)
T − Temperature − °C
J
Figure 15.
Figure 16.
ENABLE THRESHOLD AND HYSTERESIS
ENABLE RESISTANCE
vs
vs
TEMPERATURE
TEMPERATURE
3.0
2.5
150
140
130
ENBL − ON
120
110
2.0
1.5
1.0
100
90
80
70
60
50
ENBL − OFF
0.5
0
ENBL − HYSTERESIS
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
T − Temperature − °C
J
T − Temperature − °C
J
Figure 17.
Figure 18.
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
9
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
OUTPUT BEHAVIOR
vs
VDD (UCC37321)
OUTPUT BEHAVIOR
vs
V
(UCC37321)
DD
IN = GND
ENBL = V
IN = GND
ENBL = V
DD
DD
OUT
V
DD
OUT
0 V
0 V
V
DD
10 nF Between Output and GND
10 nF Between Output and GND
50 µs/div
50 µs/div
Figure 19.
Figure 20.
OUTPUT BEHAVIOR
vs
VDD (INVERTING)
OUTPUT BEHAVIOR
vs
VDD (INVERTING)
IN = V
ENBL = V
DD
DD
IN = V
ENBL = V
DD
DD
V
DD
V
DD
OUT
OUT
0 V
0 V
10 nF Between Output and GND
10 nF Between Output and GND
50 µs/div
50 µs/div
Figure 21.
Figure 22.
10
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
OUTPUT BEHAVIOR
OUTPUT BEHAVIOR
vs
VDD (UCC37322)
vs
VDD (UCC37322)
IN = V
IN = V
DD
DD
ENBL = V
ENBL = V
DD
DD
V
DD
V
DD
OUT
OUT
0 V
0 V
10 nF Between Output and GND
10 nF Between Output and GND
50 µs/div
50 µs/div
Figure 23.
Figure 24.
OUTPUT BEHAVIOR
vs
OUTPUT BEHAVIOR
vs
VDD (NON-INVERTING)
VDD (NON-INVERTING)
IN = GND
ENBL = VDD
IN = GND
ENBL = VDD
VDD
VDD
OUT
OUT
0 V
0 V
10 nF Between Output and GND
10 nF Between Output and GND
50 µs/div
50 µs/div
Figure 25.
Figure 26.
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
11
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
APPLICATION INFORMATION
General Information
The UCC37321 and UCC37322 drivers serve as an interface between low-power controllers and power
MOSFETs. They can also be used as an interface between DSPs and power MOSFETs. High-frequency power
supplies often require high-speed, high-current drivers such as the UCC37321/2 family. A leading application is
the need to provide a high-power buffer stage between the PWM output of the control device and the gates of
the primary power MOSFET or IGBT switching devices. In other cases, the device drives the power device gates
through a drive transformer. Synchronous rectification supplies also have the need to drive multiple devices
simultaneously, which can present an extremely large load to the control circuitry.
The inverting driver (UCC37321) is useful for generating inverted gate-drive signals from controllers that have
only outputs of the opposite polarity. For example, this driver can provide a gate signal for ground-referenced, N-
channel synchronous rectifier MOSFETs in buck derived converters. This driver can also be used for generating
a gate-drive signal for a P-channel MOSFET from a controller that is designed for N-channel applications.
MOSFET gate drivers are generally used when it is not feasible to have the primary PWM regulator device
directly drive the switching devices for one or more reasons. The PWM device may not have the brute drive
capability required for the intended switching MOSFET, limiting the switching performance in the application. In
other cases, there may be a desire to minimize the effect of high-frequency switching noise by placing the high-
current driver physically close to the load. Also, newer devices that target the highest operating frequencies may
not incorporate onboard gate drivers at all. Their PWM outputs are only intended to drive the high-impedance
input to a driver such as the UCC37321/2. Finally, the control device may be under thermal stress due to power
dissipation, and an external driver can help by moving the heat from the controller to an external package.
Input Stage
The IN threshold has a 3.3-V logic sensitivity over the full range of VDD voltages; yet, it is equally compatible
with 0-V to VDD signals. The inputs of UCC37321/2 family of drivers are designed to withstand 500-mA reverse
current without either damage to the device or logic upset. In addition, the input threshold turnoff of the
UCC37321/2 has been slightly raised for improved noise immunity. The input stage of each driver should be
driven by a signal with a short rise or fall time. This condition is satisfied in typical power-supply applications,
where the input signals are provided by a PWM controller or logic gates with fast transition times (<200 ns). The
IN input of the driver functions as a digital gate, and is not intended for applications where a slow-changing input
voltage is used to generate a switching output when the logic threshold of the input section is reached. While this
may not be harmful to the driver, the output of the driver may switch repeatedly at a high frequency.
Users should not attempt to shape the input signals to the driver in an attempt to slow down (or delay) the signal
at the output. If limiting the rise or fall times to the power device is desired, then an external resistance can be
added between the output of the driver and the load device, which is generally a power MOSFET gate. The
external resistor may also help dissipate power from the device package, as discussed in the Thermal
Considerations section.
Output Stage
The TrueDrive output stage is capable of supplying ±9-A peak current pulses and swings to both VDD and GND
and can encourage even the most stubborn MOSFETs to switch. The pullup/pulldown circuits of the driver are
constructed of bipolar and MOSFET transistors in parallel. The peak output current rating is the combined current
from the bipolar and MOSFET transistors. The output resistance is the RDS(ON) of the MOSFET transistor when
the voltage on the driver output is less than the saturation voltage of the bipolar transistor. Each output stage
also provides a very low impedance to overshoot and undershoot due to the body diode of the internal MOSFET.
This means that in many cases, external Schottky clamping diodes are not required.
This unique bipolar and MOSFET hybrid output architecture (TrueDrive) allows efficient current sourcing at low
supply voltages. The UCC37321/2 family delivers 9 A of gate drive where it is most needed during the MOSFET
switching transition—at the Miller plateau region—providing improved efficiency gains.
12
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
Source/Sink Capabilities During Miller Plateau
Large power MOSFETs present a large load to the control circuitry. Proper drive is required for efficient, reliable
operation. The UCC27321/2 drivers have been optimized to provide maximum drive to a power MOSFET during
the Miller plateau region of the switching transition. This interval occurs while the drain voltage is swinging
between the voltage levels dictated by the power topology, requiring the charging/discharging of the drain-gate
capacitance with current supplied or removed by the driver.[1]
Two circuits are used to test the current capabilities of the UCC27321/2 driver. In each case, external circuitry is
added to clamp the output near 5 V while the device is sinking or sourcing current. An input pulse of 250 ns is
applied at a frequency of 1 kHz in the proper polarity for the respective test. In each test, there is a transient
period when the current peaked up and then settled down to a steady-state value. The noted current
measurements are made at a time of 200 ns after the input pulse is applied, after the initial transient.
The circuit in Figure 27 is used to verify the current-sink capability when the output of the driver is clamped at
approximately 5 V, a typical value of gate-source voltage during the Miller plateau region. The UCC27321 is
found to sink 9 A at VDD = 15 V.
VDD
UCC37321
1
2
3
4
VDD
IN
VDD
OUT
8
7
6
5
INPUT
D
SCHOTTKY
10Ω
C2
1 µF
C3
V
+
SUPPLY
5.5 V
OUT
100 µF
ENBL
PGND
AGND
V
SNS
R
SNS
0.1Ω
1 µF
CER
100 µF
AL EL
Figure 27. Sink Current Test Circuit
The circuit in Figure 28 is used to test the current-source capability with the output clamped to approximately 5 V
with a string of Zener diodes. The UCC27321 is found to source 9 A at VDD = 15 V.
VDD
UCC37321
1
2
3
4
VDD
IN
VDD
OUT
8
7
6
5
INPUT
D
SCHOTTKY
C2
C3
4.5 V
OUT
1 µF
100 µF
D
ENBL
ADJ
PGND
AGND
V
SNS
R
SNS
0.1 Ω
1 µF
CER
100 µF
AL EL
Figure 28. Source Current Test Circuit
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
13
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
It should be noted that the current-sink capability is slightly stronger than the current source capability at lower
VDD. This is due to the differences in the structure of the bipolar-MOSFET power output section, where the
current source is a P-channel MOSFET and the current sink has an N-channel MOSFET.
In a large majority of applications, it is advantageous that the turnoff capability of a driver is stronger than the
turnon capability. This helps to ensure that the MOSFET is held off during common power-supply transients that
may turn the device back on.
Operational Circuit Layout
It can be a significant challenge to avoid the overshoot/undershoot and ringing issues that can arise from circuit
layout. The low impedance of these drivers and their high di/dt can induce ringing between parasitic inductances
and capacitances in the circuit. Utmost care must be used in the circuit layout.
In general, position the driver physically as close to its load as possible. Place a 1-µF bypass capacitor as close
to the output side of the driver as possible, connecting it to pins 1 and 8. Connect a single trace between the two
VDD pins (pin 1 and pin 8); connect a single trace between PGND and AGND (pin 5 and pin 4). If a ground
plane is used, it may be connected to AGND; do not extend the plane beneath the output side of the package
(pins 5–8). Connect the load to both OUT pins (pins 7 and 6) with a single trace on the adjacent layer to the
component layer; route the return current path for the output on the component side, directly over the output
path.
Extreme conditions may require decoupling the input power and ground connections from the output power and
ground connections. The UCCx7321/2 has a feature that allows the user to take these extreme measures, if
necessary. There is a small amount of internal impedance of about 15 Ω between the AGND and PGND pins;
there is also a small amount of impedance (approximately 30 Ω) between the two VDD pins. In order to take
advantage of this feature, connect a 1-µF bypass capacitor between VDD and PGND (pins 5 and 8) and connect
a 0.1-µF bypass capacitor between VDD and AGND (pins 1 and 4). Further decoupling can be achieved by
connecting between the two VDD pins with a jumper that passes through a 40-MHz ferrite bead and connects
bias power only to pin 8. Even more decoupling can be achieved by connecting between AGND and PGND with
a pair of anti-parallel diodes (anode connected to cathode and cathode connected to anode).
VDD
Although quiescent VDD current is very low, total supply current is higher, depending on the OUT current and the
programmed oscillator frequency. Total VDD current is the sum of quiescent VDD current and the average OUT
current. Knowing the operating frequency and the MOSFET gate charge (Qg), average OUT current can be
calculated from:
IOUT = Qg × f
where f is frequency.
For the best high-speed circuit performance, two VDD bypass capacitors are recommended to prevent noise
problems. The use of surface-mount components is highly recommended. A 0.1-µF ceramic capacitor should be
located closest to the VDD-to-ground connection. In addition, a larger capacitor (such as 1-µF) with relatively low
ESR should be connected in parallel, to help deliver the high-current peaks to the load. The parallel combination
of capacitors should present a low-impedance characteristic for the expected current levels in the driver
application.
Drive Current and Power Requirements
The UCC37321/2 family of drivers is capable of delivering 9 A of current to a MOSFET gate for a period of
several hundred nanoseconds. High peak current is required to turn an N-channel device ON quickly. Then, to
turn the device OFF, the driver is required to sink a similar amount of current to ground. This repeats at the
operating frequency of the power device. An N-channel MOSFET is used in this discussion because it is the
most common type of switching device used in high-frequency power-conversion equipment.
References 1 and 2 contain detailed discussions of the drive current required to drive a power MOSFET and
other capacitive-input switching devices. Much information is provided in tabular form to give a range of the
current required for various devices at various frequencies. The information pertinent to calculating gate-drive
current requirements is summarized here; the original document is available from the TI web site (www.ti.com).
14
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
When a driver is tested with a discrete capacitive load, it is a fairly simple matter to calculate the power that is
required from the bias supply. The energy that must be transferred from the bias supply to charge the capacitor
is given by:
E = ½CV2
where C is the load capacitor and V is the bias voltage feeding the driver.
There is an equal amount of energy transferred to ground when the capacitor is discharged. This leads to a
power loss given by:
P = 2 × ½CV2f
where f is the switching frequency.
This power is dissipated in the resistive elements of the circuit. Thus, with no external resistor between the driver
and gate, this power is dissipated inside the driver. Half of the total power is dissipated when the capacitor is
charged, and the other half is dissipated when the capacitor is discharged. An actual example using the
conditions of the previous gate-drive waveform should help clarify this.
With VDD = 12 V, CLOAD = 10 nF, and f = 300 kHz, the power loss can be calculated as:
P = 10 nF × (12)2 × (300 kHz) = 0.432 W
With a 12-V supply, this equates to a current of:
I = P / V = 0.432 W / 12 V = 0.036 A
The switching load presented by a power MOSFET can be converted to an equivalent capacitance by examining
the gate charge required to switch the device. This gate charge includes the effects of the input capacitance plus
the added charge needed to swing the drain of the device between the on and off states. Most manufacturers
provide specifications that provide the typical and maximum gate charge, in nC, to switch the device under
specified conditions. Using the gate charge Qg, one can determine the power that must be dissipated when
charging a capacitor. This is done by using the equivalence Qg = CeffV to provide the following equation for
power:
P = C × V2 × f = Qg × V × f
This equation allows a power designer to calculate the bias power required to drive a specific MOSFET gate at a
specific bias voltage.
ENABLE
UCC37321/2 provides an enable input for improved control of the driver operation. This input also incorporates
logic-compatible thresholds with hysteresis. The input is internally pulled up to VDD with a 100-kΩ resistor for
active-high operation. When ENBL is high, the device is enabled, and when ENBL is low, the device is disabled.
The default state of the ENBL pin is to enable the device, and therefore can be left open for standard operation.
The output state when the device is disabled is low, regardless of the input state. See the truth table (Table 2) for
operation using enable logic.
The ENBL input is compatible with both logic signals and slow-changing analog signals. It can be directly driven,
or a power-up delay can be programmed with a capacitor between ENBL and AGND.
Table 2. Input/Ouput Table
ENBL
IN
0
1
0
1
0
1
0
1
OUT
0
0
1
1
0
0
1
1
0
0
1
0
0
0
0
1
Inverting UCC37321
Non-inverting UCC37322
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
15
UCC27321-Q1, UCC27322-Q1
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
www.ti.com
Thermal Information
The useful range of a driver is greatly affected by the drive-power requirements of the load and the thermal
characteristics of the package. For a power driver to be useful over a particular temperature range, the package
must allow for the efficient removal of the heat produced while keeping the junction temperature within rated
limits. The UCC27321/2 family of drivers is available in two different packages to cover a range of application
requirements.
As shown in Power Dissipation Ratings, the SOIC-8 (D) package has a power rating of approximately 0.5 W at
TA = 70°C. This limit is imposed in conjunction with the power derating factor also given in the table. Note that
the power dissipation in our earlier example is 0.432 W with a 10-nF load, 12-V VDD, switched at 300 kHz. Thus,
only one load of this size could be driven using the D package. The difficulties with heat removal limit the drive
available in the older packages.
The MSOP PowerPAD package (DGN) significantly relieves this concern by offering an effective means of
removing the heat from the semiconductor junction. As illustrated in Reference 3, the PowerPAD packages offer
a lead-frame die pad that is exposed at the base of the package. This pad is soldered to the copper on the PC
board directly underneath the package, reducing the θJC to 4.7°C/W. Data is presented in Reference 3 to show
that the power dissipation can be quadrupled in the PowerPAD package when compared to the standard
packages. The PC board must be designed with thermal lands and thermal vias to complete the heat removal
subsystem, as summarized in Reference 4. This allows a significant improvement in heatsink capability over that
available in the D package and is shown to more than double the power capability of the D package.
NOTE
The PowerPAD thermal pad is not directly connected to any leads of the package.
However, it is electrically and thermally connected to the substrate, which is the ground of
the device.
References
1. Power Supply Seminar SEM-1400 Topic 2: Design And Application Guide For High Speed MOSFET Gate
Drive Circuits, Laszlo Balogh (SLUP133)
2. Practical Considerations in High Performance MOSFET, IGBT and MCT Gate Drive Circuits, Bill Andreycak
(SLUA105)
3. PowerPad Thermally Enhanced Package (SLMA002)
4. PowerPAD Made Easy (SLMA004)
Related Products
Table 3. Related Products
PRODUCT
UCC37323/4/5
DESCRIPTION
PACKAGE
MSOP-8 PowerPAD, SOIC-8, PDIP-8
MSOP-8 PowerPAD, SOIC-8, PDIP-8
TSSOP-8, SOIC-8, PDIP-8
TSSOP-8, SOIC-8, PDIP-8
5-pin SOT-23
Dual 4-A low-side drivers
UCC27423/4/5
TPS2811/12/13
TPS2814/15
Dual 4-A low-side drivers with enable
Dual 2-A low-side drivers with internal regulator
Dual 2-A low-side drivers with two inputs per channel
Single 2-A low-side driver with internal regulator
Single 2-A low-side driver
TPS2816/17/18/19
TPS2828/29
5-pin SOT-23
16
Submit Documentation Feedback
Copyright © 2010–2012, Texas Instruments Incorporated
UCC27321-Q1, UCC27322-Q1
www.ti.com
SLUSA13C –FEBRUARY 2010–REVISED MARCH 2012
REVISION HISTORY
Changes from Revision B (January 2011) to Revision C
Page
•
Changed enable impedance from 135 kΩ to 145 kΩ ........................................................................................................... 4
Copyright © 2010–2012, Texas Instruments Incorporated
Submit Documentation Feedback
17
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jan-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
UCC27321QDRQ1
UCC27322QDGNRQ1
UCC27322QDRQ1
ACTIVE
ACTIVE
ACTIVE
SOIC
D
DGN
D
8
8
8
2500
2500
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
MSOP-
PowerPAD
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-1-260C-UNLIM
SOIC
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UCC27321-Q1, UCC27322-Q1 :
Catalog: UCC27321, UCC27322
•
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jan-2012
Enhanced Product: UCC27322-EP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UCC27321QDRQ1
SOIC
D
8
8
2500
2500
330.0
330.0
12.4
12.4
6.4
5.3
5.2
3.4
2.1
1.4
8.0
8.0
12.0
12.0
Q1
Q1
UCC27322QDGNRQ1
MSOP-
Power
PAD
DGN
UCC27322QDRQ1
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
UCC27321QDRQ1
UCC27322QDGNRQ1
UCC27322QDRQ1
SOIC
MSOP-PowerPAD
SOIC
D
DGN
D
8
8
8
2500
2500
2500
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
Products
Applications
Audio
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Automotive and Transportation www.ti.com/automotive
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/industrial
www.ti.com/medical
Medical
Logic
Security
www.ti.com/security
Power Mgmt
Microcontrollers
RFID
power.ti.com
Space, Avionics and Defense
Video and Imaging
www.ti.com/space-avionics-defense
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/omap
OMAP Applications Processors
Wireless Connectivity
TI E2E Community
e2e.ti.com
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明