UCC2819DTR [TI]
具有 10.2V/9.7V UVLO、温度范围为 -40°C 至 85°C 的 6kHz 至 220kHz CCM PFC 控制器 | D | 16 | -40 to 85;
| 型号： | UCC2819DTR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 10.2V/9.7V UVLO、温度范围为 -40°C 至 85°C 的 6kHz 至 220kHz CCM PFC 控制器 | D | 16 | -40 to 85 开关 控制器 开关式稳压器 开关式控制器 功率因数校正 电源电路 开关式稳压器或控制器 |
| 文件： | 总10页 (文件大小：156K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁꢁ ꢇꢃ ꢄꢅ
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ꢈꢊ ꢒ ꢐꢉ ꢓꢌꢁꢑꢊ ꢉ ꢈꢉ ꢐꢉꢐꢋ ꢀꢏꢌꢑꢊ ꢉ
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SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
D
Controls Boost Preregulator to Near-Unity
Power Factor
D, DW, N, and PW PACKAGES
(TOP VIEW)
D
D
D
D
D
D
D
D
D
D
D
World Wide Line Operation
Over-Voltage Protection
GND
PKLMT
CAOUT
CAI
DRVOUT
VCC
CT
1
2
3
4
5
6
7
8
16
15
14
13
12
Accurate Power Limiting
Average Current Mode Control
Improved Noise Immunity
VAI
MOUT
IAC
RT
Improved Feed-Forward Line Regulation
Leading Edge Modulation
11 VSENSE
10 OVP/EN
VAOUT
VFF
9
VREF
150-µA Typical Start-Up Current
Low-Power BiCMOS Operation
10.8-V to 17-V Operation
Programmable Output Voltage (Tracking
Boost Topology)
description
The UCC2819/UCC3819 provides all the functions necessary for active power factor corrected preregulators.
The controller achieves near unity power factor by shaping the ac-input line current waveform to correspond
to that of the ac-input line voltage. Average current mode control maintains stable, low distortion sinusoidal line
current.
Designed in Texas Instrument’s BiCMOS process, the UCC3819 offers new features such as lower start-up
current, lower power dissipation, overvoltage protection, a shunt UVLO detect circuitry and a leading-edge
modulation technique to reduce ripple current in the bulk capacitor.
The UCC3819 allows the output voltage to be programmed by bringing out the error amplifier noninverting input.
Available in the 16-pin D, DW, N, and PW packages.
block diagram
VCC
15
OVP/EN 10
7.5 V
REFERENCE
9
VREF
1.9 V
ENABLE
−
+
UVLO
VAOUT
7
10.2 V/9.7 V
ZERO POWER
0.33 V
VCC
−
+
VOLTAGE
ERROR AMP
VSENSE 11
VAI 13
−
+
CURRENT
AMP
8.0 V
PWM
OVP
Q
+
−
X
÷
MULT
−
+
16 DRVOUT
−
+
X
S
2
VFF
8
X
PWM
LATCH
OSC
CLK
R
R
MIRROR
2:1
1
2
GND
CLK
IAC
6
5
PKLMT
−
+
OSCILLATOR
MOUT
4
3
12
14
UDG-01009
CAI
CAOUT RT
CT
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
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ꢀ ꢁꢁꢂ ꢃ ꢄ ꢅ ꢆ ꢀ ꢁꢁ ꢇ ꢃꢄ ꢅ
ꢈ ꢉꢊꢋꢉ ꢌ ꢍꢍ ꢌ ꢎꢏ ꢐ ꢊ ꢀꢑꢈ ꢀꢑ
ꢈ ꢊꢒ ꢐꢉ ꢓꢌ ꢁꢑꢊꢉ ꢈ ꢉꢐ ꢉꢐ ꢋꢀ ꢏꢌꢑꢊ ꢉ
ꢔ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Gate drive current, continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 A
Gate drive current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 A
Input voltage, CAI, MOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Input voltage, PKLMT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V
Input voltage, VSENSE, OVP/EN, VAI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V
Input current, RT, IAC, PKLMT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Maximum negative voltage, DRVOUT, PKLMT, MOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
AVAILABLE OPTIONS
PACKAGE DEVICES
T
J
D PACKAGE
UCC3819D
UCC2819D
DW PACKAGE
UCC3819DW
UCC2819DW
N PACKAGE
UCC3819N
UCC2819N
PW PACKAGE
UCC3819PW
UCC2819PW
0°C to 70°C
−40°C to 85°C
†
The D, DW, and PW packages are available taped and reeled. Add TR suffix to device type (e.g. UCC3819DTR) to
order quantities of 2500 devices per reel.
electrical characteristics, T = 0°C to 70°C for the UCC3819, −40°C to 85°C for the UCC2819, VCC = 12 V,
A
R = 22 kΩ, C = 270 pF, (unless otherwise noted)
T
T
supply current
PARAMETER
TEST CONDITIONS
MIN
TYP
150
4
MAX UNITS
Supply current, off
Supply current, on
VCC = (VCC turnon threshold −0.3 V)
300
6
µA
VCC = 12 V,
No load on DRVOUT
2
mA
UVLO
PARAMETER
TEST CONDITIONS
MIN
9.7
9.4
0.3
TYP
10.2
9.7
MAX UNITS
VCC turnon threshold
VCC turnoff threshold
UVLO hysteresis
10.8
V
V
V
0.5
voltage amplifier
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
VIO
VAOUT = 2.75 V,
VAOUT = 2.75 V,
VSENSE = VREF,
VCM = 1 V to 7.5 V
VAOUT = 2 V to 5 V
VCM = 3.75 V
VCM = 3.75 V
VAOUT = 2.5 V
−15
15
200
200
mV
nA
nA
dB
dB
V
VAI bias current
50
50
70
90
5.5
50
V
bias current
SENSE
CMRR
50
50
5.3
0
Open loop gain
High-level output voltage
Low-level output voltage
I
= −150 µA
= 150 µA
5.6
L
L
I
150
mV
2
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ꢈꢊ ꢒ ꢐꢉ ꢓꢌꢁꢑꢊ ꢉ ꢈꢉ ꢐꢉꢐꢋ ꢀꢏꢌꢑꢊ ꢉ
ꢔ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
electrical characteristics, T = 0°C to 70°C for the UCC3819, −40°C to 85°C for the UCC2819, VCC = 12 V,
A
R = 22 kΩ, C = 270 pF, (unless otherwise noted)
T
T
over voltage protection and enable
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
VREF VREF VREF
+0.48 +0.50 +0.52
Over voltage reference
V
Hysteresis
300
1.7
0.1
500
1.9
0.2
600
2.1
0.3
mV
V
Enable threshold
Enable hysteresis
V
current amplifier
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
Input offset voltage
V
V
V
V
V
= 0 V,
V
V
V
V
V
= 3 V
−3.5
0
2.5
mV
nA
nA
dB
dB
V
CM
CM
CM
CM
CM
CAOUT
CAOUT
CAOUT
CAOUT
CAOUT
Input bias current
= 0 V,
= 3 V
−50 −100
Input offset current
= 0 V,
= 3 V
25
100
Open loop gain
= 0 V,
= 2 V to 5 V
= 3 V
90
60
Common-mode rejection ratio
High-level output voltage
Low-level output voltage
Gain bandwidth product
= 0 V to 1.5 V,
80
6.5
0.2
2.5
I
I
= −120 µA
5.6
0.1
6.8
0.5
L
= 1 mA
V
L
See Note 1
MHz
voltage reference
PARAMETER
Input voltage, (UCC3819)
Input voltage, (UCC2819)
Load regulation
TEST CONDITIONS
MIN
7.387
7.369
0
TYP
MAX UNITS
T
= 0°C to 70°C
7.5 7.613
7.5 7.631
V
A
T
A
= −40°C to 85°C
V
I
= 1 mA to 2 mA
10
10
mV
mV
mA
REF
VCC = 10.8 V to 15 V,
= 0 V
Line regulation
See Note 2
0
Short-circuit current
V
−20
−25
−50
REF
oscillator
PARAMETER
Initial accuracy
TEST CONDITIONS
MIN
85
TYP
MAX UNITS
T
A
= 25°C
100
115
1
kHz
%
Voltage stability
VCC = 10.8 V to 15 V
Line, temp,
−1
Total variation
See Note 1
80
120
5.5
kHz
V
Ramp peak voltage
4.5
5
4
Ramp amplitude voltage
(peak to peak)
3.5
4.5
V
NOTES: 1. Ensured by design, Not production tested.
2. Reference variation for V < 10.8 V is shown in Figure 2.
CC
3
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ꢔ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
electrical characteristics, T = 0°C to 70°C for the UCC3819, −40°C to 85°C for the UCC2819, VCC = 12 V,
A
R = 22 kΩ, C = 270 pF, (unless otherwise noted)
T
T
peak current limit
PARAMETER
PKLMT reference voltage
PKLMT propagation delay
TEST CONDITIONS
MIN
−15
150
TYP
MAX UNITS
15
mV
ns
350
500
multiplier
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
I
, high line, low power output
MOUT
I
I
I
I
I
= 500 µA,
= 500 µA,
= 500 µA,
= 150 µA,
= 150 µA,
V
V
V
V
V
= 4.7 V,
= 4.7 V,
= 4.7 V,
= 1.4 V,
= 1.4 V,
VAOUT = 1.25 V
VAOUT = 1.25 V
VAOUT = 5 V
0
−6
−20
−23
µA
µA
µA
µA
µA
AC
AC
AC
AC
AC
FF
FF
FF
FF
FF
current, (0°C to 85°C)
I
, high line, low power output
MOUT
current, (−40°C to 85°C)
0
−70
−10
I
, high line, high power output
, low line, low power output
, low line, high power output
, IAC limited
MOUT
current
−90 −105
−19 −50
I
MOUT
current
VAOUT = 1.25 V
VAOUT = 5 V
I
MOUT
current
−268 −300 −346
−250 −300 −400
I
I
I
I
I
I
I
I
= 150 µA,
= 300 µA,
= 150 µA,
= 500 µA,
= 500 µA,
= 500 µA,
= 150 µA,
V
FF
V
FF
V
FF
V
FF
V
FF
V
FF
V
FF
= 1.3 V,
= 3 V,
VAOUT = 5 V
µA
1/V
µA
µA
µA
µA
µW
MOUT
Gain constant (K)
AC
AC
AC
AC
AC
AC
AC
VAOUT = 2.5 V
VAOUT = 0.25 V
VAOUT = 0.25 V
VAOUT = 0.5 V
VAOUT = 0.5 V
VAOUT = 5 V
0.5
1
0
0
0
0
1.5
−2
= 1.4 V,
= 4.7 V,
= 4.7 V,
= 4.7 V,
= 1.4 V,
I
, zero current
MOUT
−2
I
I
, zero current, (0°C to 85°C)
, zero current, (−40°C to 85°C)
−3
MOUT
−3.5
MOUT
Power limit (I
MOUT
x V )
FF
−375 −420 −485
feed-forward
PARAMETER
VFF output current
TEST CONDITIONS
TEST CONDITIONS
MIN
TYP
MAX UNITS
µA
I
= 300 µA
−140 −150 −160
AC
gate driver
PARAMETER
MIN
TYP
5
MAX UNITS
Pullup resistance
I
I
= –100 mA to −200 mA
= 100 mA
12
10
50
50
100
2
Ω
Ω
O
Pulldown resistance
Output rise time
2
O
C
C
= 1 nF,
= 1 nF,
R
R
= 10 Ω,
= 10 Ω,
V
V
= 0.7 V to 9 V
25
10
95
ns
ns
%
%
L
L
L
L
DRVOUT
Output fall time
= 9 V to 0.7 V
DRVOUT
Maximum duty cycle
Minimum controlled duty cycle
93
At 100 kHz
zero power
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
0.50
Zero power comparator threshold
Measured on VAOUT
0.20
0.33
V
4
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ꢔ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
pin descriptions
CAI: (current amplifier noninverting input) Place a resistor between this pin and the GND side of current-sense
resistor. This input and the inverting input (MOUT) remain functional down to and below GND.
CAOUT: (current amplifier output) This is the output of a wide bandwidth operational amplifier that senses line
current and commands the PFC pulse-width modulator (PWM) to force the correct duty cycle. Compensation
components are placed between CAOUT and MOUT.
CT: (oscillator timing capacitor) A capacitor from CT to GND sets the PWM oscillator frequency according to:
0.6
RT CT
f [ ǒ
Ǔ
The lead from the oscillator timing capacitor to GND should be as short and direct as possible.
DRVOUT: (gate drive) The output drive for the boost switch is a totem-pole MOSFET gate driver on DRVOUT.
Use a series gate resistor to prevent interaction between the gate impedance and the output driver that might
cause the DRVOUT to overshoot excessively. See characteristic curve (Figure 13) to determine minimum
required gate resister value. Some overshoot of the DRVOUT output is always expected when driving a
capacitive load.
GND: (ground) All voltages measured with respect to ground. VCC and REF should be bypassed directly to
GND with a 0.1-µF or larger ceramic capacitor.
IAC: (current proportional to input voltage) This input to the analog multiplier is a current proportional to
instantaneous line voltage. The multiplier is tailored for very low distortion from this current input (I
) to
IAC
multiplier output. The recommended maximum I
is 500 µA.
IAC
MOUT: (multiplier output and current amplifier inverting input) The output of the analog multiplier and the
inverting input of the current amplifier are connected together at MOUT. As the multiplier output is a current, this
is a high-impedance input so the amplifier can be configured as a differential amplifier. This configuration
improves noise immunity and allows for the leading-edge modulation operation. The multiplier output current
is limited to ǒ2 I Ǔ. The multiplier output current is given by the equation:
IAC
I
(V
* 1)
IAC
VAOUT
I
+
MOUT
2
V
K
VFF
1
V
where K + is the multiplier gain constant.
OVP/EN: (over-voltage/enable) A window comparator input that disables the output driver if the boost output
voltage is a programmed level above the nominal or disables both the PFC output driver and resets SS if pulled
below 1.9 V (typ).
PKLMT: (PFC peak current limit) The threshold for peak limit is 0 V. Use a resistor divider from the negative side
of the current sense resistor to VREF to level shift this signal to a voltage level defined by the value of the sense
resistor and the peak current limit. Peak current limit is reached when PKLMT voltage falls below 0 V.
RT: (oscillator charging current) A resistor from RT to GND is used to program oscillator charging current. A
resistor between 10 kΩ and 100 kΩ is recommended. Nominal voltage on this pin is 3 V.
5
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ꢔ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
pin descriptions (continued)
VAI: (voltage amplifier non-inverting input) This input can be tied to the VREF or any other voltage reference
(≤7.5 V) to set the boost regulator output voltage.
VAOUT: (voltage amplifier output) This is the output of the operational amplifier that regulates output voltage.
The voltage amplifier output is internally limited to approximately 5.5 V to prevent overshoot.
VCC: (positive supply voltage) Connect to a stable source of at least 20 mA between 10 V and 17 V for normal
operation. Bypass VCC directly to GND to absorb supply current spikes required to charge external MOSFET
gate capacitances. To prevent inadequate gate drive signals, the output devices are inhibited unless V
exceeds the upper under-voltage lockout voltage threshold and remains above the lower threshold.
VCC
VFF: (feed-forward voltage) The RMS voltage signal generated at this pin by mirroring 1/2 of the I
pole external filter. At low line, the VFF roll should be 14 V.
into a single
IAC
VSENSE: (voltage amplifier inverting input) This is normally connected to a compensation network and to the
boost converter output through a divider network.
VREF: (voltage reference output) VREF is the output of an accurate 7.5-V voltage reference. This output is
capable of delivering 20 mA to peripheral circuitry and is internally short-circuit current limited. VREF is disabled
and remains at 0 V when V
is below the UVLO threshold. Bypass VREF to GND with a 0.1-µF or larger
VCC
ceramic capacitor for best stability. Please refer to Figures 8 and 9 for VREF line and load regulation
characteristics.
APPLICATION INFORMATION
The UCC3819 is based on the UCC3818 PFC preregulator. For a more detailed application information for this
part, please refer to the UCC3818 datasheet product folder.
The main difference between the UCC3818 and the UCC3819 is that the non-inverting input of the voltage error
amplifier is made available to the user through an external pin (VAI) in the UCC3819. The SS pin and function
were eliminated to accommodate this change.
The benefit of VAI pin is that it can be used to dynamically change the PFC output voltage based on the line
voltage (RMS) level or other conditions. Figure 1 shows one suggested implementation of the tracking boost
PFC converter as this approach is sometimes referred to. The VAI pin is tied to the VFF pin and hence output
voltage scales up with the line voltage. The benefit of this approach is that at lower line voltages the output
voltage is lower and that leads to smaller boost inductor value, lower MOSFET conduction losses and reduced
component stresses. In order for this feature to work, the downstream converter has to operate over a wider
input range.
6
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ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁꢁ ꢇꢃ ꢄꢅ
ꢈꢉꢊ ꢋ ꢉꢌꢍ ꢍ ꢌꢎꢏ ꢐ ꢊ ꢀꢑ ꢈꢀ ꢑ
ꢊ ꢒ ꢐꢉ ꢓꢌꢁꢑꢊ ꢉ ꢈꢉ ꢐꢉꢐꢋ ꢀꢏꢌꢑꢊ ꢉ
ꢔ
ꢈ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
APPLICATION INFORMATION
R21
R13
IAC
V
O
D1
F1
AC2
+
D2
C14
C13
V
LINE
Q1
D3
V
OUT
AC1
C12
R14
−
R17
D4
UCC3819
R9
R10
1
2
GND
DRVOUT 16
R12
R11
VCC (FROM BIAS SUPPLY)
C3
PKLIMIT
D5
VCC 15
3
4
5
CAOUT
CAI
C2
C1
V
REF
MOUT
CT 14
VAI 13
C9
C7
R8
C4
R1
6
IAC
C8
VFF
RT 12
D6
R7
C15
VSENSE 11
V
O
R3
R2
R19
7
8
VAOUT
VFF
C6
R6
R4
R20
R5
OVP/EN 10
C5
VREF
9
V
REF
UDG−01008
Figure 1. Suggested Implementation of UCC3819 in a Tracking Boost PFC Preregulator
7
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ꢀ ꢁꢁꢂ ꢃ ꢄ ꢅ ꢆ ꢀ ꢁꢁ ꢇ ꢃꢄ ꢅ
ꢈ ꢉꢊꢋꢉ ꢌ ꢍꢍ ꢌ ꢎꢏ ꢐ ꢊ ꢀꢑꢈ ꢀꢑ
ꢈ ꢊꢒ ꢐꢉ ꢓꢌ ꢁꢑꢊꢉ ꢈ ꢉꢐ ꢉꢐ ꢋꢀ ꢏꢌꢑꢊ ꢉ
ꢔ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
APPLICATION INFORMATION
REFERENCE VOLTAGE
vs
REFERENCE VOLTAGE
vs
SUPPLY VOLTAGE
REFERENCE CURRENT
7.60
7.55
7.50
7.45
7.40
7.510
7.505
7.500
7.495
7.490
0
5
I
10
15
20
25
9
10
11
12
13
14
− Reference Current − mA
VCC − Supply Voltage − V
VREF
Figure 2
Figure 3
MULTIPLIER OUTPUT CURRENT
vs
MULTIPLIER GAIN
vs
VOLTAGE ERROR AMPLIFIER OUTPUT
VOLTAGE ERROR AMPLIFIER OUTPUT
1.5
350
300
250
1.3
1.1
IAC = 150
A
µ
IAC = 150
A
µ
200
150
IAC = 300
A
µ
0.9
0.7
0.5
IAC = 300
A
µ
IAC = 500
A
µ
100
50
0
A
µ
IAC = 500
4.0
1.0
2.0
3.0
4.0
5.0
0.0
1.0
2.0
3.0
5.0
VAOUT − Voltage Error Amplifier Output − V
VAOUT − Voltage Error Amplifier Output − V
Figure 4
Figure 5
8
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ꢀꢁꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁꢁ ꢇꢃ ꢄꢅ
ꢈꢉꢊ ꢋ ꢉꢌꢍ ꢍ ꢌꢎꢏ ꢐ ꢊ ꢀꢑ ꢈꢀ ꢑ
ꢊ ꢒ ꢐꢉ ꢓꢌꢁꢑꢊ ꢉ ꢈꢉ ꢐꢉꢐꢋ ꢀꢏꢌꢑꢊ ꢉ
ꢔ
ꢈ
SLUS482B - APRIL 2001 − REVISED DECEMBER 2004
APPLICATION INFORMATION
RECOMMENDED MINIMUM GATE RESISTANCE
vs
MULTIPLIER CONSTANT POWER PERFORMANCE
500
SUPPLY VOLTAGE
17
16
15
14
13
12
11
10
9
400
VAOUT = 5 V
300
VAOUT = 4 V
200
VAOUT = 3 V
100
VAOUT = 2 V
8
0
10
12
14
16
18
20
0.0
1.0
2.0
3.0
4.0
5.0
VCC − Supply Voltage − V
VFF − Feedforward Voltage − V
Figure 6
Figure 7
9
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