UCC2888DTRG4 [TI]

IC,SMPS CONTROLLER,VOLTAGE-MODE,BICMOS,SOP,8PIN,PLASTIC;


型号：	UCC2888DTRG4
厂家：	TEXAS INSTRUMENTS
描述：	IC,SMPS CONTROLLER,VOLTAGE-MODE,BICMOS,SOP,8PIN,PLASTIC 信息通信管理光电二极管
文件：	总6页 (文件大小：257K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UCC1888

UCC2888

UCC3888

Off-line Power Supply Controller

DESCRIPTION

FEATURES

•

Transformerless Off-line

Power Supply

The UCC3888 controller is optimized for use as an off-line, low power, low voltage,

regulated bias supply. The unique circuit topology utilized in this device can be

visualized as two cascaded flyback converters, each operating in the discontinu-

ous mode, both driven from a single external power switch. The significant benefit

of this approach is the ability to achieve voltage conversion ratios as high as 400V

to 2.7V with no transformer and low internal losses.

Wide 100VDC to 400VDC

Allowable Input Range

Fixed 5VDC or Adjustable

Low Voltage Output

The control algorithm utilized by the UCC3888 sets the switch on time inversely

proportional to the input line voltage and sets the switch off time inversely propor-

tional to the output voltage. This action is automatically controlled by an internal

feedback loop and reference. The cascaded configuration allows a voltage conver-

sion from 400V to 2.7V to be achieved with a switch duty cycle of 7.6%. This topol-

ogy also offers inherent short circuit protection since as the output voltage falls to

zero, the switch off time approaches infinity.

Output Sinks 200mA, Sources

150mA Into a MOSFET Gate

•

Uses Low Cost SMD Inductors

Short Circuit Protected

Optional Isolation Capability

The output voltage is set internally to 5V. It can be programmed for other output

voltages with two external resistors. An isolated version can be achieved with this

topology as described further in Unitrode Application Note U-149.

OPERATION

With reference to the application diagram below, when input voltage is first applied,

the current through RON into TON is directed to VCC where it charges the external

capacitor, C3, connected to VCC. As voltage builds on VCC, an internal undervol-

tage lockout holds the circuit off and the output at DRIVE low until VCC reaches

8.4V. At this time, DRIVE goes high turning on the power switch, Q1, and redirect-

ing the current into TON to the timing capacitor, CT. CT charges to a fixed threshold

with a current ICHG=0.8 • (VIN - 4.5V)/RON. Since DRIVE will only be high for as

long as CT charges, the power switch on time will be inversely proportional to line

voltage. This provides a constant (line voltage) • (switch on time) product.

TYPICAL APPLICATION

UDG-96013

Note: This device incorporates patented technology used under license from Lambda Electronics, Inc.

SLUS159A - MARCH 1997 - REVISED FEBRUARY 2003

UCC1888

UCC2888

UCC3888

OPERATION (cont.)

At the end of the on time, Q1 is turned off and the current

through RON is again diverted to VCC. Thus the current

through RON, which charges CT during the on time, con-

tributes to supplying power to the chip during the off time.

IDCHG = (VOUT - 0.7V) / ROFF

increases, IDCHG increases reducing off time.

The operating frequency increases and VOUT rises

quickly to its regulated value.

As V

OUT

The power switch off time is controlled by the discharge

of CT which, in turn, is programmed by the regulated out-

put voltage. The relationship between CT discharge cur-

rent, IDCHG, and output voltage is illustrated as follows:

Region 3. In this region, a transconductance amplifier re-

duces IDCHG in order to maintain a regulated

VOUT.

Region 4. If VOUT should rise above its regulation range,

IDCHG falls to zero and the circuit returns to

the minimum frequency established by RS and

CT.

The range of switching frequencies is established by

RON, ROFF, RS, and CT as follows:

Frequency = 1/(TON + TOFF)

TON = RON • CT • 4.6 V/(VIN - 4.5V)

TOFF (max) = 1.4 • RS • CT

Region 1. When VOUT = 0, the off time is infinite. This

feature provides inherent short circuit protec-

tion. However, to ensure output voltage

startup when the output is not a short, a high

value resistor, RS, is placed in parallel with CT

to establish a minimum switching frequency.

Regions 1 and 4

TOFF = ROFF

• CT • 3.7V /(VOUT - 0.7V)

Region 2, excluding the effects of RS

which have a minimal impact on TOFF.

The above equations assume that VCC equals 9V. The

voltage at TON increases from approximately 2.5V to

6.5V while CT is charging. To take this into account, VIN

is adjusted by 4.5V in the calculation of TON. The voltage

at TOFF is approximately 0.7V.

Region 2. As VOUT rises above approximately 0.7V to its

regulated value, IDCHG is defined by ROFF,

and is equal to:

DESIGN EXAMPLE

The UCC3888 regulates a 5 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this ex-

ample, the IC is programmed to deliver a maximum on time gate drive pulse width of 2.2 microseconds which occurs

at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overall efficiency is ap-

proximately 50%. Additional design information is available in Unitrode Application Note U-149.

UDG-96014

UCC1888

UCC2888

UCC3888

ABSOLUTE MAXIMUM RATINGS

CONNECTION DIAGRAM

ICC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA

Current into TON Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5mA

Voltage on VOUT Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V

Current into TOFF Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250µA

Storage Temperature . . . . . . . . . . . . . . . . . . . . -65°C to +150°C

Note: Unless otherwise indicated, voltages are referenced to

ground and currents are positive into, negative out of, the speci-

fied terminals.

DIL-8, SOIC-8 (Top View)

N or J, D Package

Unless otherwise stated, these specifications hold for TA = 0°C to 70°C for the

UCC3888, -40°C to +85°C for the UCC2888, and -55°C to +125°C for the UCC1888.

No load at DRIVE pin (CLOAD=0).

ELECTRICAL CHARACTERISTICS

PARAMETER

General

TEST CONDITIONS

MIN

TYP

MAX UNITS

VCC Zener Voltage

Startup Current

ICC < 1.5mA

VOUT = 0

8.6

9.0

150

1.2

9.3

250

2.5

µA

Operating Current I(VCC)

Under-Voltage-Lockout

Start Threshold

VCC = VCC(zener) – 100mV, F = 150kHz

VOUT = 0

8.0

6.0

1.8

8.4

6.3

8.8

6.6

Minimum Operating Voltage after Start

Hysteresis

Oscillator

Amplitude

VCC = 9V

3.5

3.7

100

3.9

200

100

CT to DRIVE high Propagation Delay

CT to DRIVE low Propagation Delay

Driver

Overdrive = 0.2V

VOL

I = 20mA, VCC = 9V

I = 100mA, VCC = 9V

I = −20mA, VCC = 9V

I = −100mA, VCC = 9V

CLOAD = 1nF

0.15

0.7

8.8

7.8

0.4

1.8

VOH

8.5

6.1

Rise Time

Fall Time

CLOAD = 1nF

Line Voltage Detection

Charge Coefficient: ICHG / I(TON)

Minimum Line Voltage for Fault

Minimum Current I(TON) for Fault

On Time During Fault

VCT = 3V, DRIVE = High, I(TON) = 1mA

RON = 330k

0.73

0.79

0.85

100

RON = 330k

220

µA

µs

CT = 150pF, VLINE = Min − 1V

Oscillator Restart Delay after Fault

VOUT Error Amp

0.5

VOUT Regulated 5V (ADJ Open)

Discharge Ratio: IDCHG / I(TOFF)

Voltage at TOFF

VCC = 9V, IDCHG = I(TOFF)/2

I(TOFF) = 50µA

4.5

0.93

0.6

5.0

1.00

0.95

2.4

5.5

1.07

1.3

I(TOFF) = 50µA

Regulation gm (Note 1)

Max IDCHG = 50µA

Max IDCHG = 125µA

mA/V

1.9

4.1

7.0

∆IDCHG

Note 1: gm is defined as

for the values of VOUT when VOUT is in regulation. The two points used to calculate gm are for

∆VOUT

IDCHG at 65% and 35% of its maximum value.

UCC1888

UCC2888

UCC3888

PIN DESCRIPTIONS

ADJ: The ADJ pin is used to provide a 5V regulated sup- TOFF (regulated output control): TOFF sets the dis-

ply without additional external components. Other output charge current of the timing capacitor through an external

voltages can be obtained by connecting a resistor divider resistor connected between VOUT and TOFF.

between VOUT, ADJ and GND. Use the formula

TON (line voltage control): TON serves three functions.

When CT is discharging (off time), the current through

TON is routed to VCC. When CT is charging (on time), the

current through TON is split 80% to set the CT charge

time and 20% to sense minimum line voltage which oc-

curs for a TON current of 220µA. For a minimum line volt-

age of 80V, RON is 330kΩ.

R1 + R2

V^OUT= 2.5V •

where R1 is connected between VOUT and ADJ, and R2

is connected between ADJ and GND. R1 || R2 should be

less than 1kΩ to minimize the effect of the temperature

coefficient of the internal 30k resistors which also connect

to VOUT, ADJ, and GND. See Block Diagram.

The CT voltage slightly affects the value of the charge

current during the on time. During this time, the voltage at

the TON pin increases from 2.5V to 6.5V.

CT (timing capacitor): The signal voltage at CT has a

peak-to-peak swing of 3.7V for 9V VCC. As the voltage at

CT crosses the oscillator upper threshold, DRIVE goes

low. As the voltage on CT crosses the oscillator lower

threshold, DRIVE goes high.

VCC (chip supply voltage): The supply voltage of the

device at pin VCC is internally clamped at 9V. The device

needs an external supply, from a source such as the rec-

tified AC line or derived from the switching circuit. Pre-

cautions must be taken to ensure that total ICC does not

exceed 8mA.

DRIVE: This output is a CMOS stage capable of sinking

200mA peak and sourcing 150mA peak. The output volt-

age swing is 0 to VCC.

VOUT (regulated output): The VOUT pin is directly con-

nected to the power supply output voltage. When VOUT is

greater than VCC, VOUT bootstraps VCC.

GND (chip ground): All voltages are measured with re-

spect to GND.

BLOCK DIAGRAM

UDG-96015

UCC1888

UCC2888

UCC3888

TYPICAL CHARACTERISTICS CURVES

UNITRODE CORPORATION

7 CONTINENTAL BLVD. • MERRIMACK, NH 03054

TEL. (603) 424-2410 • FAX (603) 424-3460

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UCC2888DTRG4 [TI]

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