UCC2912 [TI]

PROGRAMMABLE HOT SWAP POWER MANAGER; 可编程热插拔电源管理器
UCC2912
型号: UCC2912
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

PROGRAMMABLE HOT SWAP POWER MANAGER
可编程热插拔电源管理器

文件: 总16页 (文件大小:659K)
中文:  中文翻译
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SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
D
D
D
D
D
D
D
D
Integrated 0.15-Power MOSFET  
3-V to 8-V Operation  
D
Unidirectional Switch  
Thermal Shutdown  
Fault-Output Indicator  
D
D
D
Digital Programmable Current Limit  
from 0 A to 3 A  
Maximum-Output Current Can Be Set to 1 A  
Above the Programmed Fault Level or to a  
Full 4 A  
Electronic Circuit Breaker Function  
1µA I  
When Disabled  
CC  
D
Power SOIC, Low-Thermal Resistance  
Packaging  
Programmable On-Time  
Programmable Start Delay  
Fixed 3% Duty Cycle  
description  
The UCC3912 family of hot swap power managers provides complete power management, hot swap capability,  
and circuit breaker functions. The only component required to operate the device, other than supply bypassing,  
is the fault timing capacitor, C . All control and housekeeping functions are integrated, and externally  
T
programmable. These include the fault current level, maximum output-sourcing current, maximum fault time,  
and startup delay. In the event of a constant fault, the internal fixed 3% duty cycle ratio limits average output  
power.  
The internal 4-bit DAC allows programming of the fault level current from 0 A to 3 A with 0.25-A resolution. The  
IMAX control pin sets the maximum sourcing current to 1 A above the fault level when driven low, and to a full  
4 A when driven high for applications which require fast output capacitor charging.  
When the output current is below the fault level, the output MOSFET is switched on with a nominal on resistance  
of 0.15 . When the output current exceeds the fault level, but is less than the maximum sourcing level, the  
output remains switched on, but the fault timer starts charging C . Once C charges to a preset threshold, the  
T
T
switch is turned off, and remains off for 30 times the programmed fault time. When the output current reaches  
the maximum sourcing level, the MOSFET transitions from a switch to a constant current source. (continued)  
block diagram  
H = 4 A  
2
3
VIN  
VIN  
IMAX 10  
30 mV  
V
REVERSE VOLTAGE  
COMPARATOR  
CHARGE  
PUMP  
+
OUT  
CURRENT SENSE  
4 A  
POWER  
FET  
+
MAX CURRENT  
LEVEL  
LINEAR CURRENT AMPLIFIER  
H = OPEN  
1 A  
ABOVE  
FAULT  
ON TIME  
CONTROL  
14 VOUT  
15 VOUT  
CURRENT FAULT  
LEVEL 0A TO 3 A  
+
3% DUTY  
CYCLE  
THERMAL  
SHUTDOWN  
OVERCURRENT  
COMPARATOR  
1.5 V  
0 A−3 A  
0.25  
RES  
+
INTERNAL  
BIAS  
1
SHTDWN  
6
7
8
9
5
4
13 12  
11  
16  
UDG-99146  
B3 B2 B1 B0  
4 BIT DAC  
GND  
CT  
FAULT  
HEATSINK  
GND PINS  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢐꢢ  
Copyright 2003, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
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SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
description (continued)  
The UCC3912 family is designed for unidirectional current flow, emulating an ideal diode in series with the power  
switch. This feature is particularly attractive in applications where many devices are powering a common bus,  
such as with SCSI Termpwr.  
The UCC3912 family can be put into sleep mode drawing only 1-µA of supply current. The SHTDWN pin has  
a preset threshold hysteresis which allows the user the ability to set a time delay upon startup to achieve  
sequencing of power. Other features include an open drain FAULT output indicator, thermal shutdown, under  
voltage lockout, and a low thermal resistance small outline package.  
}  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V  
FAULT sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
FAULT voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to V  
IN  
Output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self Limiting  
Input voltage  
(B0, B1, B2, B3, IMAX, SHTDWN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to V  
IN  
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C  
stg  
Operating junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 150°C  
J
Lead temperature (soldering, 10 sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Interface Products Data book (TI Literature  
Number SLUD002) for thermal limitations and considerations of packages.  
package information  
TSSOP-24,  
PWP Package  
(TOP VIEW)  
DIL-16, SOIC-16  
N, DP Package  
(TOP VIEW)  
SHTDWN1  
N/C 2  
24 FAULT  
23 N/C  
VIN 3  
22 VOUT  
21 VOUT  
20 GND*  
19 GND*  
18 GND*  
17 GND*  
16 GND*  
15 CT  
VIN  
4
GND* 5  
GND* 6  
GND* 7  
GND* 8  
EGND* 9  
B3 10  
B2 11  
14 IMAX  
13 B0  
B1 12  
*Pin 5 serves as lowest impedance to the electrical  
ground; Pins 4, 12, and 13 serve as heat sink/ground.  
These pins should be connected to large etch areas to  
help dissipate heat. For N package, pins 4, 12, and 13  
are N/C.  
*Pin 9 serves as lowest impedance to the electrical ground;  
other GND pins serve as heat sink/ground. These pins should  
be connected to large etch areas to help dissipate heat.  
2
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SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
electrical characteristics, these specifications apply for T = −40°C to 85°C for the UCC2912;  
A
T
= 0°C to 70°C for the UCC3912, VIN = 5 V, IMAX = 0.4 V, SHTDWN = 2.4 V  
A
(unless otherwise stated)  
supply section  
PARAMETER  
Voltage input range  
Supply current  
TEST CONDITIONS  
MIN  
3.0  
TYP  
MAX  
8.0  
UNITS  
V
1.0  
0.5  
2.0  
5.0  
mA  
µA  
Sleep mode current  
SHTDWN = 0.2 V  
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.  
output section  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
I
I
I
I
I
I
= 1 A  
= 2 A  
= 3 A  
= 1A,  
= 2 A,  
= 3 A,  
0.15  
0.3  
0.22  
0.45  
0.68  
0.27  
0.56  
0.8  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
V
0.45  
0.17  
0.35  
0.5  
V
Voltage drop  
VIN = 3 V  
V
VIN = 3 V  
V
VIN = 3 V  
V
Reverse leakage current  
Initial startup time  
V
< V  
OUT  
,
SHTDWN = 0.2 V, V  
= 5 V  
OUT  
5
20  
µA  
µs  
ns  
°C  
°C  
IN  
See Note 2  
See Note 2  
See Note 2  
See Note 2  
100  
100  
170  
10  
Short circuit response  
Thermal shutdown  
Thermal hysteresis  
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.  
NOTE 2: Ensured by design. Not production tested.  
DAC section  
PARAMETER  
TEST CONDITIONS  
Code = 0000−0011  
MIN  
TYP  
MAX  
UNITS  
µA  
A
Output leakage  
0
0.25  
0.50  
0.75  
1.00  
1.25  
1.50  
1.75  
2.00  
2.25  
2.50  
2.75  
3.0  
20  
0.45  
0.75  
1.0  
Code = 0100  
Code = 0101  
0.1  
0.25  
0.5  
A
Code = 0110  
A
Code = 0111  
0.75  
1.0  
1.25  
1.5  
A
Code = 1000  
A
Code = 1001  
1.25  
1.5  
1.75  
2.0  
A
Trip current  
Code = 1010  
A
Code = 1011  
1.7  
2.3  
A
Code = 1100  
1.9  
2.58  
2.9  
A
Code = 1101  
2.1  
A
Code = 1110  
2.3  
3.2  
A
Code = 1111  
2.5  
3.5  
A
Maximum output current  
Code = 0000 to 0011  
UCC2912 Code = 0100 to 1111,  
UCC3912 Code = 0100 to 1111,  
0.02  
2.0  
mA  
A
I
I
I
= 0 V  
0.5  
0.5  
3.0  
1.0  
1.0  
4.0  
MAX  
MAX  
MAX  
Maximum output current over trip  
(current source mode)  
= 0 V  
1.8  
A
Maximum output current (current source mode)  
Code = 0100 to 1111,  
= 2.4 V  
5.2  
A
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.  
3
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ꢒꢊ  
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
electrical characteristics, these specifications apply for T = −40°C to 85°C for the UCC2912;  
A
T
= 0°C to 70°C for the UCC3912, VIN = 5 V, IMAX = 0.4 V, SHTDWN = 2.4 V  
A
(unless otherwise stated)  
timer section  
PARAMETER  
TEST CONDITIONS  
MIN  
−45.0  
0.72  
0.72  
2.0  
TYP  
-36.0  
MAX  
−22.0  
1.57  
1.50  
6.0  
UNITS  
µA  
µA  
µA  
%
CT charge current  
V
V
V
V
= 1.0 V  
= 1.0 V  
= 1.0 V  
CT  
UCC2912  
UCC3912  
1.20  
1.20  
3.0  
CT  
CT discharge current  
CT  
Output duty cycle  
CT fault threshold  
CT reset threshold  
= 0 V  
OUT  
1.3  
1.5  
1.7  
V
0.4  
0.5  
0.6  
V
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.  
shutdown section  
PARAMETER  
Shutdown threshold  
TEST CONDITIONS  
MIN  
1.1  
TYP  
MAX  
UNITS  
V
1.5  
100  
100  
1.9  
Shutdown hysteresis  
Input current  
mV  
nA  
SHTDWN = 1 V  
500  
fault output section  
PARAMETER  
Output leakage current  
Low level output voltage  
TEST CONDITIONS  
TEST CONDITIONS  
MIN  
MIN  
TYP  
MAX  
500  
0.8  
UNITS  
nA  
I
= 10 mA  
0.4  
V
OUT  
TTL input dc characteristics section  
PARAMETER  
TYP  
MAX  
UNITS  
V
TTL input voltage high  
TTL input voltage low  
TTL input high current  
TTL input low current  
(can be connected to V  
IN  
)
2.0  
0.8  
10  
1
V
V
V
= 2.4 V  
= 0.4 V  
3
µA  
µA  
IH  
IL  
NOTE 1: All voltages are with respect to ground. Current is positive into and negative out of the specified terminal.  
pin description  
B0−B3: These pins provide digital input to the DAC which sets the fault current threshold. They can be used  
to provide a digital soft-start, adaptive current limiting.  
CT: A capacitor connected to ground sets the maximum fault time. The maximum fault time must be more than  
the time to charge the external capacitance in one cycle. The maximum fault time is defined as  
3
FAULT = 27.8 × 10 × CT. Once the fault time is reached the output will shutdown for a time given by:  
3
T
= 833 × 10 × CT, this equates to a 3% duty cycle.  
SD  
FAULT: Open drain output which pulls low upon any condition which causes the output to open: fault, thermal  
shutdown, or shutdown.  
IMAX: When this pin is set to logic low the maximum sourcing current will always be 1 A above the programmed  
fault level. When set to logic high, the maximum sourcing current will be a constant 4 A for applications which  
require fast charging of load capacitance.  
4
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SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
pin description (continued)  
SHTDWN: When this pin is brought to a logic low, the IC is put into a sleep mode drawing typically less than  
1 µA of I . The input threshold is hysteretic, allowing the user to program a startup delay with an external RC  
CC  
circuit.  
VIN: Input voltage to the UCC3912. The recommended voltage range is 3 V to 8 V. Both VIN pins should be  
connected together and to the power source.  
VOUT: Output voltage from the UCC3912. When switched the output voltage will be approximately  
V
(0.15 Ω × I  
). Both VOUT pins should be connected together and to the load.  
IN  
OUT  
APPLICATION INFORMATION  
4
12 13  
5
GND  
HEAT SINK  
GND PINS  
V
V
OUT  
IN  
2
3
14  
15  
VIN  
VOUT  
R1  
R
L
C
C
OUT  
IN  
D1  
UCC2912  
UCC3912  
LED  
R
V
SD  
IN  
S6  
16 FAULT  
11 CT  
SHTDWN  
1
C
SD  
B3  
B2  
7
B1  
8
B0 IMAX  
C
T
6
9
10  
V
IN  
DIP  
SWITCH  
S1  
S2  
S3  
S4  
S5  
NOTE: For demonstration board schematic see Design Note DN-58 (TI Literature Number SLUA187).  
UDG-99171  
Figure 1. Evaluation Circuit  
protecting the UCC3912 from voltage transients  
The parasitic inductance associated with the power distribution can cause a voltage spike at V if the load  
IN  
current is suddenly interrupted by the UCC3912. It is important to limit the peak of this spike to less than 8 V  
to prevent damage to the UCC3912. This voltage spike can be minimized by:  
D
D
D
Reducing the power distribution inductance (e.g., twist the positive and negative leads of the power supply  
feeding V , locate the power supply close to the UCC3912, use a PCB ground plane,...etc.).  
IN  
Decoupling V with a capacitor, C (refer to Figure 1), located close to pins 2 and 3. This capacitor is  
IN  
IN  
typically less than 1 µF to limit the inrush current.  
Clamping the voltage at V below 8 V with a zener diode, D1 (refer to Figure 1), located close to pins 2  
IN  
and 3.  
5
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ꢒꢊ  
ꢈꢒ  
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
APPLICATION INFORMATION  
UDG-93019-4  
Figure 2. Load Current, Timing-Capacitor Voltage, and Output Voltage of the UCC3912 Under Fault  
Conditions.  
estimating maximum load capacitance  
For hot-swap applications, the rate at which the total output capacitance can be charged depends on the  
maximum output current available and the nature of the load. For a constant-current current-limited controller,  
the output will come up if the load asks for less than the maximum available short-circuit current.  
To ensure recovery of a duty-cycle from a short-circuited load condition, there is a maximum total output  
capacitance which can be charged for a given unit ON time (fault time). The design value of ON or fault time  
can be adjusted by changing the timing capacitor C .  
T
For worst-case constant-current load of value just less than the trip limit; C  
can be estimated from:  
OUT(max)  
3
28   10   CT  
[ ǒIMAX  
Ǔ
C
* I  
 
ǒ Ǔ  
OUT(max)  
LOAD  
V
OUT  
where V  
is the output voltage.  
OUT  
6
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SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
APPLICATION INFORMATION  
For a resistive load of value RL, the value of C  
can be estimated from:  
OUT(max)  
ȡ
ȣ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
3
28   10   CT  
C
[
OUT(max)  
ȡ
ȣ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧ
ȧRL   ȏn  
1
ȧ
ȧ
ȧ
ȧ
V
ȧ
ȧ
ȧ
ȧ
OUT  
Ȣ1*  
Ȥ
ǒ Ǔ  
I
 RL  
MAX  
Ȣ
Ȥ
The overcurrent comparator senses both the DAC output and a representation of the output current. When the  
output current exceeds the programmed level the timing capacitor C charges with 36 µA of current. If the fault  
T
occurs for the time it takes for C to charge up to 1.5 V, the fault latch is set and the output switch is opened.  
T
The output remains opened until C discharges to 0.5 V with a 1.2-µA current source. Once the 0.5 V is reached  
T
the output is enabled and will either appear as a switch, if the fault is removed, or a current source if the fault  
remains. If the over current condition is still present, then C will begin charging, starting the cycle over, resulting  
T
in approximately a 3% on time.  
UDG-94019-1  
Figure 3. UCC3912 On-Time Circuitry  
7
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ꢒꢊ  
ꢈꢒ  
SLUS241D − MARCH 1994 - REVISED NOVEMBER 2003  
APPLICATION INFORMATION  
UDG-94019-1  
Figure 4. R  
vs. Temperature at 2-A Load Current.  
DS(on)  
safety recommendations  
Although the UCC3912 family is designed to provide system protection for all fault conditions, all integrated  
circuits can ultimately fail short. For this reason, if the UCC3912 is intended for use in safety critical applications  
where UL or some other safety rating is required, a redundant safety device such as a fuse should be placed  
in series with the device. The UCC3912 will prevent the fuse from blowing virtually for all fault conditions,  
increasing system reliability and reducing maintenance cost, in addition to providing the hot swap benefits of  
the device.  
8
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PACKAGE OPTION ADDENDUM  
www.ti.com  
28-Aug-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
UCC2912DP  
UCC2912DPG4  
UCC2912DPR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
D
16  
16  
16  
16  
24  
24  
16  
16  
16  
16  
24  
24  
24  
24  
40  
40  
Green (RoHS  
& no Sb/Br)  
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Request Free Samples  
Green (RoHS  
& no Sb/Br)  
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CU NIPDAU Level-2-260C-1 YEAR  
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CU NIPDAU Level-2-260C-1 YEAR  
Request Free Samples  
Purchase Samples  
SOIC  
D
2500  
2500  
60  
Green (RoHS  
& no Sb/Br)  
UCC2912DPRG4  
UCC2912PWP  
SOIC  
D
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
TSSOP  
TSSOP  
SOIC  
PW  
PW  
D
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
Request Free Samples  
Request Free Samples  
Request Free Samples  
Purchase Samples  
UCC2912PWPG4  
UCC3912DP  
60  
Green (RoHS  
& no Sb/Br)  
40  
Green (RoHS  
& no Sb/Br)  
UCC3912DPG4  
UCC3912DPTR  
UCC3912DPTRG4  
UCC3912PWP  
SOIC  
D
40  
Green (RoHS  
& no Sb/Br)  
SOIC  
D
2500  
2500  
60  
Green (RoHS  
& no Sb/Br)  
SOIC  
D
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
PW  
PW  
PW  
PW  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
Request Free Samples  
Purchase Samples  
UCC3912PWPG4  
UCC3912PWPTR  
UCC3912PWPTRG4  
60  
Green (RoHS  
& no Sb/Br)  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-Aug-2010  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
UCC2912DPR  
UCC3912DPTR  
UCC3912PWPTR  
SOIC  
SOIC  
D
D
16  
16  
24  
2500  
2500  
2000  
330.0  
330.0  
330.0  
16.4  
16.4  
16.4  
6.5  
6.5  
10.3  
10.3  
8.3  
2.1  
2.1  
1.6  
8.0  
8.0  
8.0  
16.0  
16.0  
16.0  
Q1  
Q1  
Q1  
TSSOP  
PW  
6.95  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
UCC2912DPR  
UCC3912DPTR  
UCC3912PWPTR  
SOIC  
SOIC  
D
D
16  
16  
24  
2500  
2500  
2000  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
38.0  
38.0  
38.0  
TSSOP  
PW  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All  
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time  
of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration  
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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service  
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have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such  
components to meet such requirements.  
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