UCC3923PWPR [TI]
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, TSSOP-8;
| 型号： | UCC3923PWPR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, TSSOP-8 |
| 文件： | 总10页 (文件大小：148K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SLUS471 – NOVEMBER 2000
PW PACKAGE
(TOP VIEW)
D
Wide Supply Range ±20 V to ±100 V
D
Smooth Output Ramping Using Linear
Current Amplifier
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PG1
PG2
PG3
PG4
PG5
–VIN
UVLO
SEQTIME
REF
DRAINSENS
OLVO
D
Undervoltage and Overvoltage Shutdown
D
Sequenced Open-Drain Outputs for Five
DC-To-DC Converters
D
D
D
Open-Drain Fault Output
FAULT
ON Input Referenced to Positive Supply
(UCC3923)
FLTTIME-
GATE
GND
ON
ISENS
IRAMP
INSB
ON Input referenced to Negative Supply
(possible alternative version)
INSA
D
Dual Insertion Detection Inputs
D
Electrostatic-Discharge Protection
– Human-Body-Model 2 kV
– Machine Model 200 V
PACKAGE
(TOP VIEW)
D OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
FAULT
FLTTIME
GATE
GND
INSA
INSB
IRAMP
–VIN
UVLO
PG
REF
DRAINSENS
ON
FAULT
FLTTIME
GATE
–VIN
1
2
3
4
8
7
6
5
ON
ISENS
IRAMP
GND
8
ISENS
description
The UCC3923 family of devices are Hot-Swap Power Managers for use with negative power supplies. These
devices are optimized for use in systems with nominal –48-V supplies, but are fully functional over a supply
range of –20 V to –200 V. These devices can be used both on plug-in cards and on back-planes to limit inrush
current, control load turnon and turnoff, report faults, isolate faulty loads, and sequence downstream dc-to-dc
converters.
The UCC3923 offers the basic features of controlled turnon, load current ramping, and logic output of fault status
in a tiny 8-pin package. The UCC3924 adds undervoltage protection, two insertion detection pins, power-good
sensing, one output for downstream converter enabling, and a reference for cascoding, in a 14-pin package.
The UCC3925 has all of the previously noted features plus overvoltage protection and supply sequencing for
up to five downstream converters in a 20-pin package.
AVAILABLE OPTIONS
†
PACKAGED DEVICES
TSSOP–14
T
ENABLE
A
TSSOP–8
UCC3923
UCC3926
TSSOP–20
UCC39235
UCC3928
Active high
Active low
UCC3924
–40_C to 85__C
UCC3927
†
All packages are available left end taped and reeled. Add an R suffix to the device type (e.g.,
UCC3923PWPR) to order quantities of 2000 devices per reel.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
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SLUS471 – NOVEMBER 2000
functional block diagram
LOAD
DRAINSENS
19
PG5
PG4
PG3
+
+
+
18
17
16
ON
20
4 V
3 V
+
1.4 V
GND
1
2 V
INSA
2
+
+
+
PG2
+
+
15
1 V
0 V
INSB
1.5 V
4V
PG1
3
UVLO
4
14
13
99 R
GATE
+
+
+
ISENS
FAULT
OVLO
6
12
11
R
REF
5
S
R
Q
TIMER
Q
5 V
1.25 V
7
8
9
10
SEQTIME
–VIN
IRAMP
FLTTIME
UDG–00151
‡
20-pin package shown. Pin numbers are for counting purposes only, Actual pin locations are dependent upon customer requirements and
precedence of other products.
DETAILED OPTION MATRIX
PIN NAME
DESCRIPTION
Undervoltage input
Overvoltage input
PG output(s)
UCC3923 UCC3924 UCC3925 UCC3926 UCC3927 UCC3928
UVLO
OVLO
PGx
X
X
X
5
X
X
X
5
1
X
X
X
1
X
X
X
REF
Reference output
Insert detect
X
X
X
X
X
X
X
X
INSA, INSB
DRAINSENS Power good detection input
SEQTIME
Programming for downstream load sequencing
8–Pin TSSOP
14–Pin TSSOP
20–Pin TSSOP
X
X
Packages
X
X
X
X
2
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SLUS471 – NOVEMBER 2000
Terminal Functions
TERMINAL
NO.
DESCRIPTION
NAME
I/O
UCC3923
UCC3926
UCC3924
UCC3927
UCC3925
UCC3928
DRAINSENS
FAULT
FLTTIME
GATE
GND
–
1
2
3
4
–
–
5
6
7
–
–
–
–
–
–
–
–
–
8
10
1
16
6
I
O
I
Power good detection input
Logic fault output
2
7
Programming for fault timeout
Gate drive output
3
8
O
I
4
9
Ground
INSA
5
10
11
12
13
14
15
1
I
Insertion detection input A
Insertion detection input B
Programming for current ramping
Current sense input
INSB
6
I
IRAMP
ISENS
ON
7
I
8
I
9
O
I
Logic command to turn on power to load
Input overvoltage detection input
Enable for first downstream load
Enable for second downstream load
Enable for third downstream load
Enable for fourth downstream load
Enable for fifth downstream load
Reference output
OVLO
PG1
–
12
–
O
O
O
O
O
O
I
PG2
2
PG3
–
3
PG4
–
4
PG5
–
5
REF
11
–
17
18
19
20
SEQTIME
UVLO
–VIN
Programming for downstream load sequencing
Input undervoltage detection input
Negative supply input
13
14
I
I
detailed description
power good detection input (UCC3924 and UCC3925 only)
DRAINSENS is an input that senses the voltage across the power FET. When the voltage on DRAINSENS is
less than 1V with respect to –VIN and IRAMP is greater than or equal to 5 V with respect to –VIN, then the power
FET is considered fully on and the PG outputs are allowed to begin sequencing the loads.
logic fault output (UCC3923, UCC3924, UCC3925)
FAULT is an open-drain, active-low driver that asserts when the fault latch is set. The UCC3923 UCC3924 and
UCC3925 controls the load inrush during starting by closed-loop regulation of load current. When the ON input
is low, IRAMP, FLTTIME, and SEQTIME are held low. When ON is asserted high, IRAMP is released and allows
C
to charge. Load current is limited to:
IRAMP
V
IRAMP
I
v 0.01
LOAD
R
SENSE
During this time, C
charges. If C
charges to 4 V before the power FET fully enhances, the fault
FLTTIME
FLTTIME
latch sets, the load is immediately turned off, and FAULT pulls low. The fault latch is cleared when ON is pulled
low.
3
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detailed description (continued)
programming for fault timeout
During the time when the power FET is regulating current to the load, FLTTIME is pulled high with 10 µA. When
the load current drops below the commanded maximum load current, FLTTIME is quickly pulled low. If FLTTIME
charges to 4 V before the power FET fully enhances, the fault latch sets and the load is immediately turned off.
gate drive output
When ON is low, GATE is held low. When ON is asserted high, IRAMP is released and allows C
to charge.
IRAMP
During this time, GATE rises, turning on the external power FET so that:
ǒVIRAMP
Ǔ
* V
SENSE
IN
I
+ 0.01
LOAD
R
IRAMP does not ramp higher than 5 V above –VIN, so load current is programmed to a maximum of
0.05/R . If the load is unable to accept the current, GATE rises up to 12 V above –VIN, fully enhancing
SENSE
the power FET. If load current ever spikes above that maximum value, the current limiting amplifier reduces
GATE voltage to a level that maintains I at 0.05/R
.
SENSE
LOAD
ground
GND is the ground input to the IC in negative supply systems. The ON input signal is measured with respect
to GND. All other signals are with respect to –VIN.
insertion detection
INSA and INSB are active-low inputs that must be asserted for the IC to drive the load. These inputs have
internal pullup current sources of 10 µA so they can be driven by open-drain logic. These inputs can also be
used as board insertion detection inputs. In this case, these inputs would be connected to corner pins of a
connector. The mating pins of the connector would be connected to –VIN. This would prevent operation before
both corners of the connector are mated.
current ramping
When ON is low, IRAMP is held low. When ON is asserted high, IRAMP is released and allows C
During this time, GATE rises, turning on the external power FET so that:
to charge.
IRAMP
ǒVIRAMP
Ǔ
* V
SENSE
IN
I
+ 0.01
LOAD
R
IRAMP does not ramp higher than 5 V above –VIN, so load current is programmed to a maximum of
0.05/R
.
SENSE
current sensing
Load current is sensed by the voltage between ISENS and –VIN. A current sense resistor, RSENSE is
connected between ISENS and –VIN. Maximum load current is limited to:
ǒVIRAMP
Ǔ
* V
SENSE
IN
0.05
I
+ 0.01
during current ramp and I
v
LOAD
LOAD
R
R
SENSE
when IRAMP reaches final value.
4
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detailed description (continued)
logic command to turn on power-to-load
Three logic inputs enable the load: INSA, INSB, and ON. To turn on the load, INSA and INSB must be lower
than a TTL threshold above –VIN and ON must be more than a TTL threshold above GND.
overvoltage/undervoltage lockout
In addition to the logic inputs INSA, INSB, and ON, two other inputs enable load current: OVLO and UVLO.
Specifically, OVLO must be less than 1.25 V with respect to –VIN and UVLO must be more than 1.25 V with
respect to –VIN to enable load current. These pins can be used as logic inputs or as precision overvoltage
shutdown and undervoltage lockout inputs by connecting these inputs to a voltage divider from GND to –VIN.
enable downstream power converter
The IC has five outputs to enable downstream power converters or loads. These outputs are open-drain
active-low drivers. During power–up, all five outputs are high–impedance. When load current is ramped up to
maximum command and the output power FET has V < 1 V, C
starts to charge and PG1 immediately
DS
SEQTIME
asserts low. When C
charges up to 1 V, PG2 asserts low. When C
charges up to 2 V, PG3
charges up to 4 V, PG4
SEQTIME
SEQTIME
SEQTIME
SEQTIME
asserts low. When C
asserts low.
charges up to 3 V, PG4 asserts low and when C
reference output
REF is a voltage reference output 5 V higher than –VIN. This output is enabled whenever –VIN to GND is
greater than 20 V. This reference can be used as a bias for cascode devices to buffer low-voltage logic outputs.
This reference should not be loaded with more than 50 µA.
programming for downstream load sequencing
These outputs turn on sequentially, with PG1 turning on first, PG2 second, etc. The delay from PG1 to PG2
is the time required to charge the capacitor from SEQTIME to –VIN by 1 V. SEQTIME is pulled high through
a 10-µA current source, so the delay between output enables is C/10 µA.
negative supply input
–VIN is the negative supply input to the IC. All signals are measured with respect to –VIN except ON. In positive
supply systems, –VIN is the ground input to the IC.
5
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†
absolute maximum ratings over operating free–air temperature range (unless otherwise noted)
}
Input voltage range, all pins except GND, ON, DRAINSENS . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 15 V
}
Input voltage range, GND, ON, DRAINSENS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 80 V
}
Output voltage range, PG1, PG2, PG3, PG4, PG5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 15 V
Output voltage range, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 65 V
Continuous output current, PG1, PG2, PG3, PG4, PG5, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
}
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40_C to 125_C
J
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65_C to 150_C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260_C
ESD Protection: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HBM 2 kV
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CDM 1 kV
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltages are with respect to –VIN unless otherwise stated.
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25_C
DERATING FACTOR
T
= 85_C
A
POWER RATING
ABOVE T = 25_C
POWER RATING
A
TSSOP–8
TSSOP–14
TSSOP–20
800 mW
10 mW/_C
10 mW/_C
10 mW/_C
200 mW
800 mW
200 mW
800 mW
200 mW
recommended operating conditions
MIN
–20
0
MAX
–80
7
UNIT
V
Input voltage (–VIN to GND)
Input voltage (FLTTIME, INSA, INSB, IRAM, OVLO, SEQTIME, UVLO to –VIN)
Input voltage (ISENS to –VIN)
V
0
0.2
80
V
Input voltage (DRAINSENS to –VIN)
0
V
Input voltage (ON to GND)
0
80
V
Output current (PG1, PG2, PG3, PG4, PG5, FAULT, REF)
2
mA
_C
Operating virtual junction temperature, T
J
–40
125
electrostatic discharge protection
MIN
MAX
2
UNIT
kV
Human body model
Charged device model
Machine model
1
kV
0.2
kV
6
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electrical characteristics over recommended operating junction temperature range,
–VIN to GND = –48 V, ON to GND = 2.8 V, INSA = INSB = –VIN, ISENS = –VIN, UVLO = 2.5 V, OVLO
= VIN, all outputs unloaded (unless otherwise noted)
power fet drive
PARAMETER
GATE output voltage
TEST CONDITIONS (See Note 1)
MIN
10
TYP
12
250
MAX
14
UNIT
V
V
V
= 0 V
ISENS
GATE pulldown current in fault
ISENS input current
= 0.1 V
100
–1
mA
µA
ISENS
ON = high,
0 V < V
ISENS
< 0.1 V
1
timers
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µA
IRAMP pullup current during start
IRAMP low voltage
ON = high,
ON = low
0 V < V
< 5 V
10
IRAMP
2
2
mV
V/V
mV
mV
IRAMP to ISENS gain
ON = high,
ON = high,
ON = high
0 V < V
< 5 V
0.01
IRAMP
IRAMP offset voltage referred to ISENS
IRAMP clamp voltage referred to ISENS
V
= 0 V
–2
45
IRAMP
50
10
55
FLTTIME pullup current during current
limit
ON = high,
Fault latch not set
µA
FLTTIME low voltage
ON = low
ON = high,
ON = low
ON = high,
ON = low
ON = high,
ON = high,
ON = high,
ON = high,
ON = low
10
mV
V
FLTTIME fault threshold voltage
FLTTIME discharge current
V
V
= 0.1 V
3.75
10
4.00
10
4.25
ISENS
mA
µA
mV
V
SEQTIME pullup current
= 5 V, V
= 0 V
IRAMP
ISENS
SEQTIME low-level input voltage
SEQTIME to PG2 threshold voltage
SEQTIME to PG3 threshold voltage
SEQTIME to PG4 threshold voltage
SEQTIME to PG5 threshold voltage
SEQTIME discharge current
10
1.1
2.1
3.1
4.1
V
V
V
V
= 5 V, V
= 5 V, V
= 5 V, V
= 5 V, V
= 0 V
= 0 V
= 0 V
= 0 V
0.9
1.9
2.9
3.9
10
1.0
2.0
3.0
4.0
IRAMP
IRAMP
IRAMP
IRAMP
ISENS
ISENS
ISENS
ISENS
V
V
V
mA
power good
PARAMETER
TEST CONDITIONS
= 5 V,
MIN
TYP
MAX
UNIT
PG1, PG2, PG3, PG4, PG5 on
resistance
ON = high,
V
V
SEQTIME
100
Ω
= 0 V
ISENS
To PG1 rising
DRAINSENS = –VIN
DRAINSENS threshold voltage
DRAINSENS pullup current
0.85
1.00
10
1.15
V
µA
fault output
PARAMETER
TEST CONDITIONS
= 0.1 V,
MIN
TYP
MAX
100
UNIT
ON = high,
V
ISENS
= 5 V
FAULT on resistance
Ω
V
FLTTIME
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLUS471 – NOVEMBER 2000
electrical characteristics over recommended operating junction temperature range,
–VIN to GND = –48 V, ON to GND = 2.8 V, INSA = INSB = –VIN, ISENS = –VIN, UVLO = 2.5 V, OVLO
= VIN, all outputs unloaded (unless otherwise noted) (continued)
voltage reference output
PARAMETER
REF voltage
TEST CONDITIONS
< 0 µA
MIN
4.9
TYP
5.0
MAX
5.1
UNIT
–50 µA < I
V
REF
undervoltage/overvoltage lockout
PARAMETER
UVLO falling threshold
UVLO hysteresis
TEST CONDITIONS
to GATE falling
MIN
1.20
TYP
1.25
MAX
1.30
UNIT
V
ON = high,
ON = high,
to GATE rising
25
mV
µA
V
UVLO input current
OVLO rising threshold
OVLO hysteresis
V
= 2.5 V
–1
1
UVLO
ON = high,
ON = high,
to GATE falling
to GATE rising
1.20
1.25
25
1.30
mV
µA
OVLO input current
V
= 2.5 V
–1
1
OVLO
supply and control inputs
PARAMETER
–VIN input current
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µA
250
1.4
10
INSA, INSB threshold voltage
INSA, INSB pullup current
ON = high,
= V
to GATE rising
1.0
1.0
1.8
1.8
V
V
= –VIN
INSB
µA
INSA
ON threshold voltage with respect to
GND
To GATE rising
1.4
10
V
ON input current
V
ON
– V
GND
= 5 V
µA
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLUS471 – NOVEMBER 2000
TYPICAL CHARACTERISTICS
TYPICAL TURNON CYCLE
TURNON INTO EXCESSIVELY HEAVY LOAD
–VIN
ON
–VIN
ON
IRAMP
GATE
IRAMP
GATE
ISENS
ISENS
FLTTIME
SEQTIME
ENA1
FLTTIME
FAULT
ENA2
ENA3
ENA4
ENA5
Figure 1
Figure 2
APPLICATION INFORMATION
ESD Protection
All UCC3923, UCC3924, and UCC3925 terminals incorporated ESD-protection circuitry designed to withstand
a 2-kV human-body-model discharge as defined in MIL–STD–883C.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright 2000, Texas Instruments Incorporated
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