UCC5610DWP [TI]

18-LINE 3-5 VOLT LOW CAPACITANCE SCSI ACTIVE TERMINATOR;
UCC5610DWP
型号: UCC5610DWP
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

18-LINE 3-5 VOLT LOW CAPACITANCE SCSI ACTIVE TERMINATOR

信息通信管理 光电二极管 接口集成电路
文件: 总8页 (文件大小:265K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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SLUS362A – FEBRUARY 1997 – REVISED NOVEMBER 2000  
D
Complies With SPI-2 and SPI-3 Standards  
2.75-V to 7-V Operation  
D
D
D
D
D
–650-mA Sourcing Current for Termination  
D
D
+400-mA Sinking Current for Active  
Negation Drivers  
1.8-pF Channel Capacitance during  
Disconnect  
Trimmed Termination Current to 4%  
Trimmed Impedance to 7%  
D
D
D
0.5-µA Supply Current in Disconnect Mode  
110-/2.5-kProgrammable Termination  
Completely Meets SCSI Hot Plugging  
Current Limit and Thermal Shutdown  
Protection  
description  
The UCC5610 provides 18 lines of active termination for a SCSI (small computer systems interface) parallel  
bus. The SCSI standard recommends active termination at both ends of the cable.  
The UCC5610 is ideal for high performance 3.3-V SCSI systems. The key features contributing to such low  
operating voltage are the 0.1-V drop-out regulator and the 2.75-V reference. During disconnect the supply  
current is typically only 0.5 µA, which makes the IC attractive for battery powered systems.  
The UCC5610 is designed with an ultralow-channel capacitance of 1.8 pF, which eliminates effects on signal  
integrity from disconnected terminators at interim points on the bus.  
The UCC5610 can be programmed for either a 110-or 2.5-ktermination. The 110-termination is used for  
standard SCSI bus lengths and the 2.5-ktermination is typically used in short bus applications. When driving  
the TTL compatible DISCNCT pin directly, the 110-termination is connected when the DISCNCT pin is driven  
low, and disconnected when driven high. When the DISCNCT pin is driven through an impedance between  
80 kand 150 k, the 2.5-ktermination is connected when the DISCNCT pin is driven low, and disconnected  
when driven high.  
block diagram  
3
UDG-94128-1  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
UC C 5 61 0  
1 8 Ć L I N E 3 - 5 V O LT L O W C A PA C I TA N C E S C S I  
AC T I VE T ER M I NATO R  
ą
SLUS362A – FEBRUARY 1997 – REVISED NOVEMBER 2000  
description (continued)  
The power amplifier output stage allows the UCC5610 to source full termination current and sink active negation  
current when all termination lines are actively negated.  
The UCC5610 is pin for pin compatible with Unitrode’s other 18-line SCSI terminators, allowing lower  
capacitance and lower voltage upgrades to existing systems. The UCC5610, as with all Unitrode terminators,  
is completely hot-pluggable and appears as high impedance at the terminating channels with VTRMPWR = 0 V  
or open.  
Internal circuit trimming is utilized, first to trim the 110-termination impedance to a 7% tolerance, and then most  
importantly, to trim the output current to a 4% tolerance, which maximizes noise margin.  
Other features include thermal shutdown and current limit.  
This device is offered in low thermal resistance versions of the industry standard 28-pin wide body SOIC and  
28-pin PLCC.  
DWP PACKAGE  
QP PACKAGE  
TOP VIEW  
TOP VIEW  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
DISCNCT  
LINE1  
LINE2  
LINE3  
LINE4  
LINE5  
GND*  
GND  
2
LINE18  
LINE17  
LINE16  
LINE15  
LINE14  
GND*  
3
4
4
3
2 1 28 27 26  
LINE12  
LINE13  
LINE14  
LINE15  
LINE16  
LINE17  
LINE18  
5
6
7
8
9
LINE6  
LINE5  
25  
24  
5
6
23 LINE4  
22 LINE3  
21 LINE2  
20 LINE1  
19 DISCNCT  
7
8
GND*  
GND*  
GND*  
GND*  
9
10  
11  
12  
13  
14  
LINE6  
LINE7  
LINE8  
LINE9  
TRMPWR  
LINE13  
LINE12  
LINE11  
LINE10  
REG  
10  
11  
12 13 14 15 16 17 18  
* DWP package pin 28 serves as signal ground;  
pins 7, 8, 9, 20, 21, 22 serve as heatsink/ground.  
* QP package pins 12-18 serve as both heatsink  
and signal ground.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
T
J
SOIC (DWP)  
PLCC (QP)  
0°C to 70°C  
UCC5610DWP  
UCC5610QP  
Available tape and reeled. Add TR suffix to device type to order quantities of 1000 devices per reel.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
U CC 56 10  
1 8 Ć L I N E 3 - 5 V O LT L O W C A PA C I TA N C E S C  
ACT I VE T ER MI N ATO R  
ą
SLUS362A – FEBRUARY 1997 – REVISED NOVEMBER 2000  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V  
Regulator output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self-regulating  
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°Cto 150°C  
Operating temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C  
Lead temperature (soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult  
Packaging Section of Interface Products Data Book (TI Literature Number SLUD002) for thermal limitations and considerations of packages.  
recommended operating conditions  
Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.75 V to 5.25 V  
Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 5 V  
Disconnect input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to Termpwr  
electrical characteristics, these specifications apply for T = 0°C to 70°C, TRMPWR = 3.3 V,  
A
DISCNCT = 0 V, R  
= 0 T = T , (unless otherwise noted)  
DISCNCT  
A J  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
Supply Current Section  
All termination lines = open  
All termination lines = 0.2 V  
DISCNCT = termpwr  
1
2
455  
5
mA  
mA  
µA  
Termpwr supply current  
Power down mode  
415  
0.5  
Output Section (110 – Terminator Lines)  
Terminator impedance  
Output high voltage  
See Note 4  
See Note 1  
102.3  
2.5  
110 117.7  
2.7 3.0  
–23 –22.1  
–23 –21  
–23 –20.2  
V
V
V
V
= 0.2 V,  
= 0.2 V  
= 0.2 V,  
T
= 25°C  
–25.4  
–25.4  
–25.4  
mA  
mA  
mA  
LINE  
LINE  
LINE  
J
TRMPWR = 3 V,  
TRMPWR = 3 V,  
T = 25°C  
J
Max output current  
See Note 1  
V
V
= 0.2 V,  
= 0.5 V  
See Note 1  
–25.4  
–23  
–19  
–22.4  
400  
mA  
mA  
nA  
LINE  
LINE  
Output leakage  
DISCNCT = 2.4 V, TRMPWR = 0 V to 5.25 V  
10  
Output capacitance  
DISCNCT = 2.4 V, See Note 2,  
DWP package  
See Note 3,  
1.8  
2.5  
pF  
Output Section (2.5 k– Terminator Lines) (R  
= 80 k)  
DISCNCT  
Terminator impedance  
2
2.5  
2.5  
2.7  
–1  
3
3.0  
kΩ  
V
Output high voltage  
TRMPWR = 3 V,  
See Note 1  
V
V
= 0.2 V  
= 0.2 V,  
–1.4  
–1.5  
–0.7  
–0.6  
400  
2.5  
mA  
mA  
nA  
pF  
LINE  
Max output current  
TRMPWR = 3 V,  
See Note 1  
–1  
LINE  
Output leakage  
DISCNCT = 2.4 V, TRMPWR = 0 to 5.25 V  
10  
Output capacitance  
DISCNCT = 2.4 V See Note 2,  
DWP package  
See Note 3,  
1.8  
NOTES: 1. Measuring each termination line while other 17 are low (0.2 V).  
2. Ensured by design. Not production tested.  
3. Output capacitance is measured at 0.5 V.  
4. Tested by measuring I  
OUT  
with V  
OUT  
= 0.2 V and V  
OUT  
= V – 0.1 V then calculating the impedance.  
REG  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
UC C 5 61 0  
1 8 Ć L I N E 3 - 5 V O LT L O W C A PA C I TA N C E S C S I  
AC T I VE T ER M I NATO R  
ą
SLUS362A – FEBRUARY 1997 – REVISED NOVEMBER 2000  
electrical characteristics, these specifications apply for T = 0°C to 70°C, TRMPWR = 3.3 V,  
A
DISCNCT = 0 V, R  
= 0 T = T , (unless otherwise noted)  
DISCNCT  
A J  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
Regulator Section  
Regulator output voltage  
Drop out voltage  
5.25 V > TRMPWR > 3 V  
All termination lines = 0.2 V  
2.5  
2.7  
0.1  
3.0  
0.2  
V
V
Short circuit current  
Sinking current capability  
Thermal shutdown  
V
V
= 0 V  
= 3 V  
–800 –650 –450  
mA  
mA  
°C  
°C  
REG  
200  
400  
170  
10  
800  
REG  
See Note 2  
See Note 2  
Thermal shutdown hysteresis  
Disconnect Section  
Disconnect threshold  
Input current  
R
= 0 & 80 kΩ  
0.8  
1.5  
30  
2.0  
50  
V
DISCNCT  
DISCNCT = 0 V  
µA  
NOTES: 2. Ensured by design. Not production tested.  
APPLICATION INFORMATION  
UDG-94130  
Figure 1. Typical SCSI Bus Configurations Utilizing a UCC5610 Device  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
24-Feb-2006  
PACKAGING INFORMATION  
Orderable Device  
UCC5610DWP  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
NRND  
SOIC  
DW  
28  
28  
28  
28  
Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
UCC5610DWPG4  
UCC5610DWPTR  
UCC5610DWPTRG4  
NRND  
SOIC  
SOIC  
SOIC  
DW  
DW  
DW  
Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
NRND  
Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
ACTIVE  
Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
UCC5610QP  
NRND  
NRND  
PLCC  
PLCC  
FN  
FN  
28  
28  
TBD  
TBD  
Call TI  
Call TI  
Level-2-220C-1 YEAR  
Level-2-220C-1 YEAR  
UCC5610QPTR  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
MECHANICAL DATA  
MPLC004A – OCTOBER 1994  
FN (S-PQCC-J**)  
PLASTIC J-LEADED CHIP CARRIER  
20 PIN SHOWN  
Seating Plane  
0.004 (0,10)  
0.180 (4,57) MAX  
0.120 (3,05)  
D
0.090 (2,29)  
D1  
0.020 (0,51) MIN  
3
1
19  
0.032 (0,81)  
0.026 (0,66)  
4
18  
D2/E2  
D2/E2  
E
E1  
8
14  
0.021 (0,53)  
0.013 (0,33)  
0.050 (1,27)  
9
13  
0.007 (0,18)  
M
0.008 (0,20) NOM  
D/E  
D1/E1  
D2/E2  
NO. OF  
PINS  
**  
MIN  
0.385 (9,78)  
MAX  
MIN  
MAX  
MIN  
MAX  
0.395 (10,03)  
0.350 (8,89)  
0.356 (9,04)  
0.141 (3,58)  
0.191 (4,85)  
0.291 (7,39)  
0.341 (8,66)  
0.169 (4,29)  
0.219 (5,56)  
0.319 (8,10)  
0.369 (9,37)  
20  
28  
44  
52  
68  
84  
0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58)  
0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66)  
0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20)  
0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91)  
1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45)  
4040005/B 03/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-018  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
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