UCC5618PWP [TI]
18-Line SCSI Terminator; 18线SCSI终结者
| 型号： | UCC5618PWP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 18-Line SCSI Terminator |
| 文件： | 总9页 (文件大小：748K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UCC5618
18-Line SCSI Terminator
FEATURES
DESCRIPTION
• Complies with SCSI, SCSI-2, SCSI-3, The UCC5618 provides 18 lines of active termination for a SCSI (Small
SPI and FAST-20 Standards
Computers Systems Interface) parallel bus. The SCSI standard recom-
mends and Fast-20 (Ultra) requires active termination at both ends of the
cable.
• 2pF Channel Capacitance During
Disconnect
Pin for pin compatible with the UC5601 and UC5608, the UCC5618 is ideal
for high performance 5V SCSI systems, Termpwr 4.0-5.25V. During discon-
nect the supply current is only 50µA typical, which makes the IC attractive
for lower powered systems.
• 50µA Supply Current in Disconnect
Mode
• 110Ω Termination
• SCSI Hot Plugging Compliant, 10nA
Typical
The UCC5618 is designed with a low channel capacitance of 2pF, which
eliminates effects on signal integrity from disconnected terminators at in-
terim points on the bus.
• +400mA Sinking Current for Active
Negation
The power amplifier output stage allows the UCC5618 to source full termi-
nation current and sink active negation current when all termination lines
are actively negated.
• –650mA Sourcing Current for
Termination
The UCC5618, as with all Unitrode terminators, is completely hot pluggable
and appears as high impedance at the terminating channels with
TRMPWR=0V or open.
• Trimmed Impedance to 5%
• Thermal Shutdown
• Current Limit
Internal circuit trimming is utilized, first to trim the 110Ω impedance, and
then most importantly, to trim the output current as close to the max
SCSI-3 spec as possible, which maximizes noise margin in fast SCSI op-
eration.
This device is offered in low thermal resistance versions of the industry
standard 28 pin wide body SOIC, TSSOP and PLCC.
BLOCK DIAGRAM
UDG-96005-1
Patented Circuit Design
6/98
UCC5618
ABSOLUTE MAXIMUM RATINGS
TEMPWR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V
Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V
Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 1A
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Junction Temperature . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C
All currents are positive into, negative out of the specified
terminal. Consult Packaging Section of Databook for thermal
limitations and considerations of packages.
CONNECTION DIAGRAMS
PLCC-28 (Top View)
QP Package
TSSOP-28 (Top View)
PWP Package
* DWP package pins 12–18 serve as both heatsink and signal
ground.
* PWP package pin 23 serves as signal ground; pins 7, 8, 9,
20, 21, and 22 serve as heatsink ground.
DIL-24 (Top View)
N Package
SOIC-28 (Top View)
DWP Package
* DWP package pin 28 serves as signal ground; pins 7, 8, 9,
20, 21, 22 serve as heatsink/ground.
Note: Drawings are not to scale.
2
UCC5618
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for TA = 0°C to 70°C,
TRMPWR = 4.75V, DISCNCT = 0V, TA = TJ.
PARAMETER
Supply Current Section
TEST CONDITIONS
MIN
TYP
MAX UNITS
TERMPWR Supply Current
All Termination Lines = Open
1
2
mA
mA
µA
All Termination Lines = 0.2V
DISCNCT = TRMPWR
420
50
440
100
Power Down Mode
Output Section (Termination Lines)
Termination Impedance
Output High Voltage
See Figure 1
104.5
2.6
110
2.8
115.5
3
Ω
V
VTRMPWR = 4V (Note 1)
VLINE = 0.2V, TJ = 25°C
VLINE = 0.2V
Max Output Current
–22.1 –23.3
–20.7 –23.3
–24
–24
–24
mA
mA
mA
VLINE = 0.2V, TERMPWR = 4V, TJ = 25°C
(Note 1)
–21
–23.3
VLINE = 0.2V, TRMPWR = 4V (Note 1)
VLINE = 0.5V
–20
–23
–24
–22.4
400
mA
mA
nA
Output Leakage
DISCNCT = 2.4V, TRMPWR = 0V to 5.25V,
REG = 0.2V, VLINE = 5.25V
10
2
Output Capacitance
Regulator Section
DISCNCT = 2.4V (Note 2)
3.5
pF
Regulator Output Voltage
Drop Out Voltage
2.6
2.8
0.4
3
V
V
All Termination Lines = 0.2V
VREG = 0V
0.8
Short Circuit Current
Sinking Current Capability
Thermal Shutdown
–475 –650 –950
mA
mA
°C
°C
VREG = 3.5V
200
400
170
10
800
Thermal Shutdown Hysteresis
Disconnect Section
Disconnect Threshold
Input Current
0.8
1.5
2
V
DISCNCT = 0V
–10
–30
µA
Note 1: Measuring each termination line while other 17 are low (0.2V).
Note 2: Guaranteed by design. Not 100% tested in production.
Procedure:
1) Measure V
N.L.
REG
2) Set V = 0.2V
L
3) Measure I
at 0.2V
MAX
4) Impedance =
UDG-96102-1
Figure 1. Termline Impedance Measurement Circuit
3
UCC5618
PIN DESCRIPTIONS
DISCNCT: Taking this pin high or leaving it open causes
the 18 channels to become high impedance and the chip
to go into low-power mode; a low state allows the
channels to provide normal termination.
LINE1–LINE18: 110Ω termination channels.
REG: Output of the internal 2.8V regulator.
TRMPWR: Power for the IC.
GND: Ground reference for the IC.
APPLICATION INFORMATION
UDG-96012-1
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
4
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
UCC5618DWP
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LIFEBUY
SOIC
SOIC
DW
28
28
28
28
28
28
28
28
28
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-3-260C-168 HR
UCC5618DWP
UCC5618DWPG4
UCC5618DWPTR
UCC5618DWPTRG4
UCC5618PWP
LIFEBUY
LIFEBUY
LIFEBUY
LIFEBUY
LIFEBUY
LIFEBUY
LIFEBUY
LIFEBUY
DW
DW
DW
PW
PW
PW
PW
FN
20
1000
1000
50
Green (RoHS
& no Sb/Br)
0 to 70
UCC5618DWP
UCC5618DWP
UCC5618DWP
UCC5618PWP
UCC5618PWP
UCC5618PWP
UCC5618PWP
UCC5618QP
SOIC
Green (RoHS
& no Sb/Br)
0 to 70
SOIC
Green (RoHS
& no Sb/Br)
0 to 70
TSSOP
TSSOP
TSSOP
TSSOP
PLCC
Green (RoHS
& no Sb/Br)
0 to 70
UCC5618PWPG4
UCC5618PWPTR
UCC5618PWPTRG4
UCC5618QP
50
Green (RoHS
& no Sb/Br)
0 to 70
2000
2000
37
Green (RoHS
& no Sb/Br)
0 to 70
Green (RoHS
& no Sb/Br)
0 to 70
Green (RoHS
& no Sb/Br)
0 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Feb-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UCC5618DWPTR
SOIC
DW
28
1000
330.0
32.4
11.35 18.67
3.1
16.0
32.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Feb-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 28
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 55.0
UCC5618DWPTR
1000
Pack Materials-Page 2
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