UCC5672MWPTR [TI]
9-LINE 105ohm SCSI BUS TERMINATOR, PDSO36, GREEN, PLASTIC, SSOP-36;
| 型号： | UCC5672MWPTR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 9-LINE 105ohm SCSI BUS TERMINATOR, PDSO36, GREEN, PLASTIC, SSOP-36 |
| 文件： | 总6页 (文件大小：52K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UCC5672
Multimode (LVD/SE) SCSI 9 Line Terminator
FEATURES
DESCRIPTION
• Auto Selection Multi-Mode Single
Ended or Low Voltage Differential
Termination
The UCC5672 Multi-Mode Low Voltage Differential and Single Ended Ter-
minator is both a single ended terminator and a low voltage differential ter-
minator for the transition to the next generation SCSI Parallel Interface
(SPI-3). The low voltage differential is a requirement for the higher speeds
at a reasonable cost and is the only way to have adequate skew budgets.
• 2.7V to 5.25V Operation
• Differential Failsafe Bias
The automatic mode select/change feature switches the terminator be-
tween Single Ended or LVD SCSI Termination, depending on the bus
mode. If the bus is in High Voltage Differential Mode, the terminator lines
transition into a High Impedance state.
• Built-in SPI-3 Mode Change Filter/
Delay
• Meets SCSI-1, SCSI-2, Ultra2 (SPI-2
LVD) and Ultra3/Ultra160 Standards
The UCC5672 is SPI-3, SPI-2, and SCSI-2 compliant. This device is of-
fered in a 28 pin TSSOP package to minimize the footprint. The UCC5672
is also available in a 36 pin MWP package.
• Supports Active Negation
• 3pF Channel Capacitance
BLOCK DIAGRAM
HPD
2.1V
FILTER/
DELAY
DIFFB
17
LVD
SE
0.6V
DIFSENS
REF 1.3V
16 DIFSENS
ENABLE
TRMPWR
TRMPWR
28
27
SOURCE/SINK
REGULATORS
SE REF
2.7V
110
124
SW1
56mV
52
52
10µA
LVD REF
1.25V
–
+
3
2
L1–
L1+
56mV
+
–
DISCNCT
13
ENABLE
SE GROUND
SWITCH
110
OTHER
SWITCHES
56mV
MODE
SW1
UP
52
52
HS/GND
HS/GND
GND
6
–
+
26 L9–
25 L9+
124
SE
LVD
HPD
UP
56mV
22
14
DOWN DOWN
+
–
DOWN
OPEN
OPEN
DISCNCT OPEN
SE GROUND
SWITCH
1
REG
Note: Indicated pinout is for 28 pin TSSOP package.
UDG-99125
SLUS414A - FEBRUARY 2000
UCC5672
ABSOLUTE MAXIMUM RATINGS
QSOP-36 (TOP VIEW)
MWP Package
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5V
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300°C
1
2
REG
N/C
TRMPWR
N/C
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
All voltages are with respect to GND. Currents are positive into,
negative out of the specified terminal. Consult Packaging Sec-
tion of the Databook for thermal limitations and considerations
of packages.
3
N/C
N/C
4
L1+
N/C
5
L1–
L9–
RECOMMENDED OPERATING CONDITIONS
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V
6
L2+
L9+
7
L2–
L8–
8
HS/GND
HS/GND
HS/GND
L3+
L8+
CONNECTION DIAGRAM
9
HS/GND
HS/GND
HS/GND
L7–
TSSOP-28 (TOP VIEW)
PWP Package
10
11
12
13
14
15
16
17
18
REG
L1+
1
2
3
4
5
6
7
8
9
28 TRMPWR
27 TRMPWR
26 L9–
L3–
L4+
L7+
L1–
L4–
L6–
L2+
25 L9+
L5+
L6+
L2–
24 L8–
L5–
DIFF B
DIFSENS
N/C
HS/GND
L3+
23 L8+
DISCNCT
GND
22 HS/GND
21 L7–
L3–
L4+
20 L7+
L4– 10
L5+ 11
19 L6–
18 L6+
L5– 12
17 DIFFB
16 DIFSENS
15 N/C
DISCNCT 13
GND 14
2
UCC5672
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0°C to 70°C,
TRMPWR = 2.7V to 5.25V.
PARAMETER
TEST CONDITIONS
LVD SCSI Mode
MIN
TYP
MAX UNITS
TRMPWR Supply Current Section
TRMPWR Supply Current
23
14
35
25
mA
mA
µA
SE Mode
DISCNCT Mode
250
500
Regulator Section
1.25V Regulator Output Voltage
1.25V Regulator Source Current
1.25V Regulator Sink Current
2.7V Regulator Output Voltage
2.7V Regulator Source Current
2.7V Regulator Sink Current
Diff Sense Driver (DIFSENS) Section
1.3V DIFSENS Output Voltage
1.3V DIFSENS Source Current
1.3V DIFSENS Sink Current
Differential Termination Section
Differential Impedance
LVD SCSI Mode
1.15
1.25
1.35
V
V
REG= 0V
–800 –420 –225
mA
mA
V
VREG= 3.3V
SE Mode
100
2.5
180
2.7
420
3.0
VREG= 0V
VREG= 3.3V
–800 –420 –225
mA
mA
100
180
1.3
420
DIFSENS
1.2
–15
50
1.4
–5
V
VDIFSENS = 0V
VDIFSENS = 2.75V
mA
µA
200
100
110
100
1.15
105
150
110
165
125
1.35
3
Ω
Ω
Common Mode Impedance
Differential Bias Voltage
(Note 2)
mV
V
Common Mode Bias
1.25
Output Capacitance
Single Ended Measurement to Ground (Note 1)
pF
Single Ended Termination Section
Impedance
100
108
–23
116
Ω
(VLX −0.2V )
Z =
, (Note 3)
ILX
Termination Current
Signal Level 0.2V, All Lines Low
Signal Level 0.5V
–25.4
–22.4
–20
–17
400
3
mA
mA
nA
pF
Ω
Output Leakage
Output Capacitance
Single Ended Measurement to Ground (Note 1)
I= 10mA
Single Ended GND SE Impedance
20
60
Disconnect (DISCNCT) and Diff Buffer (DIFFB) Input Section
DISCNCT Threshold
0.8
–30
0.5
1.9
–1
2.0
V
µA
V
DISCNCT Input Current
–10
DIFFB SE to LVD SCSI Threshold
DIFFB LVD SCSI to HPD Threshold
DIFFB Input Current
0.7
2.4
1
V
µA
3
UCC5672
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0°C to 70°C,
TRMPWR = 2.7V to 5.25V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
300 ms
Time Delay/Filter Section
Mode Change Delay
A new mode change can start any time after a
previous mode change has been detected.
(Note4 )
100
180
Note 1: Guaranteed by design. Not 100% tested in production.
1.2V
Note 2: ZCM
=
; Where VCM = Voltage measured with L+ tied to L– and zero current applied;
I V
−I V
CM
+0.6V
−0.6V
(
)
(
)
CM
Note 3: VLX= Output voltage for each terminator minus output pin (L1– through L9–) with each pin unloaded.
ILX = Output current for each terminator minus output pin (L1– through L9–) with the minus output pin forced to 0.2V.
Note 4: Noise on DIFFB will not cause a false mode change. The time delay is that same for a change from any mode to any
other mode. Within 300ms after power is applied the mode is defined by the voltage of DIFFB.
PIN DESCRIPTIONS
DIFFB: Input pin for the comparators that select SE, GND: Power Supply return.
LVD SCSI, or HIPD modes of operation. This pin should
be decoupled with a 0.1µF capacitor to ground and then
coupled to the DIFSENS pin through a 20kΩ resistor.
L1– thru L9–: Termination lines. These are the active
lines in SE mode and are the negative lines for LVD
SCSI mode. In HIPD mode, these lines are high imped-
ance.
DIFSENS: Connects to the Diff Sense line of the SCSI
bus. The bus mode is controlled by the voltage level on
this pin.
L1+ thru L9+: Termination lines. These lines switch to
ground in SE mode and are the positive lines for LVD
SCSI mode. In HIPD mode, these lines are high imped-
ance.
DISCNCT: Input pin used to shut down the terminator if
the terminator is not connected at the end of the bus.
Connect this pin to ground to activate the terminator or
open pin to disable the terminator.
REG: Regulator bypass pin, must be connected to a
4.7 F capacitor to ground.
HS/GND: Heat sink ground pins. These should be con-
nected to large ground area PC board traces to increase
the power dissipation capability.
TRMPWR: 2.7V to 5.25V power input pin. Bypass near
the terminators with a 4.7 F capacitor to ground.
APPLICATION INFORMATION
All SCSI buses require a termination network at each liver 1.3V to the DIFSENS line. If only LVD SCSI devices
end to function properly. Specific termination require- are present, the DIFSENS line will be successfully driven
ments differ, depending on which types of SCSI devices to 1.3V and the terminators will configure for LVD SCSI
are present on the bus.
operation. If any single ended devices are present, they
will present a short to ground on the DIFSENS line, sig-
naling the UCC5672(s) to configure into the SE mode,
accommodating the SE devices. Or, if any high voltage
differential (HVD) SCSI devices are present, the
DIFSENS line is pulled high and the terminator will enter
a high impedance state, effectively disconnecting from
the bus.
The UCC5672 is used in multi-mode active termination
applications, where single ended (SE) and low voltage
differential (LVD) SCSI devices might coexist. The
UCC5672 has both SE and LVD SCSI termination net-
works integrated into a single monolithic component. The
correct termination network is automatically determined
by the SCSI bus "DIFSENS" signal.
The DIFSENS line is monitored by each terminator
through a 50Hz noise filter at the DIFFB input pin. A set
of comparators detect and select the appropriate termi-
The SCSI bus DIFSENS signal line is used to identify
which types of SCSI devices are present on the bus. On
power-up, the UCC5672 DIFSENS drivers will try to de-
4
UCC5672
APPLICATION INFORMATION (cont.)
nation for the bus as follows. If the DIFSENS signal is Three UCC5672 multi-mode parts are required at each
below 0.5V, the termination network is set for single end of the bus to terminate 27 (18 data, plus 9 control)
ended. Between 0.7V and 1.9V, the termination network lines. Each part includes a DIFSENS driver, but only one
switches to LVD SCSI, and above 2.4V indicates HVD is necessary to drive the line. The DIFFB inputs on all
SCSI, causing the terminators to disconnect from the three parts are connected together, allowing them to
bus. These thresholds accommodate differences in share the same 50Hz noise filter. This multi-mode termi-
ground potential that can occur with long lines.
nator operates in full specification down to 2.7V
TRMPWR voltage. This accommodates 3.3V systems,
UCC5672
UCC5672
Termpower
Termpower
L1+
L1–
2
3
2
3
L1+
L1–
28 TRMPWR
27 TRMPWR
13 DISCNCT
TRMPWR 28
TRMPWR 27
DISCNCT 13
CONTROL LINES (9)
DIFF SENSE
L9+ 25
L9– 26
25 L9+
26 L9–
REG
1
DIFFB
17
16
16
DIFFB
17
REG
1
20k
20k
4.7µF
4.7µF
0.1µF
0.1µF
UCC5672
28 TRMPWR
UCC5672
TRMPWR 28
L1+
L1–
2
3
2
3
L1+
L1–
27 TRMPWR
13 DISCNCT
TRMPWR 27
DISCNCT 13
DATA LINES (9)
L9+ 25
L9– 26
25 L9+
26 L9–
4.7µF
4.7µF
REG
1
DIFFB
17
DIFFB
17
REG
1
4.7µF
4.7µF
UCC5672
28 TRMPWR
UCC5672
L1+
L1–
2
3
2
3
L1+
L1–
TRMPWR 28
TRMPWR 27
DISCNCT 13
27 TRMPWR
13 DISCNCT
DATA LINES (9)
L9+ 25
L9– 26
25 L9+
26 L9–
REG
1
DIFFB
17
DIFFB
17
REG
1
4.7µF
4.7µF
Note: Indicated pinout is for 28 pin TSSOP package.
Figure 1. Application diagram.
5
UCC5672
APPLICATION INFORMATION (cont.)
with allowance for the 3.3V supply tolerance (+/- 10%), a 1pF to each plane. Each feed-through will add about
unidirectional fusing device and cable drop. In 3.3V 2.5pF to 3.5pF. Enlarging the clearance holes on both
TRMPWR systems, the UCC3918 is recommended in power and ground planes will reduce the capacitance.
place of the fuse and diode. The UCC3918's lower volt- Similarly, opening up the power and ground planes under
age drop allows additional margin over the fuse and di- the connector will reduce the capacitance for
ode, for the far end terminator.
through-hole connector applications. Capacitance will
also be affected by components, in close proximity,
above and below the circuit board.
Layout is critical for Ultra2 and Ultra3/Ultra160 systems.
The SPI-2 standard for capacitance loading is 10pF max-
imum from each positive and negative signal line to Unitrode multi-mode terminators are designed with very
ground, and a maximum of 5pF between the positive and tight balance, typically 0.1pF between pins in a pair and
negative signal lines of each pair is allowed. These maxi- 0.3pF between pairs. At each L+ pin, a ground driver
mum capacitances apply to differential bus termination drives the pin to ground, while in single ended mode. The
circuitry that is not part of a SCSI device, (e.g. a cable ground driver is specially designed to not effect the ca-
terminator). If the termination circuitry is included as part pacitive balance of the bus when the device is in LVD
of a SCSI device, (e.g., a host adaptor, disk or tape SCSI or disconnect mode.
drive), then the corresponding requirements are 30pF
Multi-layer boards need to adhere to the 120Ω imped-
maximum from each positive and negative signal line to
ance standard, including the connectors and feed-
ground and 15pF maximum between the positive and
throughs. This is normally done on the outer layers with
negative signal lines of each pair.
4 mil etch and 4 mil spacing between runs within a pair,
The SPI-2 standard for capacitance balance of each pair
and balance between pairs is more stringent. The stan-
dard is 0.75pF maximum difference from the positive and
negative signal lines of each pair to ground. An additional
requirement is a maximum difference of 2pF when com-
paring pair to pair. These requirements apply to differen-
tial bus termination circuitry that is not part of a SCSI
device. If the termination circuitry is included as part of a
device, then the corresponding balance requirements are
2.25pF maximum difference within a pair, and 3pF from
pair to pair.
and a minimum of 8 mil spacing to the adjacent pairs to
reduce crosstalk. Microstrip technology is normally too
low of impedance and should not be used. It is designed
for 50Ω rather than 120Ω differential systems. Careful
consideration must be given to the issue of heat manage-
ment. A multi-mode terminator, operating in SE mode,
will dissipate as much as 130mW of instantaneous power
per active line with TRMPWR = 5.25V. The UCC5672 is
offered in a 28 pin TSSOP. This package includes two
heat sink ground pins. These heat sink/ground pins are
directly connected to the die mount paddle under the die
and conduct heat from the die to reduce the junction tem-
perature. Both of the HS/GND pins need to be connected
to etch area or four feed-through per pin connecting to
the ground plane layer on a multi-layer board.
Feed-throughs, through-hole connections, and etch
lengths need to be carefully balanced. Standard
multi-layer power and ground plane spacing add about
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
6
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