ULQ2004ATDRG4Q1 [TI]

支持 15V 输入电压和较高工作温度条件的 50V、7 通道汽车达林顿阵列 | D | 16 | -40 to 105;
ULQ2004ATDRG4Q1
型号: ULQ2004ATDRG4Q1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

支持 15V 输入电压和较高工作温度条件的 50V、7 通道汽车达林顿阵列 | D | 16 | -40 to 105

开关 光电二极管 小信号双极晶体管
文件: 总11页 (文件大小:234K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢅꢆ ꢇꢂꢈ ꢉ ꢀꢁ ꢂꢃ ꢄꢄ ꢊꢆ ꢇꢂ ꢈ ꢉ  
ꢋꢌ ꢍꢋ ꢇꢎꢏ ꢁꢐꢆꢍ ꢑ ꢋꢌ ꢍꢋ ꢇꢒꢀꢓꢓꢑ ꢔꢐ ꢕꢆꢓ ꢁꢌ ꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔꢖ ꢌꢖꢐꢏꢓ ꢆ ꢓꢓ ꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
D PACKAGE  
(TOP VIEW)  
D
Qualification in Accordance With  
AEC-Q100  
D
D
Qualified for Automotive Applications  
1B  
2B  
3B  
4B  
5B  
6B  
7B  
E
1C  
2C  
3C  
4C  
5C  
6C  
7C  
COM  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
D
D
ESD Protection Exceeds 200 V Using  
Machine Model (C = 200 pF, R = 0)  
500-mA Rated Collector Current  
(Single Output)  
D
D
D
High-Voltage Outputs . . . 50 V  
Output Clamp Diodes  
Inputs Compatible With Various Types of  
Logic  
D
Relay-Driver Applications  
Contact Texas Instruments for details. Q100 qualification data  
available on request.  
description  
The ULQ2003A-Q1 and ULQ2004A-Q1 are high-voltage, high-current Darlington transistor arrays. Each  
consists of seven npn Darlington pairs that feature high-voltage outputs with common-cathode clamp diodes  
for switching inductive loads. The collector-current rating of a single Darlington pair is 500 mA. The Darlington  
pairs can be paralleled for higher current capability. Applications include relay drivers, hammer drivers, lamp  
drivers, display drivers (LED and gas discharge), line drivers, and logic buffers.  
The ULQ2003A-Q1 has a 2.7-kseries base resistor for each Darlington pair, for operation directly with TTL  
or 5-V CMOS devices. The ULQ2004A-Q1 has a 10.5-kseries base resistor to allow operation directly from  
CMOS devices that use supply voltages of 6 V to 15 V. The required input current of the ULQ2004A-Q1 is below  
that of the ULQ2003A-Q1.  
AVAILABLE OPTIONS  
{
D PACKAGES  
T
A
SMALL OUTLINE  
ULQ2003ATDQ1  
ULQ2003ATDRQ1  
−40°C to 105°C  
}
ULQ2004ATDQ1  
ULQ2004ATDRQ1  
The D package is available taped and reeled. Add the suffix R to  
device type (e.g., ULQ2003TDADRQ1).  
ULQ2004ATDQ1 is Product Preview only.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢐꢤ  
Copyright 2004, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄꢄ ꢅ ꢆ ꢇꢂꢈꢉ ꢀꢁ ꢂꢃ ꢄ ꢄ ꢊ ꢆꢇꢂ ꢈ ꢉ  
ꢋ ꢌꢍ ꢋꢇꢎ ꢏꢁꢐꢆ ꢍꢑ ꢋꢌ ꢍ ꢋꢇꢒ ꢀꢓꢓ ꢑꢔꢐ ꢕꢆ ꢓꢁ ꢌꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔ ꢖꢌ ꢖꢐꢏꢓ ꢆꢓ ꢓꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
logic diagram  
9
COM  
1C  
1
16  
1B  
2
15  
14  
13  
12  
11  
10  
2B  
2C  
3C  
4C  
5C  
6C  
7C  
3
3B  
4
4B  
5
5B  
6
6B  
7
7B  
schematics (each Darlington pair)  
COM  
Output  
C
R
B
Input  
B
ULQ2003A-Q1: R = 2.7 kΩ  
B
B
ULQ2004A-Q1: R = 10.5 kΩ  
7.2 kΩ  
3 kΩ  
E
ULQ2003A-Q1, ULQ2004A-Q1  
All resistor values shown are nominal.  
absolute maximum ratings at 25°C free-air temperature (unless otherwise noted)  
Collector-emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V  
Clamp diode reverse voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V  
Input voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V  
I
Peak collector current (see Figure 14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA  
Output clamp current, I  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA  
OK  
Total emitter-terminal current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −2.5 A  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Package thermal impedance, θ (see Note 2)  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
JA  
Operating free-air temperature range, T , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 105°C  
A
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
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ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢅꢆ ꢇꢂꢈ ꢉ ꢀꢁ ꢂꢃ ꢄꢄ ꢊꢆ ꢇꢂ ꢈ ꢉ  
ꢋꢌ ꢍꢋ ꢇꢎꢏ ꢁꢐꢆꢍ ꢑ ꢋꢌ ꢍꢋ ꢇꢒꢀꢓꢓꢑ ꢔꢐ ꢕꢆꢓ ꢁꢌ ꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔꢖ ꢌꢖꢐꢏꢓ ꢆ ꢓꢓ ꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
DISSIPATION RATING TABLE  
DERATING FACTOR = 85°C  
T
= 25°C  
T
T = 105°C  
A
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING POWER RATING  
A
D
950 mW  
7.6 mW/°C  
494 mW 342 mW  
electrical characteristics over recommended operating conditions (unless otherwise noted)  
ULQ2003A-Q1  
ULQ2004A-Q1  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
I
C
I
C
I
C
I
C
I
C
I
C
I
C
I
C
I
C
= 125 mA  
= 200 mA  
= 250 mA  
= 275 mA  
= 300 mA  
= 350 mA  
= 100 mA  
= 200 mA  
= 350 mA  
5
6
2.7  
2.9  
V
V
On-state input voltage, See Figure 6  
V
= 2 V  
V
I(on)  
CE  
7
3
8
1.1  
1.3  
1.6  
I = 250 µA,  
I
0.9  
1
1.2  
1.4  
1.7  
0.9  
1
Collector-emitter saturation voltage,  
See Figure 5  
I = 350 µA,  
I
V
CE(sat)  
I = 500 µA,  
I
1.2  
1.2  
V
= 50 V, I = 0,  
I
CE  
See Figure 1  
100  
50  
I
Collector cutoff current  
µA  
CEX  
I = 0  
100  
500  
V
= 50 V,  
I
CE  
See Figure 2  
V = 1 V  
I
Clamp forward voltage,  
See Figure 8  
V
I
= 350 mA  
1.7  
2.2  
1.7  
65  
2.1  
V
F
F
I
Off-state input current, See Figure 3  
V
= 50 V,  
I
C
= 500 µA  
= 25°C  
30  
65  
50  
µA  
I(off)  
CE  
V = 3.85 V  
I
0.93  
1.35  
V = 5 V  
I
0.35  
1
0.5  
1.45  
50  
I
I
Input current, see Figure 4  
mA  
V = 12 V  
I
V
= 50 V,  
= 50 V  
T
A
100  
100  
25  
Clamp reverse current,  
See Figure 7  
R
R
I
R
µA  
V
100  
25  
C
Input capacitance  
V = 0,  
f = 1 MHz  
15  
15  
pF  
i
I
switching characteristics over recommended operating conditions (unless otherwise noted)  
ULQ2003A-Q1,  
ULQ2004A-Q1  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
1
MAX  
10  
t
t
Propagation delay time, low-to-high level output  
Propagation delay time, high-to-low level output  
See Figure 9  
See Figure 9  
= 50 V,  
µs  
µs  
PLH  
1
10  
PHL  
V
I
O
300 mA,  
S
V
High-level output voltage after switching  
V −500  
S
mV  
OH  
See Figure 10  
3
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ꢀ ꢁꢂ ꢃ ꢄꢄ ꢅ ꢆ ꢇꢂꢈꢉ ꢀꢁ ꢂꢃ ꢄ ꢄ ꢊ ꢆꢇꢂ ꢈ ꢉ  
ꢋ ꢌꢍ ꢋꢇꢎ ꢏꢁꢐꢆ ꢍꢑ ꢋꢌ ꢍ ꢋꢇꢒ ꢀꢓꢓ ꢑꢔꢐ ꢕꢆ ꢓꢁ ꢌꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔ ꢖꢌ ꢖꢐꢏꢓ ꢆꢓ ꢓꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
PARAMETER MEASUREMENT INFORMATION  
Open  
Open  
V
CE  
V
CE  
I
I
CEX  
CEX  
Open  
V
I
Figure 1. I  
Test Circuit  
Figure 2. I  
Test Circuit  
CEX  
CEX  
Open  
V
CE  
Open  
I
I
C
I(off)  
I
I(on)  
V
I
Open  
Figure 3. I  
Test Circuit  
Figure 4. I Test Circuit  
I
I(off)  
Open  
Open  
I
C
h
FE  
=
I
I
V
CE  
I
I
I
C
V
I(on)  
V
CE  
I
C
NOTE: I is fixed for measuring V  
, variable for  
I
CE(sat)  
measuring h  
.
FE  
Figure 5. h , V  
Test Circuit  
Figure 6. V  
Test Circuit  
I(on)  
FE CE(sat)  
V
R
I
R
V
F
I
F
Open  
Open  
Figure 7. I Test Circuit  
Figure 8. V Test Circuit  
F
R
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢅꢆ ꢇꢂꢈ ꢉ ꢀꢁ ꢂꢃ ꢄꢄ ꢊꢆ ꢇꢂ ꢈ ꢉ  
ꢋꢌ ꢍꢋ ꢇꢎꢏ ꢁꢐꢆꢍ ꢑ ꢋꢌ ꢍꢋ ꢇꢒꢀꢓꢓꢑ ꢔꢐ ꢕꢆꢓ ꢁꢌ ꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔꢖ ꢌꢖꢐꢏꢓ ꢆ ꢓꢓ ꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
PARAMETER MEASUREMENT INFORMATION  
Input  
50%  
50%  
t
t
PHL  
PLH  
50%  
50%  
Output  
VOLTAGE WAVEFORMS  
Figure 9. Propagation Delay-Time Waveforms  
V
S
2 mH  
Open  
1N3064  
200 Ω  
Pulse  
Generator  
(see Note A)  
Output  
= 15 pF  
ULQ2003A-Q1  
ULQ2004A-Q1  
C
L
(see Note B)  
TEST CIRCUIT  
5 ns  
90%  
10 ns  
V
IH  
90%  
1.5 V  
(see Note C)  
Input  
1.5 V  
10%  
10%  
0 V  
40 µs  
V
V
OH  
Output  
OL  
VOLTAGE WAVEFORMS  
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, Z = 50 .  
O
B.  
C includes probe and jig capacitance.  
L
C. For testing the ULQ2003A-Q1, V = 3 V; for the ULQ2004A-Q1, V = 8 V.  
IH IH  
Figure 10. Latch-Up Test Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄꢄ ꢅ ꢆ ꢇꢂꢈꢉ ꢀꢁ ꢂꢃ ꢄ ꢄ ꢊ ꢆꢇꢂ ꢈ ꢉ  
ꢋ ꢌꢍ ꢋꢇꢎ ꢏꢁꢐꢆ ꢍꢑ ꢋꢌ ꢍ ꢋꢇꢒ ꢀꢓꢓ ꢑꢔꢐ ꢕꢆ ꢓꢁ ꢌꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔ ꢖꢌ ꢖꢐꢏꢓ ꢆꢓ ꢓꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
TYPICAL CHARACTERISTICS  
COLLECTOR-EMITTER SATURATION VOLTAGE  
COLLECTOR-EMITTER SATURATION VOLTAGE  
vs  
vs  
TOTAL COLLECTOR CURRENT  
(TWO DARLINGTONS IN PARALLEL)  
COLLECTOR CURRENT  
(ONE DARLINGTON)  
2.5  
2
2.5  
T
A
= 25°C  
T
A
= 25°C  
I = 250 µA  
I
2
1.5  
1
I = 350 µA  
I = 250 µA  
I
I
I = 350 µA  
I
I = 500 µA  
1.5  
1
I
I = 500 µA  
I
0.5  
0
0.5  
0
0
100 200 300 400 500 600 700 800  
0
100 200 300 400 500 600 700 800  
I
− Total Collector Current − mA  
I
C
− Collector Current − mA  
C(tot)  
Figure 12  
Figure 11  
COLLECTOR CURRENT  
vs  
INPUT CURRENT  
500  
R
T
A
= 10 Ω  
= 25°C  
L
450  
400  
350  
300  
250  
200  
150  
100  
50  
V
S
= 10 V  
V
S
= 8 V  
0
0
25  
50  
75  
100 125 150 175 200  
I − Input Current − µA  
I
Figure 13  
6
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ꢀꢁ ꢂ ꢃ ꢄ ꢄ ꢅꢆ ꢇꢂꢈ ꢉ ꢀꢁ ꢂꢃ ꢄꢄ ꢊꢆ ꢇꢂ ꢈ ꢉ  
ꢋꢌ ꢍꢋ ꢇꢎꢏ ꢁꢐꢆꢍ ꢑ ꢋꢌ ꢍꢋ ꢇꢒꢀꢓꢓꢑ ꢔꢐ ꢕꢆꢓ ꢁꢌ ꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔꢖ ꢌꢖꢐꢏꢓ ꢆ ꢓꢓ ꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
THERMAL INFORMATION  
MAXIMUM COLLECTOR CURRENT  
vs  
DUTY CYCLE  
600  
500  
400  
300  
200  
100  
0
N = 1  
N = 4  
N = 3  
N = 2  
N = 6  
N = 7  
N = 5  
T
A
= 70°C  
N = Number of Outputs  
Conducting Simultaneously  
0
10 20 30 40 50 60 70 80 90 100  
Duty Cycle − %  
Figure 14  
7
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ꢋ ꢌꢍ ꢋꢇꢎ ꢏꢁꢐꢆ ꢍꢑ ꢋꢌ ꢍ ꢋꢇꢒ ꢀꢓꢓ ꢑꢔꢐ ꢕꢆ ꢓꢁ ꢌꢔꢍ ꢐꢏ ꢔ  
ꢐ ꢓꢆꢔ ꢖꢌ ꢖꢐꢏꢓ ꢆꢓ ꢓꢆꢗ  
SGLS148A − DECEMBER 2002 − REVISED OCTOBER 2004  
APPLICATION INFORMATION  
ULQ2004A-Q1  
ULQ2003A-Q1  
V
DD  
V
V
CC  
V
1
2
16  
15  
14  
1
2
16  
15  
14  
3
4
3
4
13  
12  
11  
10  
9
13  
12  
11  
10  
9
5
5
6
6
7
8
7
8
CMOS  
Output  
Lamp  
Test  
TTL  
Output  
Figure 15. TTL to Load  
Figure 16. Buffer for Higher Current Loads  
ULQ2003A-Q1  
V
V
CC  
1
16  
15  
14  
2
3
4
R
P
13  
12  
11  
10  
9
5
6
7
8
TTL  
Output  
Figure 17. Use of Pullup Resistors  
to Increase Drive Current  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Feb-2005  
PACKAGING INFORMATION  
Orderable Device  
ULQ2003ATDQ1  
ULQ2003ATDRQ1  
ULQ2004ATDRQ1  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOIC  
D
16  
16  
16  
40  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
SOIC  
SOIC  
D
D
2500  
2500  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional  
product content details.  
None: Not yet available Lead (Pb-Free).  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,  
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder  
temperature.  
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