V62/06609-01XE [TI]
16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS; 具有三态输出的16位总线收发器
| 型号： | V62/06609-01XE |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS |
| 文件： | 总11页 (文件大小：548K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
FEATURES
•
Controlled Baseline
DL PACKAGE
(TOP VIEW)
– One Assembly/Test Site, One Fabrication
Site
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
•
Enhanced Diminishing Manufacturing
Sources (DMS) Support
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
3
•
•
•
Enhanced Product-Change Notification
4
(1)
Qualification Pedigree
5
Member of the Texas Instruments
Widebus™ Family
6
7
V
CC
V
CC
•
•
•
•
•
State-of-the-Art EPIC-IIB™ BiCMOS Design
Significantly Reduces Power Dissipation
8
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
9
Typical VOLP (Output Ground Bounce) <1 V at
VCC = 5 V, TA = 25°C
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
High-Impedance State During Power Up and
Power Down
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
V
CC
V
CC
•
•
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
2B5
2B6
GND
2B7
2B8
2DIR
2A5
2A6
GND
2A7
2A8
2OE
Latch-Up Performance Exceeds 500 mA Per
JESD 70
•
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
•
Shrink Small-Outline (DL) Package
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
The SN74ABT16245A-EP is a 16-bit noninverting 3-state transceiver designed for synchronous two-way
communication between data buses. The control-function implementation minimizes external timing
requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impendance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT16245A-EP is characterized for operation from –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC-IIB are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
CABT16245AMDLREP
TOP-SIDE MARKING
–55°C to 125°C
SSOP – DL
Reel of 1000
ABT16245AMEP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH 8-BIT SECTION)
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
LOGIC SYMBOL(1)
48
1
G3
1OE
1DIR
3 EN1 [BA]
3 EN2 [AB]
25
24
G6
2OE
2DIR
6 EN4 [BA]
6 EN5 [AB]
47
2
1
1A1
1B1
2
46
44
43
41
40
38
37
36
3
5
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
6
8
9
11
12
13
4
5
35
33
32
30
29
27
26
14
16
17
19
20
22
23
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2B2
2B3
2B4
2B5
2B6
2B7
2B8
(1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
LOGIC DIAGRAM (POSITIVE LOGIC)
24
1
2DIR
1DIR
48
25
13
1OE
1B1
2OE
2B1
36
47
1A1
2A1
2
To Seven Other Channels
To Seven Other Channels
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC
VI
Supply voltage range
–0.5
–0.5
–0.5
7
7
V
V
V
Input voltage range (except I/O ports)(2)
Voltage range applied to any output in the high or power-off state
Current into any output in the low state
VO
IO
5.5
96 mA
–18 mA
–50 mA
94 °C/W
IIK
Input clamp current
VI < 0
IOK
θJA
Tstg
Output clamp current
Package thermal impedance(3)
VO < 0
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51.
Recommended Operating Conditions(1)
MIN
4.5
2
MAX UNIT
VCC
VIH
Supply voltage
5.5
V
V
High-level input voltage
Low-level input voltage
Input voltage
VIL
0.8
VCC
–24
48
V
VI
0
V
IOH
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
mA
mA
ns/V
µs/V
°C
IOL
∆t/∆v
∆t/∆VCC
TA
Outputs enabled
10
200
–55
Operating free-air temperature
125
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
MIN TYP(1)
PARAMETER
VIK
TEST CONDITIONS
II = –18 mA
MIN
MAX UNIT
MAX
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 5 V,
–1.2
–1.2
V
IOH = –3 mA
IOH = –3 mA
IOH = –24 mA
IOH = –32 mA
IOL = 48 mA
IOL = 64 mA
2.5
3
2.5
3
VOH
V
2
2
VCC = 4.5 V
VCC = 4.5 V
2
0.55
0.55
0.55
VOL
V
Vhys
100
mV
Control
inputs
VCC = 0 to 5.5 V, VI = VCC or GND
±1
±1
II
µA
A or B
port
VCC = 2.1 V to 5.5 V, VI = VCC or GND
±20
±100
IOZPU
IOZPD
VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X
VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X
VCC = 2.7 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V
VCC = 2.7 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V
±50
±50
10(3)
–10(3)
±100
50
µA
µA
µA
µA
µA
µA
mA
(2)
IOZH
IOZL
Ioff
10
(2)
–10
VCC = 0,
VI or VO ≤ 5.5 V
Outputs high
VO = 2.5 V
ICEX
VCC = 5.5 V, VO = 5.5 V
VCC = 5.5 V,
50
–180
2
(4)
IO
–50
–100
–180
2
–50
Outputs high
Outputs low
A or B
port
VCC = 5.5 V, IO = 0,
VI = VCC or GND
ICC
32
32
mA
Outputs disabled
Outputs enabled
2
2
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or GND
2
1.5
Data
inputs
Outputs disabled
0.05
1.5
1
(5)
∆ICC
mA
Control
inputs
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
1.5
Control
inputs
Ci
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
3
6
pF
pF
A or B
port
Co
(1) All typical values are at VCC = 5 V.
(2) The parameters IOZH and IOZL include the input leakage current.
(3) This limit may vary among suppliers.
(4) Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
(5) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
4
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
Switching Characteristics
over recommended operating ranges of supply voltage and operating free-air temperature, CL = 50 pF
(unless otherwise noted) (see Figure 1)
VCC = 5 V,
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
TYP
2.2
PARAMETER
MIN
MAX UNIT
MIN
0.5
0.5
0.8
0.9
1.3
1.4
MAX
3.4
3.8
5.2
6.1
5.8
4.7
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
0.5
0.5
0.8
0.1
1.3
1.4
4
ns
A or B
OE
B or A
B or A
B or A
2.3
4.6
3.6
5.5
ns
3.7
7.3
4.4
6.3
ns
OE
3.3
5.5
5
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
PARAMETER MEASUREMENT INFORMATION
7 V
Open
TEST
/t
S1
S1
500 Ω
From Output
Under Test
t
Open
7 V
PLH PHL
GND
t
/t
PLZ PZL
C = 50 pF
(see Note A)
t
/t
Open
L
PHZ PZH
500 Ω
3 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
3 V
0 V
3 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
PLZ
t
t
t
PHL
PZL
PLH
Output
Waveform 1
S1 at 7 V
3.5 V
V
V
OH
1.5 V
Output
1.5 V
1.5 V
1.5 V
V
V
+ 0.3 V
OL
V
OL
OL
(see Note B)
t
PHL
PLH
t
t
PHZ
PZH
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
V
OH
− 0.3 V
OH
1.5 V
Output
1.5 V
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
SN74ABT16245A-EP
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCBS807B–OCTOBER 2005–REVISED JANUARY 2006
CABT16245A*DL*EP
Estimated Device Life at Elevated Temperatures
Electromigration and Wirebond Voiding Fail Modes
70
60
50
40
30
20
10
Electromigration
Fail Mode
Wirebond Voiding
Fail Mode
0
120
125
130
135
140
145
150
155
Continuous Tj (°C)
7
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
CABT16245AMDLREP
V62/06609-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SSOP
DL
48
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
DL
48
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74ABT16245A-EP :
Catalog: SN74ABT16245A
Military: SN54ABT16245A
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
CABT16245AMDLREP
SSOP
DL
48
1000
330.0
32.4
11.35
16.2
3.1
16.0
32.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SSOP DL 48
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 49.0
CABT16245AMDLREP
1000
Pack Materials-Page 2
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