VCA820IDGSTG4 [TI]
Wideband, 40dB Adjust Range, Linear in dB VARIABLE GAIN AMPLIFIER; 宽带， 40分贝调整范围， dB线性可变增益放大器
| 型号： | VCA820IDGSTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Wideband, 40dB Adjust Range, Linear in dB VARIABLE GAIN AMPLIFIER |
| 文件： | 总37页 (文件大小：1544K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VCA820
www.ti.com............................................................................................................................................ SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009
Wideband, > 40dB Adjust Range, Linear in dB
VARIABLE GAIN AMPLIFIER
Check for Samples: VCA820
1
FEATURES
DESCRIPTION
23
•
150MHz SMALL-SIGNAL BANDWIDTH
137MHz, 5VPP BANDWIDTH (G = +10V/V)
0.1dB GAIN FLATNESS to 28MHz
1700V/μs SLEW RATE
The VCA820 is a dc-coupled, wideband, linear in dB,
continuously variable, voltage-controlled gain
amplifier. It provides differential input to
single-ended conversion with a high-impedance gain
control input used to vary the gain down 40dB from
the nominal maximum gain set by the gain resistor
(RG) and feedback resistor (RF).
•
•
•
•
•
•
a
> 40dB GAIN ADJUST RANGE
HIGH GAIN ACCURACY: 20dB ±0.4dB
HIGH OUTPUT CURRENT: 160mA
The VCA820 internal architecture consists of two
input buffers and an output current feedback amplifier
stage integrated with a multiplier core to provide a
complete variable gain amplifier (VGA) system that
does not require external buffering. The maximum
gain is set externally with two resistors, providing
flexibility in designs. The maximum gain is intended
to be set between +2V/V and +100V/V. Operating
from ±5V supplies, the gain control voltage for the
VCA820 adjusts the gain linearly in dB as the control
voltage varies from 0V to +2V. For example, set for a
maximum gain of +10V/V, the VCA820 provides
20dB, at +2V input, to –20dB at 0V input of gain
control range. The VCA820 offers excellent gain
APPLICATIONS
•
•
•
•
•
AGC RECEIVERS with RSSI
DIFFERENTIAL LINE RECEIVERS
PULSE AMPLITUDE COMPENSATION
VARIABLE ATTENUATORS
DROP-IN UPGRADE TO LMH6502
RF
VIN+
+VIN
RG+
RS
FB
RG
VCA820
RG-
-VIN
VIN-
linearity. For
a
20dB maximum gain, and
a
20W
RS
gain-control input voltage varying between 1V and
2V, the gain does not deviate by more than ±0.4dB
(maximum at +25°C).
Figure 1. Differential Equalizer
VCA820 RELATED PRODUCTS
95
90
85
80
75
70
65
60
55
50
45
40
GAIN
ADJUST
RANGE
(dB)
INPUT
NOISE
(nV/√Hz)
SIGNAL
BANDWIDTH
(MHz)
SINGLES
VCA810
—
DUALS
—
80
45
45
52
48
40
40
40
40
2.4
1.25
1
35
80
VCA2612
VCA2613
VCA2615
VCA2617
—
—
80
—
0.8
4.1
8.2
7.0
8.2
7.0
50
—
50
VCA820
VCA821
VCA822
VCA824
150
420
150
420
Input-Referred
—
100k
1M
10M
100M
—
Frequency (Hz)
—
Figure 2. Common-Mode Rejection Ratio
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
X2Y is a trademark of X2Y Corporation.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2009, Texas Instruments Incorporated
VCA820
SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009............................................................................................................................................ www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
SPECIFIED
PACKAGE
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
PRODUCT PACKAGE-LEAD DESIGNATOR
VCA820ID
VCA820IDR
Rail, 50
VCA820
VCA820
SO-14
D
–40°C to +85°C
–40°C to +85°C
VCA820ID
BOQ
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
VCA820IDGST
VCA820IDGSR
MSOP-10
DGS
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
VCA820
UNIT
Power supply
±6.3
V
Internal power dissipation
See Thermal Characteristics
Input voltage range
±VS
–65 to +125
+150
V
°C
°C
°C
V
Storage temperature range
Junction temperature (TJ)
Junction temperature (TJ), maximum continuous operation
Human body model (HBM)
ESD rating: Charge device model (CDM)
Machine model
+140
2000
500
V
200
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
PIN CONFIGURATIONS
SO-14
(Top View)
MSOP-10
(Top View)
V+
V+
VG
1
2
3
4
5
6
7
14
13
12
11
10
9
GND
VOUT
-VCC
-VIN
-RG
I-
+VCC
VG
1
2
3
4
5
10
9
NC
I-
+VIN
+RG
-RG
-VIN
V-
8
GND
VOUT
VREF
V-
+VIN
+RG
7
6
8
2
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Copyright © 2007–2009, Texas Instruments Incorporated
Product Folder Link(s): VCA820
VCA820
www.ti.com............................................................................................................................................ SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009
ELECTRICAL CHARACTERISTICS: VS = ±5V
At AVMAX = 20dB, RF = 1kΩ, RG = 200Ω, and RL = 100Ω, unless otherwise noted.
VCA820
MIN/MAX OVER
TYP
TEMPERATURE
0°C to
+70°C
–40°C to
+85°C
MIN/
MAX
TEST
(1)
(2)
(3)
(3)
PARAMETER
CONDITIONS
+25°C
+25°C
UNITS
LEVEL
AC PERFORMANCE
Small-signal bandwidth (SO-14 package)
AVMAX = 6dB, VO = 1VPP, VG = +2V
AVMAX = 20dB, VO = 1VPP, VG = +2V
AVMAX = 40dB, VO = 1VPP, VG = +2V
AVMAX = 20dB, VO = 5VPP, VG = +2V
VG = 1VDC + 10mVPP
168
150
118
137
200
28
MHz
MHz
MHz
MHz
MHz
MHz
V/μs
ns
typ
typ
C
C
C
C
B
C
B
B
C
typ
Large-signal bandwidth
Gain control bandwidth
Bandwidth for 0.1dB flatness
Slew rate
typ
170
170
165
min
typ
AVMAX = 20dB, VO = 1VPP, VG = +2V
AVMAX = 20dB, VO = 5V step, VG = +2V
AVMAX = 20dB, VO = 5V step, VG = +2V
AVMAX = 20dB, VO = 5V step, VG = +2V
1700
2.5
1500
3.1
1500
3.2
1450
3.2
min
max
typ
Rise-and-fall time
Settling time to 0.01%
Harmonic distortion
11
ns
2nd-harmonic
VO = 2VPP, f = 20MHz
VO = 2VPP, f = 20MHz
f > 100kHz
–62
–68
8.2
2.6
–60
–66
–60
–66
–60
–66
dBc
dBc
min
min
typ
B
B
C
C
3rd-harmonic
Input voltage noise
nV/√Hz
pA/√Hz
Input current noise
f > 100kHz
typ
GAIN CONTROL
Absolute gain error
AVMAX = 20dB, VG = 2V
±0.1
0.85
0.09
±0.3
–26
10
±0.4
±0.5
±0.6
dB
V
max
typ
A
C
C
A
A
A
B
C
VCTRL0
VSLOPE
V
typ
Absolute gain error
AVMAX = 20dB, VG = 1V, (G = 18.06dB)
Relative to maximum gain
±0.4
–24
16
±0.5
–24
16.6
±12
±0.6
–23
16.7
±12
dB
max
max
max
max
typ
Gain at VG = 0.2V
dB
Gain control bias current
Average gain control bias current drift
Gain control input impedance
DC PERFORMANCE
Input offset voltage
μA
nA/°C
kΩ || pF
70 || 1
±4
AVMAX = 20dB, VCM = 0V, VG = 1V
AVMAX = 20dB, VCM = 0V, VG = 1V
AVMAX = 20dB, VCM = 0V, VG = 1V
AVMAX = 20dB, VCM = 0V, VG = 1V
AVMAX = 20dB, VCM = 0V, VG = 1V
AVMAX = 20dB, VCM = 0V, VG = 1V
±17
25
±17.8
30
±19
30
mV
μV/°C
μA
max
max
max
max
max
max
max
A
B
A
B
A
B
B
Average input offset voltage drift
Input bias current
19
29
31
Average input bias current drift
Input offset current
90
90
nA/°C
μA
±0.5
±2.6
±2.5
±3.2
±16
±2.55
±3.5
±16
±2.5
Average input offset current drift
Maximum current through gain resistance
INPUT
nA/°C
mA
±2.55
Most positive common-mode input voltage
Most negative common-mode input voltage
Common-mode rejection ratio
Input impedance
RL = 100Ω
RL = 100Ω
VCM = ±0.5V
+1.6
–2.1
80
+1.6
–2.1
65
+1.6
–2.1
60
+1.6
–2.1
60
V
V
min
max
min
A
A
A
dB
Differential
0.5 || 1
0.5 || 2
MΩ || pF
MΩ || pF
typ
typ
C
C
Common-mode
(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2) Junction temperature = ambient for +25°C tested specifications.
(3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over
temperature specifications.
Copyright © 2007–2009, Texas Instruments Incorporated
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SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009............................................................................................................................................ www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±5V (continued)
At AVMAX = 20dB, RF = 1kΩ, RG = 200Ω, and RL = 100Ω, unless otherwise noted.
VCA820
MIN/MAX OVER
TYP
TEMPERATURE
0°C to
+70°C
–40°C to
+85°C
MIN/
MAX
TEST
(1)
(2)
(3)
(3)
PARAMETER
OUTPUT
CONDITIONS
+25°C
+25°C
UNITS
LEVEL
Output voltage swing
RL = 1kΩ
RL = 100Ω
±4.0
±3.9
±160
0.01
±3.8
±3.7
±140
±3.75
±3.6
±3.7
±3.5
±130
V
V
min
min
min
typ
A
A
A
C
Output current
VO = 0V, RL = 5Ω
±130
mA
Ω
Output impedance
AVMAX = 20dB, f > 100kHz, VG = +2V
POWER SUPPLY
Specified operating voltage
Minimum operating voltage
Maximum operating voltage
Maximum quiescent current
Minimum quiescent current
Power-supply rejection ratio (–PSRR)
THERMAL CHARACTERISTICS
Specified operating range, D package
Thermal resistance θ JA
±5
V
V
typ
typ
C
C
A
A
A
A
±3.5
±6
35
±6
35.5
32
±6
36
V
max
max
max
min
VG = 1V
VG = 1V
34
34
mA
mA
dB
32.5
–61
31.5
–58
–68
–59
–40 to +85
°C
typ
C
Junction-to-ambient
DGS MSOP-10
130
80
°C/W
°C/W
typ
typ
C
C
D
SO-14
4
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Product Folder Link(s): VCA820
VCA820
www.ti.com............................................................................................................................................ SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS: VS = ±5V, DC Parameters
At TA = +25°C, RL = 100Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted.
MAXIMUM DIFFERENTIAL INPUT VOLTAGE
vs GAIN RESISTOR
MAXIMUM GAIN ADJUST RANGE
vs FEEDBACK RESISTOR
10
40
35
30
25
20
15
10
5
IRG MAX = 2.6mA
IRG = 2.6mA
VIN MAX(VPP) = 2 ´ RG ´ IRG MAX (AP)
AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP)
VO = 1VPP
VO = 2VPP
1
VO = 4VPP
VO = 3VPP
0.1
0
10
100
1k
100
1k
10k
Gain Resistor (W)
Feedback Resistor (W)
Figure 3.
Figure 4.
MAXIMUM GAIN ADJUST RANGE
GAIN ERROR BAND
vs PEAK-TO-PEAK OUTPUT VOLTAGE
vs GAIN CONTROL VOLTAGE
12
10
8
60
50
40
30
20
10
0
Absolute
Error
IRG = 2.6mA
AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP)
RF = 3kW
Absolute
Error
RF = 4kW
RF = 5kW
6
Relative Error to
Maximum Gain
RF = 500W
4
RF = 1kW
2
RF = 1.5kW
RF = 2kW
0
0.1
1
10
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Control Voltage (V)
Output Voltage (VPP
)
Figure 5.
Figure 6.
NOMINAL GAIN
vs CALCULATED GAIN
RECOMMENDED RF and RG
vs AVMAX
40
20
1500
1400
1300
1200
1100
1000
900
0
-20
-40
-60
-80
-100
Equation
RF
1
VG0 - VG
A(V/V) = K ´
´
RG
(
)
VSLOPE
1 + e
Data
NOTE: -3dB bandwidth will vary with the package.
VCTRL0 = 0.85V
VSLOPE = 90mV
800
See the Application section for more details.
700
1
10
100
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Control Voltage (V)
AVMAX (V/V)
Figure 7.
Figure 8.
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VCA820
SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009............................................................................................................................................ www.ti.com
TYPICAL CHARACTERISTICS: VS = ±5V, DC and Power-Supply Parameters
At TA = +25°C, RL = 100Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted.
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = 6dB)
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = 20dB)
36
36
35
34
33
32
31
31
29
35
34
33
32
31
31
29
-IQ
-IQ
+IQ
+IQ
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
Figure 9.
Figure 10.
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = 40dB)
TYPICAL DC DRIFT
vs TEMPERATURE
36
0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
25
VG = +1V
35
34
33
32
31
31
29
20
-IQ
Input Bias Current
15
10
Input Offset Voltage
+IQ
5
0
Input Offset Current
-5
-50
-25
0
25
50
75
100
125
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
Temperature (°C)
Figure 11.
Figure 12.
6
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Product Folder Link(s): VCA820
VCA820
www.ti.com............................................................................................................................................ SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
3
0
VO = 1VPP
-3
-3
VG = +2V
-6
-6
VO = 2VPP
VO = 5VPP
-9
-9
-12
-15
-18
-12
-15
-18
VO = 7VPP
AVMAX = 6dB
VIN = 1VPP
RL = 100W
VG = +1V
AVMAX = 6dB
1M
1M
10M
100M
Frequency (Hz)
1G
10M
100M
Frequency (Hz)
1G
Figure 13.
Figure 14.
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
300
3
200
100
2
1
0
0
-100
-200
-300
-1
-2
-3
VIN = 250mVPP
f = 20MHz
VIN = 2.5VPP
f = 20MHz
Time (10ns/div)
Time (10ns/div)
Figure 15.
Figure 16.
VIDEO DIFFERENTIAL GAIN/DIFFERENTIAL PHASE
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
0
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
0
0
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
-0.50
0
-dP, VG = +1V
AVMAX = 6dB
VG = +2V
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
-0.50
-0.02
-0.04
-0.06
-0.08
-0.10
-0.12
-dP, VG = +2V
-dG, VG = +2V
-dG, VG = +1V
0
10
20
30
40
50
1
2
3
4
Frequency (MHz)
Video Loads
Figure 17.
Figure 18.
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SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009............................................................................................................................................ www.ti.com
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB (continued)
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs LOAD RESISTANCE
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-60
VG = +2V
2nd-Harmonic
AVMAX = 6dB
-65
-70
-75
VO = 2VPP
2nd-Harmonic
RL = 100W
3rd-Harmonic
3rd-Harmonic
VG = +2V
-80 AVMAX = 6dB
VO = 2VPP
f = 20MHz
-85
0.1
1
10
100
100
1k
Frequency (MHz)
Resistance (W)
Figure 19.
Figure 20.
HARMONIC DISTORTION vs OUTPUT VOLTAGE
20MHz HARMONIC DISTORTION vs GAIN CONTROL VOLTAGE
-50
-40
VO = 2VPP
VG = +2V
AVMAX = 6dB
RL = 100W
f = 20MHz
AVMAX = 6dB
-55
-60
-65
-70
-75
-80
-45
RL = 100W
f = 20MHz
-50
Maximum Current Through RG Limited
-55
3rd-Harmonic
2nd-Harmonic
-60
2nd-Harmonic
-65
3rd-Harmonic
-70
0.1
1
10
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Output Voltage Swing (VPP
)
Gain Control Voltage (V)
Figure 21.
Figure 22.
2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs GAIN CONTROL VOLTAGE
2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
45
40
Constant Output Voltage
38
40
35
30
25
36
34
Constant Input Voltage
32
30
28
26
24
f = 20MHz
22
At 50W Matched Load
At 50W Matched Load
20
20
0
10
20
30
40
50
60
70
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Frequency (V)
Gain Control Voltage (V)
Figure 23.
Figure 24.
8
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Product Folder Link(s): VCA820
VCA820
www.ti.com............................................................................................................................................ SBOS395C –OCTOBER 2007–REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB (continued)
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
3
0
-3
-6
-9
-12
VG = 1VDC + 10mVPP
1M 10M
-0.2
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
100M
Frequency (Hz)
1G
Figure 25.
Figure 26.
GAIN CONTROL PULSE RESPONSE
FULLY-ATTENUATED RESPONSE
2.5
2.0
1.5
1.0
0.5
0
10
0
VG = 2V
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
2.5
-0.5
VG = 0V
2.0
1.5
1.0
0.5
0
VO = 2VPP
1M
-0.5
Time (10ns/div)
10M
100M
Frequency (Hz)
1G
Figure 27.
Figure 28.
GROUP DELAY vs FREQUENCY
GROUP DELAY vs GAIN CONTROL VOLTAGE
12
10
8
2.5
2.0
1.5
1.0
0.5
0
1MHz
10MHz
6
4
2
VG = +2V
VO = 1VPP
20MHz
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
0
20
40
60
80
100
Frequency (MHz)
Figure 29.
Figure 30.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 6dB (continued)
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
RECOMMENDED RS vs CAPACITIVE LOAD
FREQUENCY RESPONSE vs CAPACITIVE LOAD
100
10
0
9
CL = 22pF
VO = 0.5VPP
CL = 10pF
6
3
CL = 47pF
0
CL = 100pF
-3
-6
-9
-12
RF
VIN
+VIN
RS
VOUT
1.33kW
VCA820
(1)
1kW
20W
-VIN
0.1dB Flatness Targeted
NOTE: (1) 1kW is optional.
1
10
100
1k
1M
10M
100M
1G
Capacitive Load (pF)
Frequency (Hz)
Figure 31.
Figure 32.
OUTPUT VOLTAGE NOISE DENSITY
INPUT CURRENT NOISE DENSITY
1000
100
10
10
VG = +2V
VG = +1V
VG = 0V
1
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
Figure 33.
Figure 34.
10
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
3
0
VG = +2V
-3
-3
VO = 2VPP
-6
-6
-9
-9
VO = 5VPP
VO = 7VPP
-12
-15
-18
-12
-15
-18
AVMAX = 20dB
VIN = 0.2VPP
RL = 100W
VG = +1V
0
50
100
150
200
250
300
350
400
1M
10M
100M
Frequency (Hz)
1G
Frequency (MHz)
Figure 35.
Figure 36.
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
300
3
2
VIN = 0.5VPP
f = 20MHz
VIN = 50mVPP
f = 20MHz
200
100
1
0
0
-100
-200
-300
-1
-2
-3
Time (10ns/div)
Time (10ns/div)
Figure 37.
Figure 38.
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
OUTPUT VOLTAGE NOISE DENSITY
0.05
0.08
0.06
0.04
0.02
0
1000
100
10
0
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
VG = +2V
-0.2
-0.4
-0.6
-0.8
VG = +1V
VG = 0V
VG = +2V
AVMAX = 20dB
0
10
20
30
40
50
100
1k
10k
100k
1M
10M
Frequency (MHz)
Frequency (Hz)
Figure 39.
Figure 40.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB (continued)
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs LOAD RESISTANCE
-45
-60
VG = +2V
2nd-Harmonic
3rd-Harmonic
-50 AVMAX = 20dB
-65
-70
-75
-80
-85
-90
VO = 2VPP
-55
RL = 100W
-60
-65
-70
-75
-80
2nd-Harmonic
3rd-Harmonic
VG = +2V
AVMAX = 20dB
VO = 2VPP
f = 20MHz
-85
0.1
1
10
100
100
1k
Frequency (MHz)
Resistance (W)
Figure 41.
Figure 42.
20MHz HARMONIC DISTORTION
vs GAIN CONTROL VOLTAGE
HARMONIC DISTORTION vs OUTPUT VOLTAGE
-55
-40
-45
-50
-55
-60
-65
-70
VO = 2VPP
AVMAX = 20dB
RL = 100W
f = 20MHz
-60
-65
-70
-75
-80
2nd-Harmonic
Maximum Current Through RG Limited
3rd-Harmonic
VG = +2V
2nd-Harmonic
AVMAX = 20dB
RL = 100W
f = 20MHz
3rd-Harmonic
1.0
0.1
1
10
0.8
1.2
1.4
1.6
1.8
2.0
Output Voltage Swing (VPP
)
Gain Control Voltage (V)
Figure 43.
Figure 44.
2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT (GMAX
+10V/V)
=
2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs GAIN CONTROL VOLTAGE (fIN = 20MHz)
45
40
35
30
25
40
Constant
Output Voltage
38
36
34
32
30
Constant Input Voltage
28
26
24
f = 20MHz
22
At 50W Matched Load
At 50W Matched Load
20
20
5
10 15 20 25 30 35 40 45 50 55 60 65 70
Frequency (MHz)
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Gain Control Voltage (V)
Figure 45.
Figure 46.
12
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB (continued)
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY
11
10
9
3
0
8
7
-3
-6
-9
-12
6
5
4
3
2
1
0
VG = 1VDC + 10mVPP
1M 10M
-1
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
100M
Frequency (Hz)
1G
Figure 47.
Figure 48.
GAIN CONTROL PULSE RESPONSE
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
2.5
2.0
1.5
1.0
0.5
0
5
4
100W
3
Load Line
1W Internal
2
Power Dissipation
25W
1
Load Line
2.5
2.0
1.5
1.0
0.5
0
-0.5
0
50W
Load Line
-1
1W Internal
Power Dissipation
-2
-3
-4
-5
-0.5
-300
-200
-100
0
100
200
300
Time (10ns/div)
Figure 49.
Output Current (mA)
Figure 50.
FULLY-ATTENUATED RESPONSE
IRG LIMITED OVERDRIVE RECOVERY
30
2.0
8
AVMAX = 20dB
VG = -0.3V
Input Voltage
Left Scale
20
10
1.5
1.0
6
VG = +2V
4
0
VO = 2VPP
0.5
2
-10
-20
-30
-40
-50
-60
-70
0
0
-2
-4
-6
-8
-0.5
-1.0
-1.5
-2.0
Output Voltage
Right Scale
VG = 0V
1M
10M
100M
Frequency (Hz)
1G
Time (40ns/div)
Figure 51.
Figure 52.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 20dB (continued)
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +2V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
OUTPUT LIMITED OVERDRIVE RECOVERY
GROUP DELAY vs GAIN CONTROL VOLTAGE
2.0
1.5
8
12
10
8
AVMAX = 20dB
Output Voltage
VG = +1V
1MHz
6
Right Scale
1.0
4
0.5
2
10MHz
0
0
6
Input Voltage
Left Scale
-0.5
-1.0
-1.5
-2.0
-2
-4
-6
-8
4
2
20MHz
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
Time (40ns/div)
Figure 53.
Figure 54.
GROUP DELAY vs FREQUENCY
3.0
2.5
2.0
1.5
1.0
0.5
0
VG = +2V
VO = 1VPP
0
20
40
60
80
100
Frequency (MHz)
Figure 55.
14
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 40dB
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
3
0
VG = +2V
VO = 2VPP
-3
-3
VG = +1V
-6
-6
VO = 5VPP
VO = 7VPP
-9
-9
-12
-15
-18
-12
-15
-18
VIN = 20mVPP
AVMAX = 40dB
RL = 100W
1M
10M
Frequency (Hz)
100M
500M
0
50
100
150
200
250
300
Frequency (MHz)
Figure 56.
Figure 57.
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
300
3
VIN = 50mVPP
f = 20MHz
VIN = 5mVPP
f = 20MHz
200
100
2
1
0
0
-100
-200
-300
-1
-2
-3
Time (10ns/div)
Time (10ns/div)
Figure 58.
Figure 59.
GAIN FLATNESS
OUTPUT VOLTAGE NOISE DENSITY
0.10
0.1
1000
100
10
VG = +1V
AVMAX = 40dB
VG = +2V
0.05
0
VG = +1V
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
0
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
VG = 0V
0
10
20
30
40
50
100
1k
10k
100k
1M
10M
Frequency (MHz)
Frequency (Hz)
Figure 60.
Figure 61.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 40dB (continued)
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs LOAD RESISTANCE
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-40
VG = +2V
2nd-Harmonic
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
AVMAX = 40dB
VO = 2VPP
RL = 100W
3rd-Harmonic
2nd-Harmonic
3rd-Harmonic
VG = +2V
AVMAX = 40dB
VO = 2VPP
f = 20MHz
0.1
1
10
100
100
1k
Frequency (MHz)
Resistance (W)
Figure 62.
Figure 63.
HARMONIC DISTORTION vs OUTPUT VOLTAGE
20MHz HARMONIC DISTORTION vs GAIN CONTROL VOLTAGE
-40
-35
2nd-Harmonic
2nd-Harmonic
-40
-45
-50
-55
-60
-65
-45
-50
3rd-Harmonic
Maximum Current Through RG Limited
-55
VO = 2VPP
VG = +2V
VMAX = 40dB
A
AVMAX = 40dB
-60
RL = 100W
RL = 100W
3rd-Harmonic
f = 20MHz
f = 20MHz
-65
0.1
1
10
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Output Voltage Swing (VPP
)
Gain Control Voltage (V)
Figure 64.
Figure 65.
2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs GAIN CONTROL VOLTAGE (fIN = 20MHz)
2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
33
35
31
29
27
25
23
21
19
30
Constant Input Voltage
25
20
Constant Output Voltage
15
10
5
0
f = 20MHz
At 50W Matched Load
17
At 50W Matched Load
15
5
10 15 20 25 30 35 40 45 50 55 60 65 70
Frequency (MHz)
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Gain Control Voltage (V)
Figure 66.
Figure 67.
16
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 40dB (continued)
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY
110
100
90
80
70
60
50
40
30
20
10
0
3
0
-3
-6
-9
-12
VIN = 10mVDC
VG = 1VDC + 10mVPP
-10
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Gain Control Voltage (V)
1M
10M
100M
Frequency (Hz)
1G
Figure 68.
Figure 69.
GAIN CONTROL PULSE RESPONSE
FULLY-ATTENUATED RESPONSE
2.5
2.0
1.5
1.0
0.5
0
50
40
30
VG = +2V
20
VO = 2VPP
10
2.5
2.0
1.5
1.0
0.5
0
-0.5
0
-10
-20
-30
-40
-50
Input-Referred
VG = 0V
-0.5
Time (10ns/div)
1M
10M
100M
Frequency (Hz)
1G
Figure 70.
Figure 71.
INPUT LIMITED OVERDRIVE RECOVERY
OUTPUT LIMITED OVERDRIVE RECOVERY
0.20
8
0.3
6
Input Voltage
Left Scale
AVMAX = 40dB
Output Voltage
VG = +2V
Output Voltage
Right Scale
0.15
0.10
0.05
0
6
Right Scale
0.2
0.1
4
4
2
2
0
0
0
-0.05
-0.10
-0.15
-0.20
-8
-6
-4
-2
Input Voltage
Left Scale
-0.1
-0.2
-0.3
-2
-4
-6
AVMAX = 40dB
VG = 0.85V
Time (40ns/div)
Time (40ns/div)
Figure 72.
Figure 73.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = 40dB (continued)
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +2V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GROUP DELAY vs GAIN CONTROL VOLTAGE
GROUP DELAY vs FREQUENCY
14
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
12
10
8
1MHz
10MHz
6
4
VG = +2V
VO = 1VPP
2
20MHz
0
0
0.2
0.4
0.6
0.8
1.0
0
20
40
60
80
100
Gain Control Voltage (V)
Frequency (MHz)
Figure 74.
Figure 75.
18
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APPLICATION INFORMATION
For test purposes, the input impedance is set to 50Ω
with a resistor to ground and the output impedance is
set to 50Ω with a series output resistor. Voltage
swings reported in the Electrical Characteristics table
are taken directly at the input and output pins, while
output power (dBm) is at the matched 50Ω load. For
the circuit in Figure 76, the total effective load is
100Ω 1kΩ. Note that for the SO-14 package, there
is a voltage reference pin, VREF (pin 9). For the
SO-14 package, this pin must be connected to
ground through a 20Ω resistor in order to avoid
possible oscillations of the output stage. In the
MSOP-10 package, this pin is internally connected
and does not require such precaution. An X2Y™
capacitor has been used for power-supply bypassing.
The combination of low inductance, high resonance
frequency, and integration of three capacitors in one
package (two capacitors to ground and one across
the supplies) of this capacitor enables to achieve the
low second-harmonic distortion reported in the
Electrical Characteristics table. More information on
how the VCA820 operates can be found in the
Operating Suggestions section.
WIDEBAND VARIABLE GAIN AMPLIFIER
OPERATION
The VCA820 provides an exceptional combination of
high output power capability with a wideband, greater
than 40dB gain adjust range, linear in dB variable
gain amplifier. The VCA820 input stage places the
transconductance element between two input buffers,
using the output currents as the forward signal. As
the differential input voltage rises, a signal current is
generated through the gain element. This current is
then mirrored and gained by a factor of two before
reaching the multiplier. The other input of the
multiplier is the voltage gain control pin, VG.
Depending on the voltage present on VG, up to two
times the gain current is provided to the
transimpedance output stage. The transimpedance
output stage is a current-feedback amplifier providing
high output current capability and high slew rate,
1700V/μs. This exceptional full-power performance
comes at the price of a relatively high quiescent
current (34mA), but a low input voltage noise for this
type of architecture (8.2nV/√Hz).
Figure 76 shows the dc-coupled, gain of 20dB, dual
power-supply circuit used as the basis of the ±5V
Electrical Characteristics and Typical Characteristics.
0.1mF
X2Y@ Cap
+5V
-5V
+
2.2mF
2.2mF
+
VG
+VIN
VIN
20W
x1
FB
IRG
RG+
RF
RG
1kW
x2
200W
RG-
VOUT
VOUT
x1
VCA820
-VIN
VREF
20W
20W
Figure 76. DC-Coupled, AVMAX = 20dB, Bipolar Supply Specification and Test Circuit
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DIFFERENCE AMPLIFIER
DIFFERENTIAL EQUALIZER
Because both inputs of the VCA820 are
If the application requires frequency shaping (the
transition from one gain to another), the VCA820 can
be used advantageously because its architecture
allows the application to isolate the input from the
gain setting elements. Figure 79 shows an
implementation of such a configuration. The transfer
function is shown in Equation 1.
high-impedance,
a
difference amplifier can be
implemented without any major problem. This
implementation is shown in Figure 77. This circuit
provides excellent common-mode rejection ratio
(CMRR) as long as the input is within the CMRR
range of –2.1V to +1.6V. Note that this circuit does
not make use of the gain control pin, VG. Also, it is
recommended to choose RS such that the pole
formed by RS and the parasitic input capacitance
does not limit the bandwidth of the circuit. The
common-mode rejection ratio for this circuit
implemented in a gain of 20dB for VG = +2V is shown
in Figure 78. Note that because the gain control
voltage is fixed and is normally set to +2V, the
feedback element can be reduced in order to
increase the bandwidth. When reducing the feedback
element make sure that the VCA820 is not limited by
common-mode input voltage, the current flowing
through RG, or any other limitation described in this
data sheet.
RF
1 + sRGC1
´
G = 2 ´
RG
1 + sR1C1
(1)
RF
VIN1
+VIN
RG+
RS
FB
VCA820
R1
RG
C1
RG-
VIN2
-VIN
20W
RS
RF
VIN+
+VIN
RG+
RS
FB
Figure 79. Differential Equalizer
RG
VCA820
RG-
-VIN
This transfer function has one pole, P1 (located at
RGC1), and one zero, Z1 (located at R1C1). When
equalizing an RC load, RL and CL, compensate the
pole added by the load located at RLCL with the zero
Z1. Knowing RL, CL, and RG allows the user to select
C1 as a first step and then calculate R1. Using
RL = 75Ω, CL = 100pF and wanting the VCA820 to
VIN-
20W
RS
Figure 77. Difference Amplifier
operate at a gain of +2V/V, which gives RF = RG
=
1.33kΩ, allows the user to select C1 = 5pF to ensure
a positive value for the resistor R1. With all these
values known, R1 can be calculated to be 170Ω. The
frequency response for both the initial, unequalized
frequency response and the resulting equalized
frequency response are illustrated in Figure 80.
95
90
85
80
75
70
65
60
55
50
45
40
Input-Referred
100k
1M
10M
100M
Frequency (Hz)
Figure 78. Common-Mode Rejection Ratio
20
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9
6
2.0
Cable Attenuations
Equalized Frequency
Response
1.5
1.0
0.5
0
3
0
-3
VCA820 with
Equalization
-6
Initial Frequency Response
of VCA820 with RC Load
-9
-12
-15
-18
-21
-24
-0.5
-1.0
1
10
100
1M
10M
100M
Frequency (Hz)
1G
Frequency (MHz)
Figure 81. Cable Attenuation versus Equalizer
Gain
Figure 80. Differential Equalization of an RC Load
DIFFERENTIAL CABLE EQUALIZER
Note that this implementation shows the cable
attenuation side-by-side with the equalization in the
same plot. For a given frequency, the equalization
function realized with the VCA820 matches the cable
attenuation. The circuit in Figure 82 is a driver circuit.
To implement a receiver circuit, the signal is received
differentially between the +VIN and –VIN inputs.
A
differential cable equalizer can easily be
implemented using the VCA820. An example of a
cable equalization for 100 feet of Belden Cable
1694F is illustrated in Figure 82, with the result for
this implementation shown in Figure 81. This
implementation has a maximum error of 0.2dB from
dc to 40MHz.
R2
1.33kW
VIN
+VIN
RG+
R8
R10
50W
R18
R17
R21
R9
75W
VOUT
FB
40kW
17.5kW
8.7kW
1.27kW
VOUT
VCA820
VREF
C7
100nF
GND
VG
75W Load
RG-
R1
20W
-VIN
C6
120nF
R5
50W
C5
VG = +2VDC
1.42pF
C9
10mF
Figure 82. Differential Cable Equalizer
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AGC LOOP
The demonstration fixtures can be requested at the
Texas Instruments web site (www.ti.com) through the
VCA820 product folder.
In the typical AGC loop shown in Figure 83, the
OPA695 follows the VCA820 to provide 40dB of
overall gain. The output of the OPA695 is rectified
and integrated by an OPA820 to control the gain of
the VCA820. When the output level exceeds the
reference voltage (VREF), the integrator ramps down
reducing the gain of the AGC loop. Conversely, if the
output is too small, the integrator ramps up increasing
the net gain and the output voltage.
MACROMODELS AND APPLICATIONS
SUPPORT
Computer simulation of circuit performance using
SPICE is often useful when analyzing the
performance of analog circuits and systems. This
principle is particularly true for video and RF amplifier
circuits where parasitic capacitance and inductance
can play a major role in circuit performance. A SPICE
model for the VCA820 is available through the TI web
page. The applications group is also available for
design assistance. The models available from TI
predict typical small-signal ac performance, transient
steps, dc performance, and noise under a wide
variety of operating conditions. The models include
the noise terms found in the electrical specifications
of the relevant product data sheet.
DESIGN-IN TOOLS
DEMONSTRATION BOARDS
Two printed circuit boards (PCBs) are available to
assist in the initial evaluation of circuit performance
using the VCA820 in its two package options. Both of
these are offered free of charge as unpopulated
PCBs, delivered with a user's guide. The summary
information for these fixtures is shown in Table 1.
Table 1. EVM Ordering Information
LITERATURE
BOARD PART
NUMBER
REQUEST
NUMBER
PRODUCT
VCA820ID
PACKAGE
SO-14
DEM-VCA-SO-1B
SBOU050
SBOU051
VCA820IDGS
MSOP-10
DEM-VCA-MSOP-1A
1kW
VIN
+VIN
RG+
FB
50W
50W
200W
Out
50W
VCA820
VOUT
OPA695
VG
RG-
-VIN
50W
950W
100W
50W
0.1mF
1N4150
1kW
OPA820
VREF
Figure 83. AGC Loop
22
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Table 2. SO-14 and MSOP-10 RF and RG
Configurations
OPERATING SUGGESTIONS
Operating the VCA820 optimally for
a specific
G = 2
1.33kΩ
1.33kΩ
G = 10
1kΩ
G = 100
845Ω
application requires trade-offs between bandwidth,
input dynamic range and the maximum input voltage,
the maximum gain of operation and gain, output
dynamic range and the maximum input voltage, the
package used, loading, and layout and bypass
recommendations. The Typical Characteristics have
been defined to cover as much ground as possible to
describe the VCA820 operation. There are four
sections in the Typical Characteristics:
RF
RG
200Ω
16.9Ω
There are no differences between the packages in
the recommended values for the gain and feedback
resistors. However, the bandwidth for the
VCA820IDGS (MSOP-10 package) is lower than the
bandwidth for the VCA820ID (SO-14 package). This
difference is true for all gains, but especially true for
gains greater than 5V/V, as can be seen in Figure 85
and Figure 86. Note that the scale must be changed
to a linear scale to view the details.
•
VS = ±5V DC Parameters and VS = ±5V DC and
Power-Supply Parameters, which include dc
operation and the intrinsic limitation of a VCA820
design
•
•
•
VS = ±5V, AVMAX = 6dB Gain of 6dB Operation
VS = ±5V, AVMAX = 20dB Gain of 20dB Operation
VS = ±5V, AVMAX = 40dB Gain of 40dB Operation
3
0
AVMAX = 6dB
Where the Typical Characteristics describe the actual
performance that can be achieved by using the
amplifier properly, the following sections describe in
detail the trade-offs needed to achieve this level of
performance.
-3
AVMAX = 14dB
-6
AVMAX = 20dB
AVMAX = 26dB
-9
PACKAGE CONSIDERATIONS
AVMAX = 34dB
AVMAX = 40dB
The VCA820 is available in both SO-14 and
MSOP-10 packages. Each package has, for the
different gains used in the typical characteristics,
different values of RF and RG in order to achieve the
same performance detailed in the Electrical
Characteristics table.
-12
0
50
100
150
200
Frequency (MHz)
Figure 85. SO-14 Recommended RF and RG
versus AVMAX
Figure 84 shows a test gain circuit for the VCA820.
Table 2 lists the recommended configuration for the
SO-14 and MSOP-10 package.
3
0
AVMAX = 20dB
+VIN
VIN
RF
AVMAX = 6dB
-3
R1
RG+
50W
50W
Source
AVMAX = 26dB
RG
VOUT
-6
RG-
AVMAX = 34dB
50W
Load
R3
-9
AVMAX = 40dB
-VIN
R2
AVMAX = 14dB
-12
50W
0
50
100
150
200
Frequency (MHz)
VG
Figure 86. MSOP-10 Recommended RF and RG
versus AVMAX
Figure 84. Test Circuit
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MAXIMUM GAIN OF OPERATION
OUTPUT CURRENT AND VOLTAGE
This section describes the use of the VCA820 in a
fixed-gain application in which the VG control pin is
set at VG = +2V. The tradeoffs described here are
with bandwidth, gain, and output voltage range.
The VCA820 provides output voltage and current
capabilities that are unsurpassed in a low-cost
monolithic VCA. Under no-load conditions at +25°C,
the output voltage typically swings closer than 1V to
either supply rails; the +25°C swing limit is within
1.2V of either rails. Into a 15Ω load (the minimum
tested load), it is tested to deliver more than ±160mA.
In the case of an application that does not make use
of the VGAIN, but requires some other characteristic of
the VCA820, the RG resistor must be set such that
the maximum current flowing through the resistance
IRG is less than ±2.6mA typical, or 5.2mAPP as
defined in the Electrical Characteristics table, and
must follow Equation 2.
The specifications described above, though familiar in
the industry, consider voltage and current limits
separately. In many applications, it is the voltage ×
current, or V-I product, that is more relevant to circuit
operation. Refer to the Output Voltage and Current
Limitations plot (Figure 50) in the Typical
Characteristics. The X- and Y-axes of this graph
show the zero-voltage output current limit and the
zero-current output voltage limit, respectively. The
four quadrants give a more detailed view of the
VCA820 output drive capabilities, noting that the
graph is bounded by a Safe Operating Area of 1W
maximum internal power dissipation. Superimposing
resistor load lines onto the plot shows that the
VCA820 can drive ±2.5V into 25Ω or ±3.5V into 50Ω
without exceeding the output capabilities or the 1W
dissipation limit. A 100Ω load line (the standard test
circuit load) shows the full ±3.9V output swing
capability, as shown in the Typical Characteristics.
VOUT
IRG
=
AVMAX ´ RG
(2)
As illustrated in Equation 2, once the output dynamic
range and maximum gain are defined, the gain
resistor is set. This gain setting in turn affects the
bandwidth, because in order to achieve the gain (and
with a set gain element), the feedback element of the
output stage amplifier is set as well. Keeping in mind
that the output amplifier of the VCA820 is
a
current-feedback amplifier, the larger the feedback
element, the lower the bandwidth as the feedback
resistor is the compensation element.
Limiting the discussion to the input voltage only and
ignoring the output voltage and gain, Figure 3
illustrates the tradeoff between the input voltage and
the current flowing through the gain resistor.
24
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OUTPUT VOLTAGE DYNAMIC RANGE
The minimum specified output voltage and current
over-temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold startup do
the output current and voltage decrease to the
numbers shown in the Electrical Characteristics
tables. As the output transistors deliver power, the
respective junction temperatures increase, increasing
the available output voltage swing, and increasing the
available output current. In steady-state operation,
the available output voltage and current is always
greater than that temperature shown in the
over-temperature specifications because the output
stage junction temperatures are higher than the
specified operating ambient.
With its large output current capability and its wide
output voltage swing of ±3.9V typical on 100Ω load, it
is easy to forget other types of limitations that the
VCA820 can encounter. For these limitations, careful
analysis must be done to avoid input stage limitation,
either voltage or IRG current; also, consider the gain
limitation, as the control pin VG varies, affecting other
aspects of the circuit.
BANDWIDTH
The output stage of the VCA820 is a wideband
current-feedback amplifier. As such, the feedback
resistance is the compensation of the last stage.
Reducing the feedback element and maintaining the
gain constant limits the useful range of IRG, and
therefore reducing the gain adjust range. For a given
gain, reducing the gain element limits the maximum
achievable output voltage swing.
INPUT VOLTAGE DYNAMIC RANGE
The VCA820 has a input dynamic range limited to
+1.6V and –2.1V. Increasing the input voltage
dynamic range can be done by using an attenuator
network on the input. If the VCA820 is trying to
regulate the amplitude at the output, such as in an
AGC application, the input voltage dynamic range is
directly proportional to Equation 3.
OFFSET ADJUSTMENT
As a result of the internal architecture used on the
VCA820, the output offset voltage originates from the
output stage and from the input stage and multiplier
core. Figure 88 illustrates how to compensate both
sources of the output offset voltage. Use this
procedure to compensate the output offset voltage:
starting with the output stage compensation, set
VG = 0V to eliminate all offset contribution of the input
stage and multiplier core. Adjust the output stage
offset compensation potentiometer. Finally, set
VG = +1V to the maximum gain and adjust the input
stage and multiplier core potentiometer. This
procedure effectively eliminates all offset contribution
at the maximum gain. Because adjusting the gain
modifies the contribution of the input stage and the
multiplier core, some residual output offset voltage
remains.
VIN(PP) = RG ´ IRG(PP)
(3)
As such, for unity-gain or under-attenuated
conditions, the input voltage must be limited to the
CMIR of ±1.6V (3.2VPP) and the current (IRQ) must
flow through the gain resistor, ±2.6mA (5.2mAPP).
This configuration sets a minimum value for RE such
that the gain resistor has to be greater than
Equation 4.
3.2VPP
RGMIN
=
= 615.4W
5.2mAPP
(4)
Values lower than 615.4Ω are gain elements that
result in reduced input range, as the dynamic input
range is limited by the current flowing through the
gain resistor RG (IRG). If the IRG current is limiting the
performance of the circuit, the input stage of the
VCA820 goes into overdrive, resulting in limited
output voltage range. Such IRG-limited overdrive
conditions are shown in Figure 52 for the gain of
20dB and Figure 72 for the 40dB gain.
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NOISE
RF
+VIN
The VCA820 offers 8.2nV/√Hz input-referred voltage
noise density at a gain of 20dB and 1.8pA/√Hz
input-referred current noise density. The
input-referred voltage noise density considers that all
noise terms, except the input current noise but
including the thermal noise of both the feedback
resistor and the gain resistor, are expressed as one
term.
RG+
in
FB
RS
eO
RG
eO
VCA820
RG-
-VIN
*
4kTRS
in
RS
4kTRS
*
NOTE: RF and RG are noiseless.
This model is formulated in Equation 5 and Figure 87.
eO = AVMAX
´
2 ´ (RS ´ in)2 + en2 + 2 ´ 4kTRS
(5)
Figure 87. Simple Noise Model
A more complete model is illustrated in Figure 89. For
additional information on this model and the actual
modeled noise terms, please contact the High-Speed
Product Application Support team at www.ti.com.
+5V
Output Stage Offset
10kW
0.1mF
Compensation Circuit
4kW
-5V
RF
VIN
+VIN
RG+
50W
FB
RG
VOUT
VCA820
RG-
-VIN
+5V
50W
1kW
10kW
0.1mF
Input Stage and Multiplexer Core
Offset Compensation Circuit
-5V
Figure 88. Adjusting the Input and Output Voltage Sources
26
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VG
VG
inINPUT
+VIN
V+
RS1
enINPUT
*
4kTRS1
*
FB
x1
RF
inINPUT
*
4kTRF
+RG
*
*
VOUT
eO
RG
(Noiseless)
ICORE
iinOUTPUT
-RG
VREF
x1
RF
enOUTPUT
iniOUTPUT
enINPUT
4kTRF
*
-VIN
V-
RS2
inINPUT
GND
4kTRS2
*
Figure 89. Full Noise Model
however, it is at a maximum when the output is fixed
at a voltage equal to one-half of either supply voltage
(for equal bipolar supplies). Under this worst-case
condition, PDL = VS 2/(4 × RL), where RL is the
resistive load.
THERMAL ANALYSIS
The VCA820 does not require heatsinking or airflow
in most applications. The maximum desired junction
temperature sets the maximum allowed internal
power dissipation as described in this section. In no
case should the maximum junction temperature be
allowed to exceed +150°C.
Note that it is the power in the output stage and not in
the load that determines internal power dissipation.
As a worst-case example, compute the maximum TJ
using a VCA820ID (SO-14 package) in the circuit of
Figure 76 operating at maximum gain and at the
maximum specified ambient temperature of +85°C.
Operating junction temperature (TJ) is given by
Equation 6:
TJ = TA + PD ´ qJA
PD = 10V(38mA) + 52/(4 ´ 100W) = 442.5mW
(6)
(7)
The total internal power dissipation (PD) is the sum of
quiescent power (PDQ
dissipated in the output stage (PDL) to deliver load
power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. PDL depends on the required output
signal and load; for a grounded resistive load,
Maximum TJ = +85°C + (0.449W ´ 80°C/W) = 120.5°C
)
and additional power
(8)
This maximum operating junction temperature is well
below most system level targets. Most applications
should be lower because an absolute worst-case
output stage power was assumed in this calculation
of VCC/2, which is beyond the output voltage range for
the VCA820.
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BOARD LAYOUT
Achieving optimum
high-frequency amplifier such as the VCA820
requires careful attention to printed circuit board
(PCB) layout parasitics and external component
types. Recommendations to optimize performance
include:
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils, or 1.27mm to
2.54mm) should be used, preferably with ground and
power planes opened up around them.
performance
with
a
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. This recommendation
includes the ground pin (pin 2). Parasitic capacitance
on the output can cause instability: on both the
inverting input and the noninverting input, it can react
with the source impedance to cause unintentional
band limiting. To reduce unwanted capacitance, a
window around the signal I/O pins should be opened
in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be
unbroken elsewhere on the board. Place a small
series resistance (greater than 25Ω) with the input pin
connected to ground to help decouple package
parasitics.
e) Socketing a high-speed part like the VCA820 is
not recommended. The additional lead length and
pin-to-pin capacitance introduced by the socket can
create an extremely troublesome parasitic network,
which can make it almost impossible to achieve a
smooth, stable frequency response. Best results are
obtained by soldering the VCA820 onto the board.
INPUT AND ESD PROTECTION
The VCA820 is built using
a very high-speed
complementary bipolar process. The internal junction
breakdown voltages are relatively low for these very
small geometry devices. These breakdowns are
reflected in the Absolute Maximum Ratings table.
b) Minimize the distance (less than 0.25”) from the
power-supply
pins
to
high-frequency
0.1μF
All pins on the VCA820 are internally protected from
decoupling capacitors. At the device pins, the ground
and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. Larger (2.2μF to
6.8μF) decoupling capacitors, effective at lower
frequencies, should also be used on the main supply
pins. These capacitors may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PCB.
ESD by means of
a
pair of back-to-back
reverse-biased diodes to either power supply, as
shown in Figure 90. These diodes begin to conduct
when the pin voltage exceeds either power supply by
about 0.7V. This situation can occur with loss of the
amplifier power supplies while a signal source is still
present. The diodes can typically withstand
a
continuous current of 30mA without destruction. To
ensure long-term reliability, however, diode current
should be externally limited to 10mA whenever
possible.
ESD Protection diodes internally
c) Careful selection and placement of external
+VS
connected to all pins.
components
preserve
the
high-frequency
performance of the VCA820. Resistors should be a
very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high-frequency performance.
Again, keep the leads and PCB trace length as short
as possible. Never use wire-wound type resistors in a
high-frequency application. Because the output pin is
the most sensitive to parasitic capacitance, always
position the series output resistor, if any, as close as
possible to the output pin. Other network
components, such as inverting or non-inverting input
termination resistors, should also be placed close to
the package.
External
Pin
Internal
Circuitry
-VS
Figure 90. Internal ESD Protection
28
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REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (December, 2008) to Revision C .......................................................................................... Page
•
•
•
•
•
•
•
Deleted lead temperature specification from Absolute Maximum Ratings table .................................................................. 2
Changed Figure 15; corrected y-axis units from VIN (mV) to VOUT (mV) .............................................................................. 7
Changed Figure 16; corrected y-axis units from VIN (mV) to VOUT (V) ................................................................................. 7
Changed Figure 37; corrected y-axis units from VIN (mV) to VOUT (mV) ............................................................................ 11
Changed Figure 38; corrected y-axis units from VIN (mV) to VOUT (V) ............................................................................... 11
Changed Figure 58; corrected y-axis units from VIN (mV) to VOUT (mV) ............................................................................ 15
Changed Figure 59; corrected y-axis units from VIN (mV) to VOUT (V), corrected VIN value in graph ................................. 15
Changes from Revision A (August, 2008) to Revision B ............................................................................................... Page
Revised second paragraph of the Wideband Variable Gain Amplifier Operation section describing pin 9 ........................ 19
•
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
PACKAGING INFORMATION
Orderable Device
VCA820ID
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOIC
SOIC
D
14
14
10
10
10
10
14
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
VCA820ID
VCA820IDG4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
VCA820ID
BOQ
VCA820IDGSR
VCA820IDGSRG4
VCA820IDGST
VCA820IDGSTG4
VCA820IDR
VSSOP
VSSOP
VSSOP
VSSOP
SOIC
DGS
DGS
DGS
DGS
D
2500
2500
250
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Green (RoHS
& no Sb/Br)
CU NIPDAU
BOQ
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
BOQ
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
BOQ
2500
2500
Green (RoHS
& no Sb/Br)
VCA820ID
VCA820ID
VCA820IDRG4
SOIC
D
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
VCA820IDGSR
VCA820IDGST
VCA820IDR
VSSOP
VSSOP
SOIC
DGS
DGS
D
10
10
14
2500
250
330.0
180.0
330.0
12.4
12.4
16.4
5.3
5.3
6.5
3.4
3.4
9.0
1.4
1.4
2.1
8.0
8.0
8.0
12.0
12.0
16.0
Q1
Q1
Q1
2500
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
VCA820IDGSR
VCA820IDGST
VCA820IDR
VSSOP
VSSOP
SOIC
DGS
DGS
D
10
10
14
2500
250
367.0
210.0
367.0
367.0
185.0
367.0
35.0
35.0
38.0
2500
Pack Materials-Page 2
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