VCA822IDG4 [TI]
Wideband, > 40dB Gain Adjust Range, Linear in V/V VARIABLE GAIN AMPLIFIER; 宽带\u003e 40分贝增益调整范围，线性的V / V可变增益放大器
| 型号： | VCA822IDG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Wideband, > 40dB Gain Adjust Range, Linear in V/V VARIABLE GAIN AMPLIFIER |
| 文件： | 总35页 (文件大小：900K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
Wideband, > 40dB Gain Adjust Range, Linear in V/V
VARIABLE GAIN AMPLIFIER
1
FEATURES
DESCRIPTION
23
•
150MHz SMALL-SIGNAL BANDWIDTH
(G = +10V/V)
The VCA822 is a dc-coupled, wideband, linear in V/V,
continuously variable, voltage-controlled gain
amplifier. It provides differential input to
single-ended conversion with a high-impedance gain
control input used to vary the gain down 40dB from
the nominal maximum gain set by the gain resistor
(RG) and feedback resistor (RF).
•
•
•
•
•
•
137MHz, 5VPP BANDWIDTH (G = +10V/V)
0.1dB GAIN FLATNESS to 28MHz
1700V/µs SLEW RATE
a
> 40dB GAIN ADJUST RANGE
HIGH GAIN ACCURACY: 20dB ±0.3dB
HIGH OUTPUT CURRENT: ±160mA
The VCA822 internal architecture consists of two
input buffers and an output current feedback amplifier
stage integrated with a multiplier core to provide a
complete variable gain amplifier (VGA) system that
does not require external buffering. The maximum
gain is set externally with two resistors, providing
flexibility in designs. The maximum gain is intended
to be set between +2V/V and +100V/V. Operating
from ±5V supplies, the gain control voltage for the
VCA822 adjusts the gain linearly in V/V as the control
voltage varies from +1V to –1V. For example, set for
a maximum gain of +10V/V, the VCA822 provides
10V/V, at +1V input, to 0.1V/V at –1V input of gain
control range. The VCA822 offers excellent gain
APPLICATIONS
•
•
•
•
•
•
DIFFERENTIAL LINE RECEIVERS
DIFFERENTIAL EQUALIZERS
PULSE AMPLITUDE COMPENSATION
VARIABLE ATTENUATORS
VOLTAGE-TUNABLE ACTIVE FILTERS
DROP-IN UPGRADE TO LMH6503
RF
VIN1
+VIN
RG+
RS
linearity. For
a
20dB maximum gain, and
a
RL
FB
VCA822
R1
C1
RG
VOUT
gain-control input voltage varying between 0V and
1V, the gain does not deviate by more than ±0.3dB
(maximum at +25°C).
CL
RG-
VIN2
-VIN
20W
RS
Table 1. VCA822 RELATED PRODUCTS
GAIN
ADJUST
RANGE
(dB)
INPUT
NOISE
(nV/√Hz)
SIGNAL
BANDWIDTH
(MHz)
Figure 1. Differential Equalizer
SINGLES
VCA810
—
DUALS
—
80
45
45
52
48
40
40
40
40
2.4
1.25
1
35
80
9
6
VCA2612
VCA2613
VCA2615
VCA2617
—
Equalized Frequency
Response
—
80
3
—
0.8
4.1
8.2
7.0
8.2
7.0
50
0
-3
—
50
-6
VCA820
VCA821
VCA822
VCA824
150
420
150
420
Initial Frequency Response
of VCA822 with RC Load
-9
—
-12
-15
-18
-21
-24
—
—
RL = 75W
CF = 100pF
1M
10M
100M
Frequency (Hz)
1G
Figure 2. Differential Equalization of an RC Load
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
X2Y is a trademark of X2Y Corporation.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
VCA822
www.ti.com
SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
SPECIFIED
PACKAGE
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
PRODUCT PACKAGE-LEAD DESIGNATOR
VCA822ID
VCA822IDR
Rail, 50
VCA822
VCA822
SO-14
D
–40°C to +85°C
–40°C to +85°C
VCA822ID
BOS
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
VCA822IDGST
VCA822IDGSR
MSOP-10
DGS
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
VCA822
UNIT
Power supply
±6.5
V
Internal power dissipation
See Thermal Characteristics
Input voltage range
±VS
–40 to +125
+260
V
°C
°C
°C
°C
V
Storage temperature range
Lead temperature (soldering, 10s)
Junction temperature (TJ)
+150
Junction temperature (TJ), maximum continuous operation
Human body model (HBM)
+140
2000
ESD ratings
Charged device model (CDM)
Machine model (MM)
500
V
200
V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to
absolute-maximum rated conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
SO-14
(Top View)
MSOP-10
(Top View)
+VCC
NC
+VCC
VG
1
2
3
4
5
6
7
14
13
12
11
10
9
GND
VOUT
-VCC
-VIN
-RG
FB
+VCC
VG
1
2
3
4
5
10
9
FB
+VIN
+RG
-RG
-VIN
-VCC
8
GND
VOUT
VREF
-VCC
+VIN
+RG
7
6
8
NC = No Connection
2
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): VCA822
VCA822
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS: VS = ±5V
At AVMAX = +10V/V, RF = 1kΩ, RG = 200Ω, and RL = 100Ω, unless otherwise noted.
VCA822
MIN/MAX OVER
TYP
TEMPERATURE
0°C to
70°C(3)
–40°C to
+85°C(3)
MIN/
MAX
TEST
PARAMETER
CONDITIONS
+25°C
+25°C(2)
UNITS
LEVEL(1)
AC PERFORMANCE
Small-signal bandwidth (SO-14 Package)
AVMAX = +2V/V, VO = 1VPP, VG = 1V
AVMAX = +10V/V, VO = 1VPP, VG = 1V
AVMAX = +100V/V, VO = 1VPP, VG = 1V
AVMAX = +10V/V, VO = 5VPP, VG = 1V
VG = 0VDC + 10mVPP
168
150
118
137
200
28
MHz
MHz
MHz
MHz
MHz
MHz
V/µs
ns
typ
typ
C
C
C
C
B
C
B
B
C
typ
Large-signal bandwidth
Gain control bandwidth
Bandwidth for 0.1dB flatness
Slew rate
typ
170
170
165
min
typ
AVMAX = +10V/V, VO = 1VPP, VG = 1V
AVMAX = +10V/V, VO = 5V Step, VG = 1V
AVMAX = +10V/V, VO = 5V Step, VG = 1V
AVMAX = +10V/V, VO = 5V Step, VG = 1V
1700
2.5
1500
3.1
1500
3.2
1450
3.2
min
max
typ
Rise-and-fall time
Settling time to 0.01%
Harmonic distortion
11
ns
2nd-harmonic
VO = 2VPP, f = 20MHz, VG = 1V
VO = 2VPP, f = 20MHz, VG = 1V
f > 100kHz, VG = 1V
–62
–68
8.2
2.6
–60
–66
–60
–66
–60
–66
dBc
dBc
min
min
typ
B
B
C
C
3rd-harmonic
Input voltage noise
nV/√Hz
pA/√Hz
Input current noise
f > 100kHz, VG = 1V
typ
GAIN CONTROL
Absolute gain error
AVMAX = +10V/V, VG = 1V
AVMAX = +10V/V, 0 < VG < 1V
AVMAX = +10V/V, –0.8 < VG < 1V
Relative to maximum gain
VG = 0V
±0.1
±0.05
±1.06
–26
±0.4
±0.3
±1.9
–24
30
±0.5
±0.34
±2.1
–24
±0.6
±0.37
±2.2
–23
dB
dB
max
max
max
max
max
max
typ
A
A
A
A
A
B
C
Gain deviation
Gain deviation
dB
Gain at VG = –0.9V
dB
Gain control bias current
Average gain control bias current drift
Gain control input impedance
DC PERFORMANCE
Input offset voltage
22
35
37
µA
VG = 0V
100
100
nA/°C
kΩ || pF
70 || 1
±4
AVMAX = +10V/V, VCM = 0V, VG = 0V
AVMAX = +10V/V, VCM = 0V, VG = 0V
AVMAX = +10V/V, VCM = 0V, VG = 0V
AVMAX = +10V/V, VCM = 0V, VG = 0V
AVMAX = +10V/V, VCM = 0V, VG = 0V
AVMAX = +10V/V, VCM = 0V, VG = 0V
±17
25
±17.8
±30
29
±19
±30
31
mV
µV/°C
µA
max
max
max
max
max
max
A
B
A
B
A
B
Average input offset voltage drift
Input bias current
19
Average input bias current drift
Input offset current
±90
±3.2
±16
±90
±3.5
±16
nA/°C
µA
±0.5
±2.5
Average input offset current drift
Maximum current through gain resistance
nA/°C
2.6
2.55
2.55
2.5
mA
max
B
(IRG
)
MAX
INPUT
Most positive input voltage
Most negative input voltage
Common-mode rejection ratio
Input impedance
RL = 100Ω
RL = 100Ω
VCM = ±0.5V
+1.6
–2.1
80
+1.6
–2.1
65
+1.6
–2.1
60
+1.6
–2.1
60
V
V
min
max
min
A
A
A
dB
Differential
0.5 || 1
0.5 || 2
MΩ || pF
MΩ || pF
typ
typ
C
C
Common-mode
(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2) Junction temperature = ambient for +25°C tested specifications.
(3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over
temperature specifications.
Copyright © 2007, Texas Instruments Incorporated
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS: VS = ±5V (continued)
At AVMAX = +10V/V, RF = 1kΩ, RG = 200Ω, and RL = 100Ω, unless otherwise noted.
VCA822
MIN/MAX OVER
TYP
TEMPERATURE
0°C to
70°C(3)
–40°C to
+85°C(3)
MIN/
MAX
TEST
PARAMETER
OUTPUT
CONDITIONS
+25°C
+25°C(2)
UNITS
LEVEL(1)
Output voltage swing
RL = 1kΩ
RL = 100Ω
±4.0
±3.9
±160
0.01
±3.8
±3.7
±140
±3.75
±3.6
±3.7
±3.5
±130
V
V
min
min
min
typ
A
A
A
C
Output current
VO = 0V, RL = 5Ω
±130
mA
Ω
Output impedance
AVMAX = +10V/V, f > 100kHz, VG = 1V
POWER SUPPLY
Specified operating voltage
Minimum operating voltage
Maximum operating voltage
Maximum quiescent current
Minimum quiescent current
Power-supply rejection ratio (–PSRR)
THERMAL CHARACTERISTICS
Specified operating range, D package
Thermal resistance, θJA
±5
V
V
typ
typ
C
C
A
A
A
A
±3.5
±6
37
±6
37.5
34
±6
38
V
max
max
max
min
VG = 0V
VG = 0V
VG = +1V
36
36
mA
mA
dB
34.5
–61
33.5
–58
–68
–59
–40 to +85
°C
typ
C
Junction-to-ambient
DGS MSOP-10
130
80
°C/W
°C/W
typ
typ
C
C
D
SO-14
4
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VCA822
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, DC Parameters
At TA = +25°C, RL = 100Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted.
MAXIMUM DIFFERENTIAL INPUT VOLTAGE vs RG
MAXIMUM GAIN ADJUST RANGE vs RF
10
40
35
30
25
20
15
10
5
IRG MAX = 2.6mA
IRG = 2.6mA
VIN MAX(VPP) = 2 ´ RG ´ IRG MAX (AP)
AVMAX(V/V) = 2 ´ [RF/VIN(VPP)] ´ 2 ´ IRG (AP)
VO = 1VPP
VO = 2VPP
1
VO = 4VPP
VO = 3VPP
0
0.1
10
100
1k
100
1k
10k
Gain Resistor (W)
Figure 3.
Feedback Resistor (W)
Figure 4.
MAXIMUM GAIN ADJUST RANGE vs
PEAK-TO-PEAK OUTPUT VOLTAGE
GAIN ERROR BAND vs
GAIN CONTROL VOLTAGE
11
10
9
60
50
40
30
20
10
0
IRG = 2.6mA
Absolute Error
AVMAX(V/V) = 2 ´ [RF/V (VPP)] ´ 2 ´ IRG (AP)
IN
8
RF = 3kW
7
RF = 4kW
RF = 5kW
6
Relative Error to
Maximum Gain
5
4
RF = 500W
3
2
RF = 1kW
1
RF = 1.5kW
RF = 2kW
0
-1
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
0.1
1
10
Control Voltage (V)
Output Voltage (VPP
)
Figure 5.
Figure 6.
GAIN ERROR BAND vs
GAIN CONTROL VOLTAGE
GAIN ERROR BAND vs
GAIN CONTROL VOLTAGE
21
20
19
18
17
16
15
14
13
24
Data Equation:
y = 20log (4.9619x + 5.0169)
22
20
18
16
14
12
10
8
Data
Relative Error to Linear Regression
6
Relative Error to Linear Regression
4
Linear Regression
2
0
Data Equation:
y = 20log (4.9619x + 5.0169)
-2
-4
-6
Data
Linear Regression
0.2 0.4
0
0.6
0.8
1.0
-0.8 -0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
Control Voltage (V)
Control Voltage (V)
Figure 7.
Figure 8.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, DC and Power-Supply Parameters
At TA = +25°C, RL = 100Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless otherwise noted.
SUPPLY CURRENT vs CONTROL VOLTAGE
RECOMMENDED RF vs AVMAX
(AVMAX = +2V/V)
40
39
38
37
36
35
34
33
32
1500
1400
1300
1200
1100
1000
900
For > 40dB Gain Adjust Range
-IQ
+IQ
NOTE: -3dB bandwidth varies with package type.
See the Application section for more details.
800
700
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2 0.4 0.6 0.8 1.0
1
10
100
Gain Control Voltage (V)
AVMAX (V/V)
Figure 9.
Figure 10.
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = +10V/V)
SUPPLY CURRENT vs CONTROL VOLTAGE
(AVMAX = +100V/V)
40
39
38
37
36
35
34
33
40
39
38
37
36
35
34
33
32
-IQ
-IQ
+IQ
+IQ
32
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2 0.4 0.6 0.8 1.0
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2 0.4 0.6 0.8 1.0
Gain Control Voltage (V)
Gain Control Voltage (V)
Figure 11.
Figure 12.
TYPICAL DC DRIFT vs TEMPERATURE
1.0
0.5
35
30
25
20
15
10
5
VG = 0V
Input Offset Voltage (VOS
)
Left Scale
0
Input Bias Current (IB)
Right Scale
-0.5
-1.0
-1.5
-2.0
-2.5
10x Input Offset Current (IOS
)
0
Right Scale
-3.0
-5
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 13.
6
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
3
0
VO = 1VPP
-3
-6
-9
-12
-3
VG = 0V
-6
-9
VO = 2VPP
VO = 5VPP
VG = 1V
-12
-15
-18
AVMAX = 2V/V
-15 VIN = 1VPP
RL = 100W
VO = 7VPP
-18
1M
10M
100M
Frequency (Hz)
1G
1M
10M
100M
Frequency (Hz)
1G
Figure 14.
SMALL-SIGNAL PULSE RESPONSE
Figure 15.
LARGE-SIGNAL PULSE RESPONSE
4
3
400
300
200
100
0
VIN = 250mVPP
f = 20MHz
VIN = 2.5VPP
f = 20MHz
2
1
0
-1
-2
-3
-100
-200
-300
Time (10ns/div)
Time (10ns/div)
Figure 16.
Figure 17.
COMPOSITE VIDEO dG/dP
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
0
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
-0.50
0
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0.09
-dG
VG = 1V
AVMAX = +2V/V
-0.05
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
VG = +1V
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
-0.50
-dG
VG = 0V
-dP
VG = 1V
-dP
VG = 0V
0
10
20
30
40
50
1
2
3
4
Frequency (MHz)
Number of Video Loads
Figure 18.
Figure 19.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs LOAD RESISTANCE
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-60
-65
-70
-75
-80
-85
VG = +1V
2nd-Harmonic
AVMAX = +2V/V
VO = 2VPP
2nd-Harmonic
RL = 100W
3rd-Harmonic
3rd-Harmonic
AVMAX = +2V/V
VG = +1V
VO = 2VPP
f = 20MHz
0.1
1
10
100
100
1k
Frequency (MHz)
Resistance (W)
Figure 20.
Figure 21.
HARMONIC DISTORTION vs
OUTPUT VOLTAGE
HARMONIC DISTORTION vs
GAIN CONTROL VOLTAGE
-40
-45
-50
-55
-60
-65
-70
-50
-55
-60
-65
-70
-75
-80
VO = 2VPP
VMAX = +2V/V
RL = 100W
VG = +1V
A
AVMAX = +2V/V
RL = 100W
f = 20MHz
f = 20MHz
2nd-Harmonic
Maximum Current Through RG Limited
2nd-Harmonic
3rd-Harmonic
3rd-Harmonic
-0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
0.1
1
10
Gain Control Voltage (V)
Output Voltage Swing (VPP
)
Figure 22.
Figure 23.
TWO-TONE, 3RD-ORDER
INTERMODULATION INTERCEPT
TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs GAIN CONTROL VOLTAGE
45
40
35
30
25
20
40
38
Constant Input Voltage
36
34
Constant Output Voltage
32
30
28
26
24
fIN = 20MHz
22
At 50W Matched Load
10 20
At 50W Matched Load
20
0
30
40
50
60
70
-0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
Frequency (MHz)
Gain Control Voltage (V)
Figure 24.
Figure 25.
8
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY RESPONSE
2.2
2.0
1.8
1.6
3
0
VG = 0VDC + 10mVPP
VIN = 0.5VDC
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-3
-6
-9
-12
-0.2
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1M
10M
100M
Frequency (Hz)
1G
Gain Control Voltage (V)
Figure 26.
Figure 27.
GAIN CONTROL PULSE RESPONSE
FULLY-ATTENUATED RESPONSE
10
4
VIN = 1.25VDC
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
VG = 1V
3
2
1
0
-1
1.5
1.0
0.5
0
VG = -1V
-0.5
-1.0
VO = 2VPP
1G
1M
10M
100M
Frequency (Hz)
Time (10ns/div)
Figure 28.
Figure 29.
GROUP DELAY vs FREQUENCY
GROUP DELAY vs GAIN CONTROL VOLTAGE
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1MHz
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10MHz
20MHz
VG = +1V
VO = 1VPP
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2 0.4 0.6 0.8 1.0
0
20
40
60
80
100
Gain Control Voltage (V)
Frequency (MHz)
Figure 30.
Figure 31.
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TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +2V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 1.33kΩ, RG = 1.33kΩ, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
RECOMMENDED RS vs CAPACITIVE LOAD
FREQUENCY RESPONSE vs CAPACITIVE LOAD
100
9
CL = 22pF
VO = 0.5VPP
CL = 10pF
6
3
CL = 47pF
0
CL = 100pF
10
-3
-6
-9
-12
RF
VIN
+VIN
RS
VOUT
1.33kW
VCA822
(1)
1kW
20W
-VIN
0.1dB Flatness Targeted
NOTE: (1) 1kW is optional.
0
1
10
100
1k
1M
10M
100M
1G
Capacitive Load (pF)
Frequency (Hz)
Figure 32.
Figure 33.
OUTPUT VOLTAGE NOISE DENSITY
INPUT CURRENT NOISE DENSITY
1000
10
VG = +1V
VG = 0V
100
VG = -1V
10
1
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
Figure 34.
Figure 35.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
3
0
-3
-3
VO = 2VPP
VG = 1V
-6
-6
-9
-9
VO = 5VPP
-12
-15
-18
-12
-15
-18
VO = 7VPP
AVMAX = 10V/V
VIN = 200mVPP
RL = 100W
VG = 0V
0
50
100
150
200
250
300
350
400
1M
10M
100M
1G
Frequency (MHz)
Frequency (Hz)
Figure 36.
SMALL-SIGNAL PULSE RESPONSE
Figure 37.
LARGE-SIGNAL PULSE RESPONSE
300
3
2
VIN = 50mVPP
f = 20MHz
VIN = 0.5VPP
f = 20MHz
200
100
1
0
0
-100
-200
-300
-1
-2
-3
Time (10ns/div)
Time (10ns/div)
Figure 38.
Figure 39.
GAIN FLATNESS, DEVIATION FROM LINEAR PHASE
0.05
OUTPUT VOLTAGE NOISE DENSITY
0.05
0
1000
100
10
0
VG = +1V
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.05
-0.10
-0.15
-0.20
-0.25
VG = 0V
VG = -1V
VG = +1V
-0.30
AVMAX = +10V/V
-0.35
0
10
20
30
40
50
100
1k
10k
100k
1M
10M
Frequency (MHz)
Frequency (Hz)
Figure 40.
Figure 41.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
VG = +1V
HARMONIC DISTORTION vs LOAD RESISTANCE
-45
-60
-65
-70
-75
-80
-85
-90
2nd-Harmonic
-50 AVMAX = +10V/V
VO = 2VPP
-55
RL = 100W
-60
-65
-70
-75
-80
3rd-Harmonic
2nd-Harmonic
3rd-Harmonic
VG = +1V
AVMAX = +10V/V
VO = 2VPP
f = 20MHz
-85
0.1
1
10
100
100
1k
Frequency (MHz)
Figure 42.
Resistance (W)
Figure 43.
HARMONIC DISTORTION vs
OUTPUT VOLTAGE
HARMONIC DISTORTION vs
GAIN CONTROL VOLTAGE
-55
-60
-65
-70
-75
-80
-45
-50
-55
-60
-65
-70
VO = 2VPP
AVMAX = +10V/V
RL = 100W
f = 20MHz
2nd-Harmonic
Max Current Through
RG Limited
2nd-Harmonic
3rd-Harmonic
3rd-Harmonic
VG = +1V
AVMAX = +10V/V
RL = 100W
f = 20MHz
0.1
1
10
-0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
Output Voltage Swing (VPP
)
Gain Control Voltage (V)
Figure 44.
Figure 45.
TWO-TONE, 3RD-ORDER
INTERMODULATION INTERCEPT
TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs GAIN CONTROL VOLTAGE (fIN = 20MHz)
40
45
40
35
30
25
20
38
Constant Output Voltage
36
34
32
Constant Input Voltage
30
28
26
24
22
At 50W Matched Load
At 50W Matched Load
20
-0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
5
10 15 20 25 30 35 40 45 50 55 60 65 70
Gain Control Voltage (V)
Frequency (MHz)
Figure 46.
Figure 47.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY RESPONSE
6
3
11
10
9
VG = 0VDC + 10mVPP
VIN = 0.1VDC
8
0
7
-3
6
5
-6
4
-9
3
2
-12
-15
-18
1
0
-1
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1M
10M
100M
1G
Gain Control Voltage (V)
Frequency (Hz)
Figure 48.
Figure 49.
GAIN CONTROL PULSE RESPONSE
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
5
4
4
VIN = 0.25VDC
3
100W
3
2
Load Line
1W Internal
2
1
Power Dissipation
25W
1
0
Load Line
0
-1
1.5
1.0
0.5
0
50W
Load Line
1W Internal
-1
-2
-3
-4
-5
Power Dissipation
-0.5
-1.0
-300
-200
-100
0
100
200
300
Time (10ns/div)
Output Current (mA)
Figure 50.
Figure 51.
FULLY-ATTENUATED RESPONSE
IRG LIMITED OVERDRIVE RECOVERY
30
20
10
0
2.0
8
AVMAX = +10V/V
Input Voltage
VG = -0.3V
1.5
1.0
VG = 1V
Left Scale
4
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.5
0
0
Input-Referred
-0.5
-1.0
-1.5
-2.0
Output Voltage
Right Scale
-4
-8
VG = -1V
VO = 2VPP
1G
1M
10M
100M
Time (40ns/div)
Frequency (Hz)
Figure 52.
Figure 53.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +10V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 1kΩ, RG = 200Ω, VG = +1V, and VIN = single-ended input on +VIN with –VIN at ground, unless
otherwise noted.
OUTPUT LIMITED OVERDRIVE RECOVERY
GROUP DELAY vs GAIN CONTROL VOLTAGE
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
2.0
1.5
8
AVMAX = +10V/V
Output Voltage
6
VG = 1.0V
Right Scale
1MHz
1.0
4
10MHz
0.5
2
0
0
Input Voltage
Left Scale
-0.5
-1.0
-1.5
-2.0
-2
-4
-6
-8
20MHz
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2 0.4 0.6 0.8 1.0
Time (40ns/div)
Gain Control Voltage (V)
Figure 54.
Figure 55.
GROUP DELAY vs FREQUENCY
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
VG = +1V
VO = 1VPP
0
20
40
60
80
100
Frequency (MHz)
Figure 56.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +100V/V
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
SMALL-SIGNAL FREQUENCY RESPONSE
LARGE-SIGNAL FREQUENCY RESPONSE
3
0
3
0
VG = 1V
-3
-6
-3
VO = 2VPP
VG = 0V
-6
-9
-9
VO = 7VPP
-12
-15
-12
-15
-18
AVMAX = 100V/V
VIN = 20mVPP
RL = 100W
VO = 5VPP
-18
0
50
100
150
200
250
300
1
10
100
500
Frequency (MHz)
Frequency (MHz)
Figure 57.
Figure 58.
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
300
3
2
VIN = 50mVPP
f = 20MHz
VIN = 5mVPP
f = 20MHz
200
100
1
0
0
-100
-200
-300
-1
-2
-3
Time (10ns/div)
Time (10ns/div)
Figure 59.
Figure 60.
GAIN FLATNESS
OUTPUT VOLTAGE NOISE DENSITY
0.10
0.1
1000
100
10
VG = +1V
AVMAX = +100V/V
VG = +1V
0.05
0
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
VG = 0V
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
VG = -1V
0
10
20
30
40
50
100
1k
10k
100k
1M
10M
Frequency (MHz)
Frequency (Hz)
Figure 61.
Figure 62.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +100V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
VG = +1V
HARMONIC DISTORTION vs LOAD RESISTANCE
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
2nd-Harmonic
AVMAX = +100V/V
VO = 2VPP
RL = 100W
3rd-Harmonic
2nd-Harmonic
VG = +1V
VMAX = +100V/V
A
3rd-Harmonic
VO = 2VPP
f = 20MHz
0.1
1
10
100
100
1k
Frequency (MHz)
Resistance (W)
Figure 63.
Figure 64.
HARMONIC DISTORTION vs
OUTPUT VOLTAGE
HARMONIC DISTORTION vs
GAIN CONTROL VOLTAGE
-30
-40
-50
-60
-70
-80
-40
-45
-50
-55
-60
-65
2nd-Harmonic
3rd-Harmonic
3rd-Harmonic
Maximum Current Through RG Limited
VO = 2VPP
VG = 1VPP
VMAX = +100V/V
AVMAX = +100V/V
RL = 100W
A
2nd-Harmonic
RL = 100W
f = 20MHz
f = 20MHz
-0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
0.1
1
10
Gain Control Voltage (V)
Output Voltage Swing (VPP
)
Figure 65.
Figure 66.
TWO-TONE, 3RD-ORDER
INTERMODULATION INTERCEPT
TWO-TONE, 3RD-ORDER INTERMODULATION INTERCEPT
vs GAIN CONTROL VOLTAGE (fIN = 20MHz)
31
33
31
29
27
25
23
21
19
17
15
Constant Input Voltage
29
27
25
Constant Output Voltage
23
21
19
17
At 50W Matched Load
At 50W Matched Load
15
5
10 15 20 25 30 35 40 45 50 55 60 65 70
-0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
Frequency (MHz)
Gain Control Voltage (V)
Figure 67.
Figure 68.
16
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +100V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GAIN vs GAIN CONTROL VOLTAGE
GAIN CONTROL FREQUENCY RESPONSE
3
0
110
100
90
80
70
60
50
40
30
20
10
0
VG = 0VDC + 10mVPP
VIN = 10mVDC
Feedthrough
-3
-6
-9
-12
-10
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1M
10M
100M
Frequency (Hz)
Figure 70.
1G 2G
Gain Control Voltage (V)
Figure 69.
GAIN CONTROL PULSE RESPONSE
FULLY-ATTENUATED RESPONSE
4
50
40
VIN = 25mVDC
3
VG = 1V
30
2
20
1
10
0
0
-1
1.5
1.0
0.5
0
-10
-20
-30
-40
-50
-60
VG = -1V
-0.5
-1.0
VO = 2VPP
1M
10M
100M
1G
Time (10ns/div)
Frequency (Hz)
Figure 71.
Figure 72.
IRG LIMITED OVERDRIVE RECOVERY
OUTPUT LIMITED OVERDRIVE RECOVERY
0.8
0.6
8
0.20
8
AVMAX = +100V/V
AVMAX = +100V/V
Output Voltage
Right Scale
Input Voltage
6
0.15
0.10
0.05
0
6
VG = -0.3V
VG = 1.0V
Left Scale
0.4
4
4
2
0.2
2
0
0
0
-0.05
-0.10
-0.15
-0.20
-8
-6
-4
-2
-0.2
-0.4
-0.6
-0.8
-2
-4
-6
-8
Input Voltage
Left Scale
Output Voltage
Right Scale
Time (40ns/div)
Time (40ns/div)
Figure 73.
Figure 74.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS: VS = ±5V, AVMAX = +100V/V (continued)
At TA = +25°C, RL = 100Ω, RF = 845Ω, RG = 16.9Ω, VG = +1V, VIN = single-ended input on +VIN with –VIN at ground, and
SO-14 package, unless otherwise noted.
GROUP DELAY vs GAIN CONTROL VOLTAGE
GROUP DELAY vs FREQUENCY
3.0
2.5
2.0
1.5
1.0
0.5
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
20MHz
10MHz
1MHz
VG = +1V
VO = 1VPP
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2 0.4 0.6 0.8 1.0
0
20
40
60
80
100
Gain Control Voltage (V)
Frequency (MHz)
Figure 75.
Figure 76.
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SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
APPLICATION INFORMATION
For test purposes, the input impedance is set to 50Ω
with a resistor to ground and the output impedance is
set to 50Ω with a series output resistor. Voltage
swings reported in the Electrical Characteristics table
are taken directly at the input and output pins, while
output power (dBm) is at the matched 50Ω load. For
the circuit in Figure 77, the total effective load is
100Ω 1kΩ. Note that for the SO-14 package, there
is a ground pin, GND (pin 11). For the SO-14
package, this pin must be connected to ground
through a 20Ω resistor in order to avoid possible
oscillations of the output stage. In the MSOP-10
package, this pin is internally connected and does not
require such precaution. An X2Y™ capacitor has
been used for power-supply bypassing. The
combination of low inductance, high resonance
frequency, and integration of three capacitors in one
package (two capacitors to ground and one across
the supplies) of this capacitor enables to achieve the
low second-harmonic distortion reported in the
Electrical Characteristics table. More information on
how the VCA822 operates can be found in the
Operating Suggestions section.
WIDEBAND VARIABLE GAIN AMPLIFIER
OPERATION
The VCA822 provides an exceptional combination of
high output power capability with a wideband, greater
than 40dB gain adjust range, linear in V/V variable
gain amplifier. The VCA822 input stage places the
transconductance element between two input buffers,
using the output currents as the forward signal. As
the differential input voltage rises, a signal current is
generated through the gain element. This current is
then mirrored and gained by a factor of two before
reaching the multiplier. The other input of the
multiplier is the voltage gain control pin, VG.
Depending on the voltage present on VG, up to two
times the gain current is provided to the
transimpedance output stage. The transimpedance
output stage is a current-feedback amplifier providing
high output current capability and high slew rate,
1700V/µs. This exceptional full-power performance
comes at the price of a relatively high quiescent
current (36mA), but a low input voltage noise for this
type of architecture (8.2nV/√Hz).
Figure 77 shows the dc-coupled, gain of +10V/V, dual
power-supply circuit used as the basis of the ±5V
Electrical Characteristics and Typical Characteristics.
0.1mF
X2Yâ
Capacitor
+5V
-5V
+
2.2mF
2.2mF
+
VG
+VIN
VIN
20W
x1
FB
IRG
RG+
RF
RG
1kW
x2
200W
RG-
VOUT
VOUT
x1
VCA822
-VIN
VREF
20W
20W
Figure 77. DC-Coupled, AVMAX = +10V/V, Bipolar Supply Specification and Test Circuit
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FOUR-QUADRANT MULTIPLIER
DIFFERENCE AMPLIFIER
A four-quadrant multiplier can easily be implemented
using the VCA822. By placing a resistor between FB
and VIN, the transfer function depends upon both VIN
and VG, as shown in Equation 1.
Because both inputs of the VCA822 are
high-impedance, difference amplifier can be
a
implemented without any major problem. This
implementation is shown in Figure 80. This circuit
provides excellent common-mode rejection ratio
(CMRR) as long as the input is within the CMRR
range of –2.1V to +1.6V. Note that this circuit does
not make use of the gain control pin, VG. Also, it is
recommended to choose RS such that the pole
formed by RS and the parasitic input capacitance
does not limit the bandwidth of the circuit. The
common-mode rejection ratio for this circuit
implemented in a gain of +10V/V for VG = +1V is
shown in Figure 81. Note that because the gain
control voltage is fixed and is normally set to +1V, the
feedback element can be reduced in order to
increase the bandwidth. When reducing the feedback
element make sure that the VCA822 is not limited by
common-mode input voltage, the current flowing
through RG, or any other limitation described in this
data sheet.
RF
RF
RF
VOUT
=
´ VG ´ VIN
+
-
´ VIN
RG
RG
R1
(1)
Setting R1 to equal RG, the term that depends only on
VIN drops out of the equation, leaving only the term
that depends on both VG and VIN. VOUT then follows
Equation 2.
RF
VOUT
=
´ VIN ´ VG
RG
(2)
R1
VG
RF
VIN
+VIN
RG+
R2
FB
VCA822
RG-
-VIN
RF
RS
RG
VIN+
+VIN
RG+
Source
Impedance
RS
FB
RG
VCA822
RG-
-VIN
20W
R3
VIN-
20W
RS
Figure 78. Four-Quadrant Multiplier Circuit
The behavior of this circuit is illustrated in Figure 79.
Keeping the input amplitude of a 1MHz signal
Figure 80. Difference Amplifier
constant and varying the VG voltage (100kHz, 2VPP
gives the modulated output voltage shown in
Figure 79.
)
95
90
85
80
75
70
65
60
55
50
45
40
1.5
fIN = 1MHz
1.0
0.5
fVG = 0.1MHz
0
-0.5
-1.0
-1.5
Input-Referred
100k
VIN
VOUT
1M
10M
100M
Frequency (Hz)
VG
0
1
2
3
4
5
6
7
8
9
10
Figure 81. Common-Mode Rejection Ratio
Time (ms)
Figure 79. Modulated Output Signal of the
4-Quadrant Multiplexer Circuit
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DIFFERENTIAL EQUALIZER
9
6
Equalized Frequency
Response
If the application requires frequency shaping (the
transition from one gain to another), the VCA822 can
be used advantageously because its architecture
allows the application to isolate the input from the
gain setting elements. Figure 82 shows an
implementation of such a configuration. The transfer
function is shown in Equation 3.
3
0
-3
-6
Initial Frequency Response
of VCA822 with RC Load
-9
-12
-15
-18
-21
-24
RF
1 + sRGC1
´
G = 2 ´
RG
1 + sR1C1
(3)
1M
10M
100M
Frequency (Hz)
1G
RF
VIN1
+VIN
RG+
RS
Figure 83. Differential Equalization of an RC Load
DIFFERENTIAL CABLE EQUALIZER
FB
VCA822
R1
RG
C1
RG-
A
differential cable equalizer can easily be
VIN2
-VIN
20W
implemented using the VCA822. An example of a
cable equalization for 100 feet of Belden Cable
1694F is illustrated in Figure 85, with the result for
this implementation shown in Figure 84. This
implementation has a maximum error of 0.2dB from
dc to 40MHz.
RS
Figure 82. Differential Equalizer
2.0
This transfer function has one pole, P1 (located at
RGC1), and one zero, Z1 (located at R1C1). When
equalizing an RC load, RL and CL, compensate the
pole added by the load located at RLCL with the zero
Z1. Knowing RL, CL, and RG allows the user to select
C1 as a first step and then calculate R1. Using
RL = 75Ω, CL = 100pF and wanting the VCA822 to
Cable Attenuations
1.5
1.0
VCA822 with
0.5
0
Equalization
operate at a gain of +2V/V, which gives RF = RG
=
1.33kΩ, allows the user to select C1 = 5pF to ensure
a positive value for the resistor R1. With all these
values known, R1 can be calculated to be 170Ω. The
frequency response for both the initial, unequalized
frequency response and the resulting equalized
frequency response are shown in Figure 83.
-0.5
-1.0
1
10
100
Frequency (MHz)
Figure 84. Cable Attenuation versus Equalizer
Gain
Note that this implementation shows the cable
attenuation side-by-side with the equalization in the
same plot. For a given frequency, the equalization
function realized with the VCA822 matches the cable
attenuation. The circuit in Figure 85 is a driver circuit.
To implement a receiver circuit, the signal is received
differentially between the +VIN and –VIN inputs.
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R2
1.33kW
VIN
+VIN
RG+
R8
R10
50W
R18
R17
R21
R9
75W
VOUT
FB
40kW
17.5kW
8.7kW
1.27kW
VOUT
VCA822
VREF
C7
100nF
GND
VG
75W Load
RG-
R1
20W
-VIN
C6
120nF
R5
50W
C5
VG = +1VDC
1.42pF
C9
10mF
Figure 85. Differential Cable Equalizer
this circuit performs as if the amplifier were replaced
by a short circuit. Visually replacing the amplifier by a
short leaves a simple voltage-feedback amplifier with
VOLTAGE-CONTROLLED LOW-PASS FILTER
In the circuit of Figure 86, the VCA822 serves as the
a
feedback resistor bypassed by a capacitor.
variable-gain element of
a
voltage-controlled
Replacing this gain with a variable gain, G, the pole
can be written as shown in Equation 5:
G
low-pass filter. This section discusses how this
implementation expands the circuit voltage swing
capability over that normally achieved with the
equivalent multiplier implementation. The circuit
control voltage, VG, is calculated as according to the
simplified relationship in Equation 4:
f8 =
2pR2C
(5)
Because the VCA822 is most linear in the midrange,
the median of the adjustable pole should be set at VG
= 0V (see Figure 26, Figure 46, Figure 67, and
Equation 6). Selecting R1 = R2 = 332Ω, and targeting
a median frequency of 10MHz, the capacitance (C) is
24pF. Because the OPA690 was selected for the
circuit of Figure 86, and in order to limit peaking in
the OPA690 frequency response, a capacitor equal to
C was added on the inverting mode to ground. This
architecture has the effect of setting the
high-frequency noise gain of the OPA690 to +2V/V,
ensuring stability and providing flat frequency
response.
VOUT
R2
1
= -
´
R2C
G
VIN
R1
1 + s
(4)
R2
332W
24pF
C
R1
RF
332W
VIN
1kW
24pF
+VIN
RG+
OPA690
-0.8V £ VG £ 0.8V
FB
VCA822 Out
RG-
-VIN
(6)
RG
VOUT
200W
Once the median frequency is set, the maximum and
minimum frequencies can be determined by using VG
= –0.8V and VG = +0.8V in the gain equation of
Equation 7. Note that this is a first-order analysis and
does not take into consideration the open-loop gain
limitation of the OPA690.
20W
50W
VG
Figure 86. Voltage-Control Low-Pass Filter
RF
VG + 1
G = 2 ´
´
The response control results from amplification of the
feedback voltage applied to R2. First, consider the
case where the VCA822 produces G = 1V/V. Then
RG
2
(7)
22
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With the components shown, the circuit provides a
linear variation of the low-pass cutoff from 2MHz to
20MHz, using –1V ≤ VG ≤ +1V. Practical evaluation
shows that this circuit works from 8MHz to 16MHz
with –0.8V < VG < +0.8V, as shown in Figure 87.
MACROMODELS AND APPLICATIONS
SUPPORT
Computer simulation of circuit performance using
SPICE is often useful when analyzing the
performance of analog circuits and systems. This
principle is particularly true for video and RF amplifier
circuits where parasitic capacitance and inductance
can play a major role in circuit performance. A SPICE
model for the VCA822 is available through the TI web
page. The applications group is also available for
design assistance. The models available from TI
predict typical small-signal ac performance, transient
steps, dc performance, and noise under a wide
variety of operating conditions. The models include
the noise terms found in the electrical specifications
of the relevant product data sheet.
3
VG = +0.8V
0
-3
VG = +0.5V
-6
-9
VG = 0V
-12
VG = -0.5V
-15
-18
VG = -0.8V
-21
VOUT = 1VPP
-24
OPERATING SUGGESTIONS
0
25
50
75
100
125
150
175
200
Operating the VCA822 optimally for
a specific
Frequency (MHz)
application requires trade-offs between bandwidth,
input dynamic range and the maximum input voltage,
the maximum gain of operation and gain, output
dynamic range and the maximum input voltage, the
package used, loading, and layout and bypass
recommendations. The Typical Characteristics have
been defined to cover as much ground as possible to
describe the VCA822 operation. There are four
sections in the Typical Characteristics:
Figure 87. VCA822 as a Voltage-Control,
Low-Pass Filter
DESIGN-IN TOOLS
DEMONSTRATION BOARDS
•
VS = ±5V DC Parameters and VS = ±5V DC and
Power-Supply Parameters, which include dc
operation and the intrinsic limitation of a VCA822
design
Two printed circuit boards (PCBs) are available to
assist in the initial evaluation of circuit performance
using the VCA822 in its two package options. Both of
these are offered free of charge as unpopulated
PCBs, delivered with a user's guide. The summary
information for these fixtures is shown in Table 2.
•
•
•
VS
= ±5V, AVMAX = +2V/V Gain of +2V/V
Operation
VS = ±5V, AVMAX = +10V/V Gain of +10V/V
Operation
VS = ±5V, AVMAX = +100V/V Gain of +100V/V
Operation
Table 2. EVM Ordering Information
LITERATURE
BOARD PART
NUMBER
REQUEST
NUMBER
PRODUCT
VCA822ID
PACKAGE
SO-14
DEM-VCA-SO-1B
SBOU050
SBOU051
Where the Typical Characteristics describe the actual
performance that can be achieved by using the
amplifier properly, the following sections describe in
detail the trade-offs needed to achieve this level of
performance.
VCA822IDGS
MSOP-10
DEM-VCA-MSOP-1A
The demonstration fixtures can be requested at the
Texas Instruments web site (www.ti.com) through the
VCA822 product folder.
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PACKAGE CONSIDERATIONS
3
The VCA822 is available in both SO-14 and
MSOP-10 packages. Each package has, for the
different gains used in the typical characteristics,
different values of RF and RG in order to achieve the
same performance detailed in the Electrical
Characteristics table.
0
-3
AVMAX = 2V/V
AVMAX = 5V/V
AVMAX = 10V/V
-6
Figure 88 shows a test gain circuit for the VCA822.
Table 3 lists the recommended configuration for the
SO-14 and MSOP-10 package.
AVMAX = 20V/V
AVMAX = 50V/V
-9
AVMAX = 100V/V
150 200
-12
0
50
100
+VIN
VIN
RF
Frequency (MHz)
R1
RG+
50W
Figure 89. SO-14 Recommended RF and RG
versus AVMAX
50W
Source
RG
VOUT
RG-
50W
Load
R3
3
-VIN
R2
50W
0
AVMAX = 10V/V
AVMAX = 2V/V
-3
VG
AVMAX = 20V/V
-6
Figure 88. Test Circuit
AVMAX = 50V/V
-9
AVMAX = 100V/V
Table 3. SO-14 and MSOP-10 RF and RG
Configurations
AVMAX = 5V/V
-12
0
50
100
150
200
G = 2
1.33kΩ
1.33kΩ
G = 10
1kΩ
G = 100
Frequency (MHz)
RF
845Ω
RG
200Ω
16.9Ω
Figure 90. MSOP-10 Recommended RF and RG
versus AVMAX
There are no differences between the packages in
the recommended values for the gain and feedback
resistors. However, the bandwidth for the
VCA822IDGS (MSOP-10 package) is lower than the
bandwidth for the VCA822ID (SO-14 package). This
difference is true for all gains, but especially true for
gains greater than 5V/V, as can be seen in Figure 89
and Figure 90. Note that the scale must be changed
to a linear scale to view the details.
MAXIMUM GAIN OF OPERATION
This section describes the use of the VCA822 in a
fixed-gain application in which the VG control pin is
set at VG = +1V. The tradeoffs described here are
with bandwidth, gain, and output voltage range.
In the case of an application that does not make use
of the VGAIN, but requires some other characteristic of
the VCA822, the RG resistor must be set such that
the maximum current flowing through the resistance
IRG is less than ±2.6mA typical, or 5.2mAPP as
defined in the Electrical Characteristics table, and
must follow Equation 8.
VOUT
IRG
=
AVMAX ´ RG
(8)
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INPUT VOLTAGE DYNAMIC RANGE
As illustrated in Equation 8, once the output dynamic
range and maximum gain are defined, the gain
resistor is set. This gain setting in turn affects the
bandwidth, because in order to achieve the gain (and
with a set gain element), the feedback element of the
output stage amplifier is set as well. Keeping in mind
The VCA822 has a input dynamic range limited to
+1.6V and –2.1V. Increasing the input voltage
dynamic range can be done by using an attenuator
network on the input. If the VCA822 is trying to
regulate the amplitude at the output, such as in an
AGC application, the input voltage dynamic range is
directly proportional to Equation 9.
that the output amplifier of the VCA822 is
a
current-feedback amplifier, the larger the feedback
element, the lower the bandwidth as the feedback
resistor is the compensation element.
VIN(PP) = RG ´ IRG(PP)
(9)
Limiting the discussion to the input voltage only and
ignoring the output voltage and gain, Figure 3
illustrates the tradeoff between the input voltage and
the current flowing through the gain resistor.
As such, for unity-gain or under-attenuated
conditions, the input voltage must be limited to the
CMIR of ±1.6V (3.2VPP) and the current (IRQ) must
flow through the gain resistor, ±2.6mA (5.2mAPP).
This configuration sets a minimum value for RE such
that the gain resistor has to be greater than
Equation 10.
OUTPUT CURRENT AND VOLTAGE
The VCA822 provides output voltage and current
capabilities that are unsurpassed in a low-cost
monolithic VCA. Under no-load conditions at +25°C,
the output voltage typically swings closer than 1V to
either supply rails; the +25°C swing limit is within
1.2V of either rails. Into a 15Ω load (the minimum
tested load), it is tested to deliver more than ±160mA.
3.2VPP
RGMIN
=
= 615.4W
5.2mAPP
(10)
Values lower than 615.4Ω are gain elements that
result in reduced input range, as the dynamic input
range is limited by the current flowing through the
gain resistor RG (IRG). If the IRG current is limiting the
performance of the circuit, the input stage of the
VCA822 goes into overdrive, resulting in limited
output voltage range. Such IRG-limited overdrive
conditions are shown in Figure 53 for the gain of
+10V/V and Figure 73 for the +100V/V gain.
The specifications described above, though familiar in
the industry, consider voltage and current limits
separately. In many applications, it is the voltage ×
current, or V-I product, that is more relevant to circuit
operation. Refer to the Output Voltage and Current
Limitations plot (Figure 51) in the Typical
Characteristics. The X- and Y-axes of this graph
show the zero-voltage output current limit and the
zero-current output voltage limit, respectively. The
four quadrants give a more detailed view of the
VCA822 output drive capabilities, noting that the
graph is bounded by a Safe Operating Area of 1W
maximum internal power dissipation. Superimposing
resistor load lines onto the plot shows that the
VCA822 can drive ±2.5V into 25Ω or ±3.5V into 50Ω
without exceeding the output capabilities or the 1W
dissipation limit. A 100Ω load line (the standard test
circuit load) shows the full ±3.9V output swing
capability, as shown in the Typical Characteristics.
OUTPUT VOLTAGE DYNAMIC RANGE
With its large output current capability and its wide
output voltage swing of ±3.9V typical on 100Ω load, it
is easy to forget other types of limitations that the
VCA822 can encounter. For these limitations, careful
analysis must be done to avoid input stage limitation,
either voltage or IRG current; also, consider the gain
limitation, as the control pin VG varies, affecting other
aspects of the circuit.
BANDWIDTH
The output stage of the VCA822 is a wideband
current-feedback amplifier. As such, the feedback
resistance is the compensation of the last stage.
Reducing the feedback element and maintaining the
gain constant limits the useful range of IRG, and
therefore reducing the gain adjust range. For a given
gain, reducing the gain element limits the maximum
achievable output voltage swing.
The minimum specified output voltage and current
over-temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold startup do
the output current and voltage decrease to the
numbers shown in the Electrical Characteristic tables.
As the output transistors deliver power, the respective
junction temperatures increase, increasing the
available output voltage swing, and increasing the
available output current. In steady-state operation,
the available output voltage and current is always
greater than that temperature shown in the
over-temperature specifications because the output
stage junction temperatures are higher than the
specified operating ambient.
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OFFSET ADJUSTMENT
This model is formulated in Equation 11 and
Figure 91.
As a result of the internal architecture used on the
VCA822, the output offset voltage originates from the
output stage and from the input stage and multiplier
core. Figure 92 shows how to compensate both
sources of the output offset voltage. Use this
procedure to compensate the output offset voltage:
starting with the output stage compensation, set
VG = –1V to eliminate all offset contribution of the
input stage and multiplier core. Adjust the output
stage offset compensation potentiometer. Finally, set
VG = +1V to the maximum gain and adjust the input
stage and multiplier core potentiometer. This
procedure effectively eliminates all offset contribution
at the maximum gain. Because adjusting the gain
modifies the contribution of the input stage and the
multiplier core, some residual output offset voltage
remains.
eO = AVMAX
´
2 ´ (RS ´ in)2 + en2 + 2 ´ 4kTRS
(11)
A more complete model is shown in Figure 93. For
additional information on this model and the actual
modeled noise terms, please contact the High-Speed
Product Application Support team at www.ti.com.
RF
+VIN
RG+
in
FB
RS
eO
RG
eO
VCA822
RG-
-VIN
*
4kTRS
in
RS
4kTRS
*
NOTE: RF and RG are noiseless.
NOISE
The VCA822 offers 8.2nV/√Hz input-referred voltage
noise density at a gain of +10V/V and 1.8 pA/√Hz
Figure 91. Simple Noise Model
input-referred
current
noise
density.
The
input-referred voltage noise density considers that all
noise terms, except the input current noise but
including the thermal noise of both the feedback
resistor and the gain resistor, are expressed as one
term.
+5V
Output Stage Offset
10kW
Compensation Circuit
0.1mF
4kW
-5V
RF
VIN
+VIN
RG+
50W
FB
RG
VOUT
VCA822
RG-
-VIN
+5V
50W
1kW
10kW
0.1mF
Input Stage and Multiplexer Core
Offset Compensation Circuit
-5V
Figure 92. Adjusting the Input and Output Voltage Sources
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VG
VG
inINPUT
+VIN
V+
RS1
enINPUT
*
4kTRS1
*
FB
x1
RF
inINPUT
*
4kTRF
+RG
*
VOUT
eO
RG
(Noiseless)
ICORE
iinOUTPUT
-RG
VREF
x1
RF
enOUTPUT
iniOUTPUT
enINPUT
4kTRF
*
*
-VIN
V-
RS2
inINPUT
GND
4kTRS2
*
Figure 93. Full Noise Model
however, it is at a maximum when the output is fixed
at a voltage equal to one-half of either supply voltage
(for equal bipolar supplies). Under this worst-case
condition, PDL = VS /(4 × RL), where RL is the
resistive load.
THERMAL ANALYSIS
The VCA822 does not require heatsinking or airflow
in most applications. The maximum desired junction
temperature sets the maximum allowed internal
power dissipation as described in this section. In no
case should the maximum junction temperature be
allowed to exceed +150°C.
2
Note that it is the power in the output stage and not in
the load that determines internal power dissipation.
As a worst-case example, compute the maximum TJ
using a VCA822ID (SO-14 package) in the circuit of
Figure 77 operating at maximum gain and at the
maximum specified ambient temperature of +85°C.
Operating junction temperature (TJ) is given by
Equation 12:
TJ = TA + PD ´ qJA
PD = 10V(38mA) + 52/(4 ´ 100W) = 442.5mW
(12)
(13)
The total internal power dissipation (PD) is the sum of
quiescent power (PDQ
dissipated in the output stage (PDL) to deliver load
power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. PDL depends on the required output
signal and load; for a grounded resistive load,
Maximum TJ = +85°C + (0.449W ´ 80°C/W) = 120.5°C
)
and additional power
(14)
This maximum operating junction temperature is well
below most system level targets. Most applications
should be lower because an absolute worst-case
output stage power was assumed in this calculation
of VCC/2, which is beyond the output voltage range for
the VCA822.
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BOARD LAYOUT
d) Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils, or 1.27mm to
2.54mm) should be used, preferably with ground and
power planes opened up around them.
Achieving
optimum
performance
with
a
high-frequency amplifier such as the VCA822
requires careful attention to printed circuit board
(PCB) layout parasitics and external component
types. Recommendations to optimize performance
include:
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. This recommendation
includes the ground pin (pin 2). Parasitic capacitance
on the output can cause instability: on both the
inverting input and the noninverting input, it can react
with the source impedance to cause unintentional
band limiting. To reduce unwanted capacitance, a
window around the signal I/O pins should be opened
in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be
unbroken elsewhere on the board. Place a small
series resistance (greater than 25Ω) with the input pin
connected to ground to help decouple package
parasitics.
e) Socketing a high-speed part like the VCA822 is
not recommended. The additional lead length and
pin-to-pin capacitance introduced by the socket can
create an extremely troublesome parasitic network,
which can make it almost impossible to achieve a
smooth, stable frequency response. Best results are
obtained by soldering the VCA822 onto the board.
INPUT AND ESD PROTECTION
The VCA822 is built using
a very high-speed
complementary bipolar process. The internal junction
breakdown voltages are relatively low for these very
small geometry devices. These breakdowns are
reflected in the Absolute Maximum Ratings table.
b) Minimize the distance (less than 0.25”) from the
power-supply
pins
to
high-frequency
0.1µF
All pins on the VCA822 are internally protected from
decoupling capacitors. At the device pins, the ground
and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower
frequencies, should also be used on the main supply
pins. These capacitors may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the PCB.
ESD by means of
a
pair of back-to-back
reverse-biased diodes to either power supply, as
shown in Figure 94. These diodes begin to conduct
when the pin voltage exceeds either power supply by
about 0.7V. This situation can occur with loss of the
amplifier power supplies while a signal source is still
present. The diodes can typically withstand
a
continuous current of 30mA without destruction. To
ensure long-term reliability, however, diode current
should be externally limited to 10mA whenever
possible.
ESD protection diodes internally
c) Careful selection and placement of external
+VS
connected to all pins.
components
preserve
the
high-frequency
performance of the VCA822. Resistors should be a
very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high-frequency performance.
Again, keep the leads and PCB trace length as short
as possible. Never use wire-wound type resistors in a
high-frequency application. Because the output pin is
the most sensitive to parasitic capacitance, always
position the series output resistor, if any, as close as
possible to the output pin. Other network
components, such as inverting or non-inverting input
termination resistors, should also be placed close to
the package.
External
Pin
Internal
Circuitry
-VS
Figure 94. Internal ESD Protection
28
Submit Documentation Feedback
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): VCA822
VCA822
www.ti.com
SBOS343A–SEPTEMBER 2007–REVISED OCTOBER 2007
Changes from Original (September 2007) to Revision A ............................................................................................... Page
•
•
•
•
•
•
Changed GMAX to AVMAX throughout document...................................................................................................................... 1
Changed rail quantity for VCA822ID in the Ordering Information table................................................................................. 2
Changed 5th row of AC Performance section in the Electrical Characteristics table............................................................ 3
Changed 4th row of Output section in the Electrical Characteristics table............................................................................ 3
Changed G to AVMAX in conditions of the Electrical Characteristics table.............................................................................. 3
Changed Figure 9, the title of Figure 10, the title of Figure 11, the title of Figure 12, and Figure 13 in the ±5V, DC
and Power-Supply Parameters Typical Characteristics......................................................................................................... 6
•
•
•
•
•
Changed Figure 14, Figure 21, Figure 23, Figure 25, and Figure 31 in the ±5V, AVMAX = +2V/V Typical Characteristics ... 7
Changed Figure 36, Figure 52, and Figure 56 in the ±5V, AVMAX = +10V/V Typical Characteristics. ................................. 11
Changed Figure 57 and Figure 76 in the ±5V, AVMAX = +100V/V Typical Characteristics................................................... 15
Changed 2200V/µs to 1700V/µs in first paragraph of the Wideband Variable Gain Amplifier Operation section............... 19
Changed Table 2 in the Demonstration Boards section...................................................................................................... 23
Copyright © 2007, Texas Instruments Incorporated
Submit Documentation Feedback
29
Product Folder Link(s): VCA822
PACKAGE OPTION ADDENDUM
www.ti.com
8-Oct-2007
PACKAGING INFORMATION
Orderable Device
VCA822ID
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
14
10
10
10
10
14
14
50 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VCA822IDG4
SOIC
MSOP
MSOP
MSOP
MSOP
SOIC
D
50 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VCA822IDGSR
VCA822IDGSRG4
VCA822IDGST
VCA822IDGSTG4
VCA822IDR
DGS
DGS
DGS
DGS
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VCA822IDRG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
12
VCA822IDGSR
VCA822IDGST
VCA822IDR
DGS
DGS
D
10
10
14
SITE 41
SITE 41
SITE 41
5.3
5.3
6.5
3.4
3.4
9.0
1.4
1.4
2.1
8
8
8
12
12
16
Q1
Q1
Q1
180
12
330
16
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
VCA822IDGSR
VCA822IDGST
VCA822IDR
DGS
DGS
D
10
10
14
SITE 41
SITE 41
SITE 41
346.0
190.0
346.0
346.0
212.7
346.0
29.0
31.75
33.0
Pack Materials-Page 2
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